similar to: Intrinsics for RISCV CSR instructions

Displaying 20 results from an estimated 100 matches similar to: "Intrinsics for RISCV CSR instructions"

2019 Aug 14
3
[RFC][RISCV] Selection of complex codegen patterns into RISCV bit manipulation instructions
Hi all, I'm currently working on the implementation for LLVM of the RISCV Bit Manipulation ISA extension described by Clifford Wolf in the following presentation: https://content.riscv.org/wp-content/uploads/2019/06/17.10-b_wolf.pdf and the following document: https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.90.pdf The aim is to provide the intrinsic functions to the user in
2019 Aug 15
2
[RFC][RISCV] Selection of complex codegen patterns into RISCV bit manipulation instructions
Hi Roman, > That depends. > If there's LLVM intrinsic for it, then any normal optimization pass could do it. > In cttz's case it's mainly done in LoopIdiom pass. Oh yes. Thank you! Unfortunately several of the instructions of the bit manipulation extension don't seem to have an intrinsic already in LLVM. That will require to add some passes to the middle end. >
2018 Mar 02
2
Segmentation fault when using llc to target riscv.
I am using LLVM version 4.0.1 Running `llc -march=riscv64 math.ll` returns: #0 0x0000000000fed7d1 (llc+0xfed7d1) #1 0x0000000000fec559 (llc+0xfec559) #2 0x0000000000fec8d9 (llc+0xfec8d9) #3 0x00007f22c044e5e0 __restore_rt (/lib64/libpthread.so.0+0xf5e0) #4 0x0000000000d7faf3 (llc+0xd7faf3) #5 0x0000000000cd4b88 (llc+0xcd4b88) #6 0x0000000000cd530c (llc+0xcd530c) #7 0x00000000006858c3
2017 Dec 21
2
How to implement lowerReturn for poring GlobalISel to RISCV?
Hi LLVM developers, Thank Daniel Sanders, Aditya Nandakumar and Justin Bogner's Tutorial[1]: Head First into GlobalISel about how to port, and Aditya took BPF target as a simple instance: bool BPFCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,                                   const Value *Val, unsigned VReg) const {   assert(!Val == !VReg && "Return value
2008 Jan 17
0
CSR and SSL Key being regenerated on a puppet node
This is causing me to --clean the first key, and --sign again after the second run of puppetd --test First Run: [root@asmc1n2 ~]# puppetd --test warning: peer certificate won''t be verified in this SSL session. info: Creating a new certificate request for asmc1n2.dev.gridapp.com info: Creating a new SSL key at /var/lib/puppet/ssl/private_keys/asmc1n2.dev.gridapp.com.pem ... Second
2012 Aug 27
1
write.matrix.csr data conversion
> write.matrix.csr(mx, y = y, file = file) > table(y) 0 1 5194394 23487 $ cut -d' ' -f1 f | sort | uniq -c 23487 2 5194394 1 i.e., 0 is written as 1 and 1 is written as 2. why? is there a way to disable this? -- Sam Steingold (http://sds.podval.org/) on Ubuntu 12.04 (precise) X 11.0.11103000 http://www.childpsy.net/ http://palestinefacts.org
2012 Aug 27
1
matrix.csr %*% matrix --> matrix
When a sparse matrix is multiplied by a regular one, the result is usually not sparse. However, when matrix.csr is multiplied by a regular matrix in R, a matrix.csr is produced. Is there a way to avoid this? Thanks! -- Sam Steingold (http://sds.podval.org/) on Ubuntu 12.04 (precise) X 11.0.11103000 http://www.childpsy.net/ http://palestinefacts.org http://truepeace.org
2013 May 07
0
How to use "SparseM-conversions" to convert a dCgMatrix into a matrix.csr ?
Hi all, I want to transform a dCgMatrix from package Matrix into a matrix.csr from package SparseM, and I found out this link : http://stat.ethz.ch/R-manual/R-devel/library/Matrix/html/SparseM-conv.html But there's no informaion about usage/description/arguments, so how do I use this SparseM-conversions method ?? Is it a function ?? By the way I already tried function: as.spam.matrix.csr
2015 Sep 01
0
Anyone ports Opus to CSR Kalimba DSP?
Hi All, Wondering if you or you know some one has done the porting from Opus C reference design to the Assembly of CSR Kalimba DSP? We are working porting and would like to ask more people ( consultant) to join the effort. Thanks, Z -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.xiph.org/pipermail/opus/attachments/20150901/6ba11a06/attachment.htm
2005 Jan 28
2
read.matrix.csr bug (e1071)?
Hello, I would like to read and write sparse matrices using the functions write.matrix.csr() and read.matrix.csr() of the package e1071. Writing is OK but reading back the matrix fails: x <- rnorm(100) m <- matrix(x, 10) m[m < 0.5] <- 0 m.csr <- as.matrix.csr(m) write.matrix.csr(m, "sparse.dat") read.matrix("sparse.dat") Error in initialize(value, ...)
2020 Oct 29
0
[riscv] How do I use the RISC-V Vector extension instructions in LLVM IR?
Michael, Apologies for taking so long to get back to you. Trunk LLVM does not contain support for code generating the V extension yet. The experimental-v support you see there is only MC-layer support, where you can use the V instructions in assembly (including inline assembly). There is currently (today) no way of turning LLVM IR vector intrinsics into RISC-V V extension instructions. Hanna
2008 Oct 23
1
write.matrix.csr(e1071) bug
Hello, The write.matrix.csr() function of the e1071 package contains a bug. Try the following: library(e1071) m <- 1 - diag(10) sm <- as.matrix.csr(m) write.matrix.csr(sm) The resulting file (out.dat) contains only the two lines below: 2:1 3:1 4:1 5:1 6:1 7:1 8:1 9:1 10:1 1:1 3:1 4:1 5:1 6:1 7:1 8:1 9:1 10:1 This is obviously wrong as the matrix m has 90 non-zero entries. The
2019 Jul 09
2
Manipulating global address inside GlobalAddress SDNode in (RISCV) LLVM backend
Hello, Brief background: We are trying to support 64 bit pointers in RISCV 32 bit backend http://lists.llvm.org/pipermail/llvm-dev/2019-June/132805.html To pass the legalizer we plan to break the 64 bit GlobalAddress into 32 bit GlobalAddress having the other 32 bit glued to the node. We could not find a direct way to convert the 64 bit GlobalAddress Node into a 32 bit node. For a GlobalAddress
2019 Jul 11
2
Manipulating global address inside GlobalAddress SDNode in (RISCV) LLVM backend
On Thu, Jul 11, 2019 at 10:21 PM Tim Northover <t.p.northover at gmail.com> wrote: > On Thu, 11 Jul 2019 at 17:16, Reshabh Sharma <reshabhsh at gmail.com> wrote: > > We thought LUI and ADDI pair will be good to store the values in a i32 > register. > > With you so far, I think. To be explicit, to materialize a full 64-bit > pointer you'd need 4 instructions:
2009 Jun 25
0
[e1071] Inconsistent results when using matrix.csr for svm() - possibly scaling problem
Dear all, I'm training an SVM with default settings on a matrix csr (SparseM package). I realized that if I train the SVM with the (hopefully) equivalent matrix (Matrix package) representation, the returned models and predictions sometimes differ. I expected both representations of the same data to lead to the same results though. It could be that it is a scaling problem, because unscaled
2008 Feb 17
1
random location in polygons sp spsample splancs csr
Dear all, I had to place points at random, one in each of larger number of polygons (actually in objects of class 'SpatialPolygonsDataFrame' , see sp library), and tried first to do it using spsample (from sp). Surprisingly, every 5-15 trials, the output was a NULL value. The doc says that ' this may occur when trying to hit a small and awkwardly shaped polygon in a large
2019 Jul 11
2
Manipulating global address inside GlobalAddress SDNode in (RISCV) LLVM backend
On Thu, Jul 11, 2019 at 10:42 PM Tim Northover <t.p.northover at gmail.com> wrote: > On Thu, 11 Jul 2019 at 18:03, Reshabh Sharma <reshabhsh at gmail.com> wrote: > > Ah now I could see it more clearly. I was not sure that should I add > them (MO_LO32_LO and MO_LO32_HI), btw this was backup plan. Probably for > now we are going with this. I implemented them today and
2020 Apr 02
2
lli cannot execute the bc file for RISCV, Unable to find target for this triple
*llvm-project version:dd8a2013dc1804be1b7d9cffacad2e984300bd22* *Instructons to build LLVM+clang:* ``` cmake -G Ninja -DCMAKE_INSTALL_PREFIX=/home/llvm/workspace/llvm/llvm-project/llvm_install -DCMAKE_BUILD_TYPE="Release" -DDEFAULT_SYSROOT="/home/llvm/workspace/riscv/riscv-tc-20200220/bin/riscv32-unknown-elf"
2019 Jul 11
2
Manipulating global address inside GlobalAddress SDNode in (RISCV) LLVM backend
> > I don't think there's a real shortage of those, but I confess I'm not > sure why that's related. You'd need a representation for the LUI and > ADDI after instruction selection anyway. Yeah at the end we need a representation for LUI and ADDI. We were trying to break the 64 bit address from GlobalAddress node into two i32 register. We will add custom load/store
2019 Sep 25
2
Help with RISCV and QEMU in llvm testsuite lit testing
Hi, I am not sure if this is the right forum. Please direct me to the appropriate place if it isn't so. Please keep in CC as i am not subscribed to this mailing list. I am trying to test riscv llvm tools in QEMU using llvm testsuite. As a trial i am trying only the Single Source C Regression folder. The steps that i took are : ]$ cmake -DCMAKE_C_COMPILER=/opt/riscv-tools/bin/clang