Junning Wu via llvm-dev
2020-Apr-02 00:59 UTC
[llvm-dev] lli cannot execute the bc file for RISCV, Unable to find target for this triple
*llvm-project version:dd8a2013dc1804be1b7d9cffacad2e984300bd22* *Instructons to build LLVM+clang:* ``` cmake -G Ninja -DCMAKE_INSTALL_PREFIX=/home/llvm/workspace/llvm/llvm-project/llvm_install -DCMAKE_BUILD_TYPE="Release" -DDEFAULT_SYSROOT="/home/llvm/workspace/riscv/riscv-tc-20200220/bin/riscv32-unknown-elf" -DGCC_INSTALL_PREFIX="/home/llvm/workspace/riscv/riscv-tc-20200220" -DLLVM_DEFAULT_TARGET_TRIPLE="riscv32-unknown-elf" -DLLVM_ENABLE_PROJECTS="clang;lld;libc" -DLLVM_TARGETS_TO_BUILD="RISCV" ../llvm ``` *When compiling the obj file for the RTL simulation platform, everything is ok. * *But when I try to run the bc file using lli, I have such an error.* ``` #../llvm/llvm-project/llvm_install/bin/lli main.ll ../llvm/llvm-project/llvm_install/bin/lli: error: error creating EE: Unable to find target for this triple (no targets are registered) ``` Clang & lli version(Confusion About " *riscv32-unknown-unknown-elf* " WITH " *riscv32-unknown-elf* "): ``` $ ../llvm/llvm-project/llvm_install/bin/clang --version clang version 11.0.0 (https://github.com/llvm/llvm-project.git dd8a2013dc1804be1b7d9cffacad2e984300bd22) Target: riscv32-unknown-unknown-elf Thread model: posix InstalledDir: /home/llvm/workspace/test_lli/../llvm/llvm-project/llvm_install/bin $ ../llvm/llvm-project/llvm_install/bin/lli --version LLVM (http://llvm.org/): LLVM version 11.0.0git Optimized build. Default target: riscv32-unknown-elf Host CPU: skylake ``` *Instructons to generate main.ll:* ``` ../llvm/llvm-project/llvm_install/bin/clang --target=riscv32-unknown-elf --sysroot=/home/llvm/workspace/riscv/riscv-tc-20200220/bin/riscv32-unknown-elf --gcc-toolchain=/home/llvm/workspace/riscv/riscv-tc-20200220 -march=rv32imac -mabi=ilp32 -I/home/llvm/workspace/llvm/llvm-project/llvm_install/riscv32-unknown-elf/include -S -emit-llvm main.c ``` //main.c ``` #include <stdio.h> int main(){ int a,b,c; a = 5; b = 2; asm volatile ( "norm %[z], %[x]\n\t" : [z] "=r" (c) : [x] "r" (a) ) ; if ( c != 28 ){ printf("\nHAAWKING TEST: FAILED\n"); return -1; } printf("\nHAAWKING TEST: PASSED\n"); return 0; } ``` Since I add some custom instructions to the RISC-V ISA and have not got a simulator, so I want to check out whether these instructions using lli. Can anyone figure out why this happens? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20200402/5f8d1d97/attachment.html>
Luís Marques via llvm-dev
2020-Apr-02 10:55 UTC
[llvm-dev] lli cannot execute the bc file for RISCV, Unable to find target for this triple
On Thu, Apr 2, 2020 at 2:00 AM Junning Wu via llvm-dev < llvm-dev at lists.llvm.org> wrote:> Since I add some custom instructions to the RISC-V ISA and have not got a > simulator, so I want to check out whether these instructions using lli. > Can anyone figure out why this happens? >LLI will either interpret the LLVM bytecode or "JIT" it to native code (basically just dynamically do a regular compilation plus code loading), so I don't think LLI is very well suited for your use case. In any case, I am currently working on the ELF loader used for the JIT, which AFAIK is basically the only thing remaining for LLI to work for RISC-V, *if* you can then execute the native instructions. So you'll need an emulator anyway. I'm using QEMU, which you can also use for free. Best, Luís -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20200402/3a07e8e6/attachment.html>
Junning Wu via llvm-dev
2020-Apr-02 11:51 UTC
[llvm-dev] lli cannot execute the bc file for RISCV, Unable to find target for this triple
Cool, thanks! I also got this answer from https://llvm.org/docs/CommandGuide/lli.html, which says that “*lli* is *not* an emulator. It will not execute IR of different architectures and it can only interpret (or JIT-compile) for the host architecture.” Thanks a lot. I will try QEMU or gem5. On Thu, Apr 2, 2020 at 6:55 PM Luís Marques <luismarques at lowrisc.org> wrote:> On Thu, Apr 2, 2020 at 2:00 AM Junning Wu via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Since I add some custom instructions to the RISC-V ISA and have not got a >> simulator, so I want to check out whether these instructions using lli. >> Can anyone figure out why this happens? >> > > LLI will either interpret the LLVM bytecode or "JIT" it to native code > (basically just dynamically do a regular compilation plus code loading), so > I don't think LLI is very well suited for your use case. > > In any case, I am currently working on the ELF loader used for the JIT, > which AFAIK is basically the only thing remaining for LLI to work for > RISC-V, *if* you can then execute the native instructions. So you'll need > an emulator anyway. I'm using QEMU, which you can also use for free. > > Best, > Luís >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20200402/e1d3976d/attachment.html>
Maybe Matching Threads
- llvm-objdump cannot recognize mul&mulh RISC-V M Instructions
- Help with RISCV and QEMU in llvm testsuite lit testing
- [riscv] How do I use the RISC-V Vector extension instructions in LLVM IR?
- [riscv] How do I use the RISC-V Vector extension instructions in LLVM IR?
- Segmentation fault when using llc to target riscv.