Displaying 20 results from an estimated 500 matches similar to: "[LLVMdev] ConstantInt::getRawValue"
2004 Jun 17
0
[LLVMdev] ConstantInt::getRawValue
On Thu, 17 Jun 2004, Vladimir Prus wrote:
> Is there are reason why ConstantInt::getRawValue method can't be moved one
> step into class hierarchy, into ConstantIntegral::getRawValue
>
> The reason I'd like this is that to handle both ConstantInt and ConstantBool,
> I need the following:
>
> if (ConstantInt* CI = dyn_cast<ConstantInt>(V)) {
>
2004 Jun 19
1
[LLVMdev] ConstantInt::getRawValue
Chris Lattner wrote:
> > If getRawValue is moved to ConstantIntegral, I'd simply write
> >
> > if (ConstantIntegral* CI = dyn_cast<ConstantInt>(V)) {
> > BuildMI(*MBB, IPt, NM::MOVE, 1, Reg).addImm(CI->getRawValue());
> > } ...
> >
> > which is a bit nicer. Of course, if you think it's a good idea, I can
> > send a patch.
2004 Nov 22
2
[LLVMdev] Memory leaks revisited (and many fixed)
Chris Lattner wrote:
>>The four leaks are caused by the ConstantBool::True
>>and ConstantBool::False (1 for each object + 1 for the use list dummy) -
>> unfortunately they are not so easy to wrap with accessor functions
>>since they are public member variables of the ConstantBool class... If
>>only everyone used the ConstantBool::get() there would be no problem,
2004 Nov 19
2
[LLVMdev] Memory leaks revisited (and many fixed)
Hi,
I finally took the time to track down the remaining memory leaks beside
the LeakDetector objects and TypeMaps/ValueMaps I already knew about. It
turns out almost all of them came from the command line options module,
so I cleaned up the patch for LeakDetector and made a new patch for
CommandLine. The patches are attached to this message.
That got rid of all but 4 leaks I'm getting,
2004 Nov 19
0
[LLVMdev] Memory leaks revisited (and many fixed)
On Fri, 19 Nov 2004, Morten Ofstad wrote:
> I finally took the time to track down the remaining memory leaks beside
> the LeakDetector objects and TypeMaps/ValueMaps I already knew about. It
> turns out almost all of them came from the command line options module,
> so I cleaned up the patch for LeakDetector and made a new patch for
> CommandLine. The patches are attached to this
2004 Nov 22
0
[LLVMdev] Memory leaks revisited (and many fixed)
Morten Ofstad wrote:
} Chris Lattner wrote:
} >>The four leaks are caused by the ConstantBool::True
} >>and ConstantBool::False (1 for each object + 1 for the use list dummy) -
} >> unfortunately they are not so easy to wrap with accessor functions
} >>since they are public member variables of the ConstantBool class... If
} >>only everyone used the ConstantBool::get()
2002 Sep 22
2
[LLVMdev] Accessing constant indexes in GetElementPtr
Ok. Let's say I have a GetElementPtrInst that is used to access structure
elements. In this case the indexes will be constants and I want to get the
constant values as an a native C int.
Now I can iterate over all the indexes with idx_begin(). I can cast
all of the indexes to a ConstantIntegral. However, I cannot cast the
indexes to a ConstantSInt or ConstantUInt (cast<> throws an
2002 Sep 23
2
[LLVMdev] Accessing constant indexes in GetElementPtr
> Also sprach Wojciech Stryjewski:
> } Ok. Let's say I have a GetElementPtrInst that is used to access
> structure
> } elements. In this case the indexes will be constants and I want
> to get the
> } constant values as an a native C int.
> }
> } Now I can iterate over all the indexes with idx_begin(). I can cast
> } all of the indexes to a ConstantIntegral. However,
2005 Jan 06
1
[LLVMdev] Folding cast of a global address to boolean
I noticed that folding a cast of a global address to boolean doesn't
work like I expected - there is a comment in the code that casts of
external symbols should not happen, but I don't understand the rationale
for this.
// FIXME: When we support 'external weak' references, we have to prevent
// this transformation from happening. In the meantime we avoid folding
// any cast of
2017 Feb 13
2
ARM Backend: Emit conditional move
Hi,
I'm trying to emit a conditional move in the ARM backend for a custom
intrinsic. Basically, I want to emit the following the following
instruction sequence:
cmp r0, r1
moveq r2, #1
To implement this, I first emit a compare instruction and then I'm
trying to emit the conditional move, which is failing.
BuildMI(&MBB, DL, TII->get(ARM::CMPrr))
2007 Feb 21
0
LLVM 2.0 Progress Report
Hi Everyone,
I'm happy to say that LLVM has made many leaps and bounds since the
last update in November. Because we are bumping the major version
number with this release, we're letting the release go for twice as
long as our planned release schedule (6 months instead of 3). We are
currently half way through the LLVM 2.0 development cycle.
So far, many important and invasive changes
2012 Sep 11
3
[LLVMdev] Need Help Understanding Operands in X86 MachineFunctionPass
Dear All,
I'm working on an X86 MachineFunctionPass that adds prefetch
instructions to a function. I have code that adds a "prefetchnta
<constant address>" instruction to x86 32-bit code. What I want to do
is to add a "prefetchnta <constant address>" instruction to x86_64 code.
The code for adding the 32-bit instruction is:
2013 Feb 23
2
[LLVMdev] Assertion failed after my storeRegToStackSlot/loadFromStackSlot
Hi All.
I'm writing storeRegToStackSlot and loadFromStackSlot function for my
Target. This Target can store/load one byte (not all word) from
FrameIndex. If I need to store 16 bit register I will must to split it
to two instruction like this:
BuildMI(MBB, MI, dl, get(Z80::LD8xmr))
.addFrameIndex(FrameIndex).addImm(0)
.addReg(SrcReg, 0, Z80::subreg_lo);
BuildMI(MBB, MI, dl,
2014 Oct 29
2
[LLVMdev] Problem in X86 backend (again)
>> // Increment loop variable and jmp
>> BuildMI(*MBB_erase, MBB_erase->end(), db, >> TII->get(X86::ADD64ri32),reg).addReg(reg).addImm(8);
>
> It looks like this instruction is defining virtual register "reg" the second time.
Thx for your answer...
Why would it define it again? I just want to use this register and add something to it...
Cheers
2014 Dec 08
2
[LLVMdev] Virtual register problem in X86 backend
Hi,
I'm having trouble using virtual register in the X86 backend.
I implemented a new intrinsic and I use a custom inserter. The goal of
the intrinsic is to set the content of the stack to zero at the end of
each function.
Here is my code:
MachineBasicBlock *
X86TargetLowering::EmitBURNSTACKWithCustomInserter(
MachineInstr *MI,
MachineBasicBlock
2018 Mar 23
1
ARM Backend BuildMI operand issues
Thank you for your help Tom
you are totally right with the registers but the command you suggest
also doesn't work.
After some research I found the following thread on the mailing list:
http://lists.llvm.org/pipermail/llvm-dev/2017-February/110086.html
With your help and the information about the condition codes I was able
to resolve the error:
BuildMI(BB, BB.end(), DL,
2012 Sep 11
1
[LLVMdev] Need Help Understanding Operands in X86 MachineFunctionPass
-----Original Message-----
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of John Criswell
Sent: Tuesday, September 11, 2012 1:42 PM
To: Steve Checkoway
Cc: LLVMdev at cs.uiuc.edu
Subject: Re: [LLVMdev] Need Help Understanding Operands in X86 MachineFunctionPass
...
>
>> The code for adding the 32-bit instruction is:
>>
>>
2012 Sep 11
1
[LLVMdev] Need Help Understanding Operands in X86 MachineFunctionPass
On Sep 11, 2012, at 10:57 AM, John Criswell wrote:
> I'm working on an X86 MachineFunctionPass that adds prefetch instructions to a function. I have code that adds a "prefetchnta <constant address>" instruction to x86 32-bit code. What I want to do is to add a "prefetchnta <constant address>" instruction to x86_64 code.
Given that you don't actually
2018 Mar 22
0
ARM Backend BuildMI operand issues
On 03/22/2018 09:29 AM, Julius Hiller via llvm-dev wrote:
> Hello everyone,
>
> I'm working on a MachineFunctionPass that inserts a list of instructions into an Module so a later Pass can work on them.
> To do so I load a dummy .ll file created from a main stub, create the needed function stubs (ModulePass), insert Blocks and create instructions using BuildMI.
> I started with
2014 Oct 28
2
[LLVMdev] Problem in X86 backend (again)
Hi,
I'm still having problems implementing my custom inserter in the X86 backend.
I found a solution to my last problem (http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-October/078296.html), by using a virtual register.
The binary works when it's compiled in -O0, but not in -O1,-O2,...
I really can't figure what I'm doing wrong... Any idea?
Here is the code of my custom