search for: xxinstrinfo

I suggest u grep how this file is used. Since it is included in xxInstrInfo.td and this is its only use, we can conclude that this file does nothng more than defining some helper tablegen classes and we thus can totally move these definitions into xxInstrInfo.td and then remove XXInstFormat.td Regards. 在 2013-2-6 下午4:52，"陳韋任 (Wei-Ren Chen)" <chenwj at iis.sin...

Hi all, I have some troubles in writing XXInstFormat.td for my little backend. I don't know how should I start writing up this file. Is there any general rule? Thanks. Regards, chenwj -- Wei-Ren Chen (陳韋任) Computer Systems Lab, Institute of Information Science, Academia Sinica, Taiwan (R.O.C.) Tel:886-2-2788-3799 #1667 Homepage: http://people.cs.nctu.edu.tw/~chenwj

...tive etc) based on the outcome. For example: add rd,rs instruction adds the contents of register rs to register rd and places the result in rd; add.cc rd, rs does the same and updates the condition codes. Can anybody point out an example of how such instructions should be defined in a corresponding xxInstrInfo.td file please? Sincerely, -- Lev. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100525/54f3a4e1/attachment.html>

...tive etc) based on the outcome. For example: add rd,rs instruction adds the contents of register rs to register rd and places the result in rd; add.cc rd, rs does the same and updates the condition codes. Can anybody point out an example of how such instructions should be defined in a corresponding xxInstrInfo.td file please? ARM has similar instruction pairs, look at ADD/ADDS, SUB/SUBS in ARMInstrInfo.td /jakob

Besizes, XXInstFormat.td usually represents how ISA is grouped in the manual. 在 2013-2-7 上午12:31，"Triple Yang" <triple.yang at gmail.com>写道： > I suggest u grep how this file is used. > Since it is included in xxInstrInfo.td and this is its only use, we can > conclude that this file does nothng more than defining some helper tablegen > classes and we thus can totally move these definitions into xxInstrInfo.td > and then remove XXInstFormat.td > > Regards. > 在 2013-2-6 下午4:52，"陳韋任 (Wei-Ren Chen...

...he outcome. For example: add rd,rs > instruction adds the contents of register rs to register rd and places the > result in rd; add.cc rd, rs does the same and updates the condition codes. > Can anybody point out an example of how such instructions should be defined > in a corresponding xxInstrInfo.td file please? > > ARM has similar instruction pairs, look at ADD/ADDS, SUB/SUBS in > ARMInstrInfo.td > > /jakob > > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100526/31bc0ece/attac...