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Hi Leslie, On 20 December 2017 at 10:51, Leslie Zhai via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Sorry, I am apprentice of lowRISC, and meet new bug when porting GlobalISel > to RISCV target > https://github.com/xiangzhai/llvm/commit/b3f91ea54d9fee0ef7e73a32c6b8456bbe252811 > > > In file included from > /data/project/xiangzhai/llvm/lib/Target/RISCV/RISCVInstructionSelector.cpp:97: > /data/project/xiangzhai/llvm/build/lib/Target/RISCV/RISCVGenGlobalISel.inc:100:7: > error: use of > undeclar...

...0.0 (git at github.com:llvm-mirror/clang.git > 9b7b03045ee9b5622028537266aafeb9ea218ac1) > (git at github.com:llvm-mirror/llvm.git > 3a26601a88394c02603b8756527c55df9ab94d78) (based on LLVM 6.0.0svn) > Target: x86_64-redhat-linux > Thread model: posix > InstalledDir: /data/project/xiangzhai/llvm/build/./bin > $ llc --version > LLVM (http://llvm.org/): > LLVM version 6.0.0svn > Optimized build. > Default target: x86_64-redhat-linux > Host CPU: broadwell > > llc: Unknown command line argument '-debug-only=isel'. Try: > '/data/project/x...

...LLVM China clang version 6.0.0 (git at github.com:llvm-mirror/clang.git 9b7b03045ee9b5622028537266aafeb9ea218ac1) (git at github.com:llvm-mirror/llvm.git 3a26601a88394c02603b8756527c55df9ab94d78) (based on LLVM 6.0.0svn) Target: x86_64-redhat-linux Thread model: posix InstalledDir: /data/project/xiangzhai/llvm/build/./bin $ llc --version LLVM (http://llvm.org/):   LLVM version 6.0.0svn   Optimized build.   Default target: x86_64-redhat-linux   Host CPU: broadwell llc: Unknown command line argument '-debug-only=isel'.  Try: '/data/project/xiangzhai/llvm/build/bin/llc -help' llc:...

...dyn_cast<ELFObjectFile<ELF64LE>>(&Binary)) https://github.com/llvm-mirror/llvm/blob/master/tools/llvm-objcopy/llvm-objcopy.cpp#L200 Please give me some hints about objcopy armv7e-m ELF32LE via LLVM toolchain, thanks a lot! -- Regards, Leslie Zhai - https://reviews.llvm.org/p/xiangzhai/

Hi all, OpenJDK8 jdk8u-dev[1] is just able to work after compiled with LLVM 3.9.1 for X86: $ ./build/linux-x86_64-normal-server-slowdebug/images/j2sdk-image/bin/java -version openjdk version "1.8.0-internal-debug" OpenJDK Runtime Environment (build 1.8.0-internal-debug-xiangzhai_2018_09_09_21_08-b00) OpenJDK 64-Bit Server VM (build 25.71-b00-debug, mixed mode) $ strings ./build/linux-x86_64-normal-server-slowdebug/images/j2sdk-image/bin/java | grep clang clang version 3.9.1 (tags/RELEASE_391/final) But it failed to work after compiled with LLVM 8 for X86: $ ./build/l...

...ro .set reorder .end main .size main, .-main .ident "GCC: (GNU) 4.9.3 20150626 (Red Hat 4.9.3-8)" gssq and gslq are some instructions of Loongson ISA. How to add Loongson ISA for Mips target? I just: * add loongson3a cpu in frontend https://github.com/xiangzhai/clang/commits?author=xiangzhai * initial Loongson3A subtarget skeleton. Are there some documents or papers? Please teach me, thanks a lot! 1. https://github.com/loongson-community/gcc 2. Chinese Simplified version http://www.loongson.cn/uploadfile/cpu/3A3000/Loongson3A3000_3B3000user2.pdf --...

...clang/blob/master/lib/CodeGen/CGBuiltin.cpp#L7629 just ignored the if (shiftVal < 32) condition? https://github.com/llvm-mirror/clang/blob/release_33/lib/CodeGen/CGBuiltin.cpp#L2642 Please give me some hint, thanks a lot! -- Regards, Leslie Zhai - a LLVM developer https://reviews.llvm.org/p/xiangzhai/

...builders/clang-cmake-mips/builds/3282 >> >> There are sanitizer testcase's Warning and Error, but not related with above >> commits! please give me some advice, thanks a lot! >> >> -- >> Regards, >> Leslie Zhai - a LLVM hacker https://reviews.llvm.org/p/xiangzhai/ >> >> >> >> _______________________________________________ >> LLVM Developers mailing list >> llvm-dev at lists.llvm.org >> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev -- Regards, Leslie Zhai - a LLVM hacker https://reviews.llvm.org/p/xiangz...

...neIRBuilder &MIRBuilder,                                   const Value *Val, unsigned VReg) const {   assert(!Val == !VReg && "Return value without a vreg");   MIRBuilder.buildInstr(BPF::RET);   return true; } But how to implement it for RISCV target? https://github.com/xiangzhai/llvm/commit/c49146edbbf655e97727e22e4a87a020fb8da6e5 Because there are separate trap return instructions[2] per privilege level: MRET, SRET, and URET. MRET is always provided, while SRET must be provided if supervisor mode is supported. URET is only provided if user-mode traps are supported. an...

...ders/clang-cmake-mips/builds/3281 http://lab.llvm.org:8011/builders/clang-cmake-mips/builds/3282 There are sanitizer testcase's Warning and Error, but not related with above commits! please give me some advice, thanks a lot! -- Regards, Leslie Zhai - a LLVM hacker https://reviews.llvm.org/p/xiangzhai/

...jdk8u-dev[1] is just able to work after compiled with LLVM 3.9.1 for X86: >> >> $ ./build/linux-x86_64-normal-server-slowdebug/images/j2sdk-image/bin/java -version >> openjdk version "1.8.0-internal-debug" >> OpenJDK Runtime Environment (build 1.8.0-internal-debug-xiangzhai_2018_09_09_21_08-b00) >> OpenJDK 64-Bit Server VM (build 25.71-b00-debug, mixed mode) >> >> $ strings ./build/linux-x86_64-normal-server-slowdebug/images/j2sdk-image/bin/java | grep clang >> clang version 3.9.1 (tags/RELEASE_391/final) >> >> But it failed to work...

...rk after compiled with LLVM 3.9.1 for X86: >>>> >>>> $ ./build/linux-x86_64-normal-server-slowdebug/images/j2sdk-image/bin/java -version >>>> openjdk version "1.8.0-internal-debug" >>>> OpenJDK Runtime Environment (build 1.8.0-internal-debug-xiangzhai_2018_09_09_21_08-b00) >>>> OpenJDK 64-Bit Server VM (build 25.71-b00-debug, mixed mode) >>>> >>>> $ strings ./build/linux-x86_64-normal-server-slowdebug/images/j2sdk-image/bin/java | grep clang >>>> clang version 3.9.1 (tags/RELEASE_391/final) >&gt...

...expensive to build[3]? And I am practicing[4] to use HEA, developed by Dr. Rhydian Lewis, for LLVM firstly. [1] https://reviews.llvm.org/D39712 [2] http://lists.llvm.org/pipermail/llvm-dev/2008-March/012940.html [3] https://github.com/joaotavio/llvm-register-allocator [4] https://github.com/xiangzhai/llvm/tree/avr/include/llvm/CodeGen/GCol -- Regards, Leslie Zhai - https://reviews.llvm.org/p/xiangzhai/

...code, then I will try to port GlobalISel to AVR target, and implement Scheduling definition. So I argue that AMDGPU's scheduler might give you some hint? https://github.com/llvm-mirror/llvm/blob/master/lib/Target/AMDGPU/R600Schedule.td -- Regards, Leslie Zhai - https://reviews.llvm.org/p/xiangzhai/

...object # @.cst.3 .p2align 3 .L.cst.3: .asciz "%s: Hello World %d\n" .size .L.cst.3, 20 .section ".note.GNU-stack","", at progbits $ clang hello.s.s $ ./a.out Leslie Zhai: Hello World 1 WIP: * fix issues https://github.com/xiangzhai/dragonegg/issues * gengtype not support macro https://gcc.gnu.org/ml/gcc/2017-07/msg00045.html -- Regards, Leslie Zhai - a LLVM developer https://reviews.llvm.org/p/xiangzhai/

...if it proves useful. That said -- I would also only use the term `retpoline` if you in fact build a return-based trampoline as the mitigation. Other potential mitigation code sequences would (IMO) be better named something else. > -- > Regards, > Leslie Zhai - https://reviews.llvm.org/p/xiangzhai/ > > > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.l...

....ident "GCC: (GNU) 4.9.3 20150626 (Red Hat 4.9.3-8)" >> >> gssq and gslq are some instructions of Loongson ISA. How to add >> Loongson ISA for Mips target? >> >> I just: >> >> * add loongson3a cpu in frontend >> https://github.com/xiangzhai/clang/commits?author=xiangzhai >> >> * initial Loongson3A subtarget skeleton. >> >> Are there some documents or papers? Please teach me, thanks a lot! >> >> 1. https://github.com/loongson-community/gcc >> 2. Chinese Simplified version >> http://w...

Hi all, Thanks for Aleksandar Beserminji great job: https://reviews.llvm.org/D50437 It is not easy to reproduce the LLVMBUG-38221[1] by building OpenJDK8, it needs some workaround https://raw.githubusercontent.com/xiangzhai/jdk8u-dev/master/Workaround-compile-with-llvm.patch LLVM toolchain[2] is just able to compile OpenJDK8 for mips64el now: http://hg.loongnix.org/ 1. https://bugs.llvm.org/show_bug.cgi?id=38221#c10 2. $ clang -v Loongson clang version 8.0.0 (git at github.com:llvm-mirror/clang.git 56fc90882612ab...

...Hi David, >> >> Thanks for your teaching! >> >> I am a newbie in compiler area, I only learned Compiler Principle in >> 2002https://www.leetcode.cn/2017/12/ilove-compiler-principle.html >> >> But I like to practice and learn >> :)https://github.com/xiangzhai/llvm/blob/avr/lib/CodeGen/RegAllocGraphColoring.cpp#L327because >> theory is not always correct, or misunderstood by people, so I want >> to compare solutionByHEA, IRA, Greedy, PBQP and other algorithms. > > Just as another tip: > - Indeed in my experience: Just implementing...

...[4] to use HEA, developed by Dr. Rhydian Lewis, for LLVM firstly. > > > [1] https://reviews.llvm.org/D39712 > > [2] http://lists.llvm.org/pipermail/llvm-dev/2008-March/012940.html > > [3] https://github.com/joaotavio/llvm-register-allocator > > [4] https://github.com/xiangzhai/llvm/tree/avr/include/llvm/CodeGen/GCol > > -- > Regards, > Leslie Zhai - https://reviews.llvm.org/p/xiangzhai/ > > >