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--- On Thu, 9/20/12, Jim Grosbach <grosbach at apple.com> wrote: From: Jim Grosbach <grosbach at apple.com> Subject: Re: [LLVMdev] Proposal: New DAG node type for reciprocal operation To: "Weiming Zhao" <weimingz at codeaurora.org> Cc: llvmdev at cs.uiuc.edu Date: Thursday, September 20, 2012, 3:32 PM Sounds like a reasonable fit for a target-specific DAG combine. I suspect a target specific node wouldn't be necessary and the patterns could be matched directly. -Jim Yes, a...

...sp!, {r4, lr} b _Z4initPv(PLT) .L3: .align 2 .L2: .word .LANCHOR0-(.LPIC0+8) è 1 GOT offset entry It seems it’s a missing optimizing opportunity for LLVM both in code size and performance, any ideas? If so, I can open a bug and try to fix it. Thanks, Weiming Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140312/6d6d44d1/attachment.html>

...after DAGCombiner and Vector Type legalize, vectorized FDIV has been expanded into scalar versions, which breaks the intention of utilizaing vectorizable mul/recip to implement a vectorized fdiv. To fix that, one need to either combine them back or change the logic of vector type legalize. Thanks, Weiming From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of shahid shahid Sent: Thursday, September 20, 2012 10:06 PM To: Weiming Zhao; Jim Grosbach Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Proposal: New DAG node type for reciprocal operation --- On Thu...

...the case that __aeabi_idiv0 returns. (the provided >> implementation does) >> >> Since LR is not preserved, the following JMP(lr) results in an endless loop. >> >> Or is this an intentional change of the behavior? > Hi Peter, > > That is most certainly a bug. Weiming's patch was supposed to only > introduce Thumb1 code, not transform div0 into a busy loop. :) > > >> The file contains another implementation enabled by __ARM_ARCH_EXT_IDIV__. >> This uses "b" instead of "bl". >> (This works as in previous versi...

...#:abs_g1_nc:foo movk x8, #:abs_g0_nc:foo ldr x8, [x8] blr x8 or I miss some flag during linking? PS. The above test works fine with arm v7 targart. (clang emits "bl foo" and ld generates veneer) Thanks, Weiming -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140619/f4af6377/attachment.html>

...1 -b- 1.4 any cpu Domain-0 0 3 2 -b- 1.1 any cpu It looks good. but when I tried to startup the guests, I got error: sudo xm create xm1 Using config file "./xm1". Error: (22, ''Invalid argument'') Any ideas? Thanks, Weiming _______________________________________________ Xen-users mailing list Xen-users@lists.xensource.com http://lists.xensource.com/xen-users

...So ,with this node type, a div node can be converted to a mul and a recip when desired. Then, each arch can further lower the recip node. Even if the arch has no recip support, allowing other passes to hoist "1/b" out of loop may still be profitable. It this feasible? Thanks, Weiming Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120920/34cf2e9b/attachment.html>

Sounds like a reasonable fit for a target-specific DAG combine. I suspect a target specific node wouldn't be necessary and the patterns could be matched directly. -Jim On Sep 20, 2012, at 3:26 PM, Weiming Zhao <weimingz at codeaurora.org> wrote: > Hi, > > In relaxed/fast math mode, if we can convert a/b to a * (1/b), we may get more performance when (1) “b” is loop invariant or (2) arch has faster reciprocal instruction (e.g. recipe/recips on ARM) or (3) arch has no vector div,...

...(e.g. x >> 32 returns 0)? This can also saves compiler engineer's effort: users complain that it's a compiler bug because their code works with GCC or older version of LLVM (because the loop is not unrolled). And it's really hard to debug such UB in some large code base. Thanks, Weiming -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

...p!, {r3, lr} .save {r3, lr} .LPIC0: add r0, pc, r2 bl _Z4initPv(PLT) ldr r1, .L2+4 .LPIC1: add r0, pc, r1 bl _Z4initPv(PLT) ldr r0, .L2+8 .LPIC2: add r0, pc, r0 ldmfd sp!, {r3, lr} b _Z4initPv(PLT) .L3: .align 2 .L2: .word g0-(.LPIC0+8) .word g1-(.LPIC1+8) .word g2-(.LPIC2+8) Thanks, Weiming Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -----Original Message----- From: Rafael Espíndola [mailto:rafael.espindola at gmail.com] Sent: Friday, March 14, 2014 9:04 AM To: Tim Northover Cc: Weiming Zhao; LLVM Developers Mailing List; Ji...

...o the native version will be selected by linker. Now, non-LTO and LTO build may have different behavior. The question is do we need to make non-LTO and LTO have the same behavior? If so, the LTO part needs to create pseudo uses (or some other mechanism) to keep the symbol from deletion. Thanks, Weiming

...hypercall. Currently, I make a stub in dom0''s kernel, which works as a proxy to forward the request. So, my application first makes a system call to dom0, which then makes hypercall to xen. Is this design necessary? May I call hypercalls from user application under dom0 directly? Thanks, Weiming _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Hello, I think the current implementation for the call "bl __aeabi_idiv0" in builtins\arm\udivsi3.S is broken. At least for the case that __aeabi_idiv0 returns. (the provided implementation does) Since LR is not preserved, the following JMP(lr) results in an endless loop. Or is this an intentional change of the behavior? The file contains another implementation enabled by

Hi Tim, The global merge pass puts the GVs into a sturcture to guarantee their address are contiguous. It works for static GVs but for global hidden GVs, this will cause name resoltion fail during linking .o into .so Any thoughs? Thanks, Weiming > Hi Weiming, > > On 12 March 2014 17:43, Weiming Zhao <weimingz at codeaurora.org> wrote: >> Clang will emit 1 GOT entry for each GV and 2 instructions to get the >> address: >> >> GCC does this only for the first GV. The rest GV address are computed &g...

Hi, I have a quick question: Where is the hypervisor''s log file? I have a lot of messages from xen hypervisor''s printk(KERN_INFO "xm dmesg" just displays the latest ones. Is there any way to access all the messages from hypervisor? Thanks, Weiming _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

On 16 April 2016 at 01:44, Zhao, Weiming via cfe-dev <cfe-dev at lists.llvm.org> wrote: > I'm building libunwind for ARM baremetal using clang. > I notice that __ELF__ is used in libunwind and the macro is only defined for > Linux target on ARM. > Should we also predefine that for arm-none-eabi target? Do you mea...

Hi Renato, It seems to me that LLVM doesn’t parse the inline asm body. It just checks the constraints, (ie. Input/output interface). During ASM writing, it then binding those constraints to placeholders like %0, %1. So it a constraint is a 64-integer type, it *probably* needs paired GPR. Weiming Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation From: Renato Golin [mailto:renato.golin at linaro.org] Sent: Wednesday, March 13, 2013 10:03 AM To: Måns Rullgård Cc: LLVM Dev; weimingz at codeaurora.org Subject: Re: Problems with 64-b...

Hi all, I compiled and installed Xen 3.2 source on FC8. Compilation and installation completed with no errors. However when I try to load Xen I get an error: Kernel panic - Attempted to kill init !!! This is my grub configuration: # grub.conf generated by anaconda # # Note that you do not have to rerun grub after making changes to this file # NOTICE: You have a /boot partition. This means

On Mar 13, 2013, at 10:15 AM, Weiming Zhao <weimingz at codeaurora.org> wrote: > Hi Renato, > > It seems to me that LLVM doesn’t parse the inline asm body. It just checks the constraints, (ie. Input/output interface). During ASM writing, it then binding those constraints to placeholders like %0, %1. This is corr...

On 18 April 2016 at 16:33, Silviu Baranga <Silviu.Baranga at arm.com> wrote: > Doing a grep "eabi" * -R | grep darwin in llvm I found the test divmod-eabi.ll > which uses the triple armv7-apple-darwin-eabi. What format does that have? Certainly not ELF. :) But I didn't mean "has eabi on triple", but "is in none-eabi mode", which may have to check a