Displaying 2 results from an estimated 2 matches for "tmpreg1".
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2012 Jul 23
0
[LLVMdev] How to disable register allocate optimization?
It looks like you are not using the right overloaded version of function
BuildMI defined in MachineInstrBuilder.h.
The register operand added to instruction sb should be a use, not a def
operand. So this function should be called,
BuildMI(BB, dl, TII->get(Mips::SB)).addReg(tmpReg1)
instead of
BuildMI(BB, dl, TII->get(Mips::SB), tmpReg1)
On Sat, Jul 21, 2012 at 11:41 AM, Yang Yang <geraint0923 at gmail.com> wrote:
> Hi everyone,
>
> I am trying to expand one instruction into multiple instructions on MIPS.
> For example, I try to expand:
>...
2012 Jul 21
2
[LLVMdev] How to disable register allocate optimization?
Hi everyone,
I am trying to expand one instruction into multiple instructions on MIPS.
For example, I try to expand:
sh src, imm(dst)
into:
(1) sb src, imm(dst)
(2) srl reg0, src, 8
(3) sb reg0, (imm+1)(dst)
Here, reg0 are created with createVirtualRegister.
However, instr(2) will not be emitted because reg0 is useless before reg0 is defined in instr(3), it is wrong!
So how to prevent the