search for: tmpreg

Displaying 20 results from an estimated 20 matches for "tmpreg".

2004 Dec 02
3
[LLVMdev] Adding xadd instruction to X86
...t;*, <integer type>)* %llvm.atomic_fetch_add_store(<integer type>* <pointer>, <integer type> <value>) I currently have the following code (PtrReg contains the pointer argument, ValReg the value arg, and TmpReg an unused register.): addDirectMem(BuildMI(BB, X86::XADD32mr, 4, TmpReg).addReg(TwoReg), ValReg); This fails the assertion isMem. Any help with this would be appreciated. Thanks, Brent
2007 Apr 18
0
[RFC, PATCH 18/24] i386 Vmi tlbflush header
...2006-03-10 12:55:06.000000000 -0800 +++ linux-2.6.16-rc5/include/asm-i386/tlbflush.h 2006-03-10 13:03:38.000000000 -0800 @@ -4,38 +4,7 @@ #include <linux/config.h> #include <linux/mm.h> #include <asm/processor.h> - -#define __flush_tlb() \ - do { \ - unsigned int tmpreg; \ - \ - __asm__ __volatile__( \ - "movl %%cr3, %0; \n" \ - "movl %0, %%cr3; # flush TLB \n" \ - : "=r" (tmpreg) \ - :: "memory"); \ - } while (0) - -/* - * Global pages have to be flushed a bit differently. No...
2007 Apr 18
0
[RFC, PATCH 18/24] i386 Vmi tlbflush header
...2006-03-10 12:55:06.000000000 -0800 +++ linux-2.6.16-rc5/include/asm-i386/tlbflush.h 2006-03-10 13:03:38.000000000 -0800 @@ -4,38 +4,7 @@ #include <linux/config.h> #include <linux/mm.h> #include <asm/processor.h> - -#define __flush_tlb() \ - do { \ - unsigned int tmpreg; \ - \ - __asm__ __volatile__( \ - "movl %%cr3, %0; \n" \ - "movl %0, %%cr3; # flush TLB \n" \ - : "=r" (tmpreg) \ - :: "memory"); \ - } while (0) - -/* - * Global pages have to be flushed a bit differently. No...
2004 Dec 02
0
[LLVMdev] Adding xadd instruction to X86
...on: > call int (<integer type>*, <integer type>)* > %llvm.atomic_fetch_add_store(<integer type>* <pointer>, > > <integer type> <value>) > > I currently have the following code (PtrReg contains the > pointer argument, ValReg the value arg, and TmpReg an unused > register.): > > addDirectMem(BuildMI(BB, X86::XADD32mr, 4, > TmpReg).addReg(TwoReg), ValReg); This is the problem. Try this: addDirectMem(BuildMI(BB, X86::XADD32mr, 4, TmpReg), ValReg).addReg(TwoReg); In particular, you want to add the memory address before the other reg...
2004 Dec 03
2
[LLVMdev] Adding xadd instruction to X86
...lt;integer type>*, <integer type>)* >>%llvm.atomic_fetch_add_store(<integer type>* <pointer>, >> >><integer type> <value>) >> >>I currently have the following code (PtrReg contains the >>pointer argument, ValReg the value arg, and TmpReg an unused >>register.): >> >>addDirectMem(BuildMI(BB, X86::XADD32mr, 4, >>TmpReg).addReg(TwoReg), ValReg); > > > This is the problem. Try this: > addDirectMem(BuildMI(BB, X86::XADD32mr, 4, TmpReg), ValReg).addReg(TwoReg); > > In particular, you want to...
2008 Jul 10
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...+ unsigned temp; + if (is64bit) + temp = RegInfo.createVirtualRegister(&PPC::GPRCRegClass); + else + temp = RegInfo.createVirtualRegister(&PPC::G8RCRegClass); How about? const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : &PPC:G8RCRegClass; unsigned TmpReg = RegInfo.createVirtualRegister(RC); Evan On Jul 9, 2008, at 9:16 AM, Gary Benson wrote: > Ah, didn't see that, that's what comes of trying to do something at > 5pm :) I attached an updated patch which creates a virtual register > instead of using R0. How does this look? >...
2008 Jul 10
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Evan Cheng wrote: > How about? > > const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : > &PPC:G8RCRegClass; > unsigned TmpReg = RegInfo.createVirtualRegister(RC); I tried something like that yesterday: const TargetRegisterClass *RC = is64bit ? &PPC::GPRCRegClass : &PPC::G8RCRegClass; but I kept getting this error no matter how I arranged it: error: conditional expression between distinct pointer types...
2008 Jul 10
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Just cast both values to const TargetRegisterClass*. Evan On Jul 10, 2008, at 7:36 AM, Gary Benson wrote: > Evan Cheng wrote: >> How about? >> >> const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : >> &PPC:G8RCRegClass; >> unsigned TmpReg = RegInfo.createVirtualRegister(RC); > > I tried something like that yesterday: > > const TargetRegisterClass *RC = > is64bit ? &PPC::GPRCRegClass : &PPC::G8RCRegClass; > > but I kept getting this error no matter how I arranged it: > > error: conditional expr...
2008 Jul 10
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...isterClass*. > > Evan > > On Jul 10, 2008, at 7:36 AM, Gary Benson wrote: > > Evan Cheng wrote: > > > How about? > > > > > > const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : > > > &PPC:G8RCRegClass; > > > unsigned TmpReg = RegInfo.createVirtualRegister(RC); > > > > I tried something like that yesterday: > > > > const TargetRegisterClass *RC = > > is64bit ? &PPC::GPRCRegClass : &PPC::G8RCRegClass; > > > > but I kept getting this error no matter how I arranged it:...
2008 Jul 11
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...gt; Evan >> >> On Jul 10, 2008, at 7:36 AM, Gary Benson wrote: >>> Evan Cheng wrote: >>>> How about? >>>> >>>> const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : >>>> &PPC:G8RCRegClass; >>>> unsigned TmpReg = RegInfo.createVirtualRegister(RC); >>> >>> I tried something like that yesterday: >>> >>> const TargetRegisterClass *RC = >>> is64bit ? &PPC::GPRCRegClass : &PPC::G8RCRegClass; >>> >>> but I kept getting this error no matter...
2011 Nov 14
3
max & min values within dataframe
dear R-team I need to find the min, max values for each patient from dataset and keep the output of it as a dataframe with the following columns - Patient nr - Region (remains same per patient) - Min score - Max score Patient Region Score Time 1 1 X 19 28 2 1 X 20 126 3 1 X 22 100 4 1 X 25 191 5 2 Y 12 1
2008 Jul 11
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...BB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB); + F->insert(It, loopMBB); + F->insert(It, exitMBB); + exitMBB->transferSuccessors(BB); + + MachineRegisterInfo &RegInfo = F->getRegInfo(); + unsigned TmpReg = RegInfo.createVirtualRegister( + is64bit ? (const TargetRegisterClass *) &PPC::GPRCRegClass : + (const TargetRegisterClass *) &PPC::G8RCRegClass); + + // thisMBB: + // ... + // fallthrough --> loopMBB + BB->addSuccessor(loopMBB); + + // loopM...
2015 Sep 24
0
[PATCH] com32/disk: add UEFI support
...* - * @v inreg CPU register settings upon INT call - * @v outreg CPU register settings returned by INT call - * @ret (int) 0 upon success, -1 upon failure - */ -int disk_int13_retry(const com32sys_t * inreg, com32sys_t * outreg) -{ - int retry = 6; /* Number of retries */ - com32sys_t tmpregs; - - if (!outreg) - outreg = &tmpregs; - - while (retry--) { - __intcall(0x13, inreg, outreg); - if (!(outreg->eflags.l & EFLAGS_CF)) - return 0; /* CF=0, OK */ - } - - return -1; /* Error */ -} - -/** - * Query disk parameters and EBIOS availability for a particular...
2008 Jul 09
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Ah, didn't see that, that's what comes of trying to do something at 5pm :) I attached an updated patch which creates a virtual register instead of using R0. How does this look? Cheers, Gary Dan Gohman wrote: > PPCTargetLowering::EmitInstrWithCustomInserter has a reference > to the current MachineFunction for other purposes. Can you use > MachineFunction::getRegInfo instead?
2007 Apr 18
8
[PATCH 0/7] x86 paravirtualization infrastructure
The following patches introduce the core infrastructure needed to paravirtualize the 32-bit x86 Linux kernel. This is done by moving virtualization sensitive insn's or code paths to a function table, paravirt_ops. This structure can be populated with hypervisor specific calls or native stubs and currently support running on bare metal, VMI, Xen, or Lhype. These patches apply to
2007 Apr 18
8
[PATCH 0/7] x86 paravirtualization infrastructure
The following patches introduce the core infrastructure needed to paravirtualize the 32-bit x86 Linux kernel. This is done by moving virtualization sensitive insn's or code paths to a function table, paravirt_ops. This structure can be populated with hypervisor specific calls or native stubs and currently support running on bare metal, VMI, Xen, or Lhype. These patches apply to
2012 Aug 20
13
[PATCH 00/12] Multidisk support
Hello, the following patches should get multidisk access working. The syntax accepted is the following: (hdx,y)/path/to/file where x is the disk number and start at 0 and the y is the partition number starting at 1. So (hd0,1) is the first partition of the first disk. the other accepted syntax is using MBR's 32 bits disk signature so for example: (mbr:0x12345678,2)/foo/bar would address
2007 Apr 18
43
[RFC PATCH 00/35] Xen i386 paravirtualization support
Unlike full virtualization in which the virtual machine provides the same platform interface as running natively on the hardware, paravirtualization requires modification to the guest operating system to work with the platform interface provided by the hypervisor. Xen was designed with performance in mind. Calls to the hypervisor are minimized, batched if necessary, and non-critical codepaths
2007 Apr 18
43
[RFC PATCH 00/35] Xen i386 paravirtualization support
Unlike full virtualization in which the virtual machine provides the same platform interface as running natively on the hardware, paravirtualization requires modification to the guest operating system to work with the platform interface provided by the hypervisor. Xen was designed with performance in mind. Calls to the hypervisor are minimized, batched if necessary, and non-critical codepaths
2007 Apr 18
33
[RFC PATCH 00/33] Xen i386 paravirtualization support
Unlike full virtualization in which the virtual machine provides the same platform interface as running natively on the hardware, paravirtualization requires modification to the guest operating system to work with the platform interface provided by the hypervisor. Xen was designed with performance in mind. Calls to the hypervisor are minimized, batched if necessary, and non-critical codepaths