search for: test32rm

...s target uses variable length instructions and a laborious hierarchy of tblgen AsmOperands to do the job. Assembly and disassembly with llvm-mc and llvm-objdump work fine. As a simplification, the compiler deals almost exclusively in pseudo instructions. By x86 analogy, using pseudos to unfold a TEST32rm into MOV32rm + TEST32rr means I can skip the complex operand fitting effort needed to pick specific machine instructions. There are many such examples where handling real instructions would become a gross overload. One drawback of this approach is that the integrated assembler receives only unexp...

...t, MRMSrcReg>; def TEST64rr : BinOpRR_F<0x84, "test", Xi64, X86testpat, MRMSrcReg>; } // isCommutable def TEST8rm : BinOpRM_F<0x84, "test", Xi8 , X86testpat>; def TEST16rm : BinOpRM_F<0x84, "test", Xi16, X86testpat>; def TEST32rm : BinOpRM_F<0x84, "test", Xi32, X86testpat>; def TEST64rm : BinOpRM_F<0x84, "test", Xi64, X86testpat>; def TEST8ri : BinOpRI_F<0xF6, "test", Xi8 , X86testpat, MRM0r>; def TEST16ri : BinOpRI_F<0xF6, "test", Xi16, X86t...

On Tue, Mar 17, 2015 at 6:14 PM, Tim Northover <t.p.northover at gmail.com> wrote: >> As a simplification, the compiler deals almost exclusively in pseudo >> instructions. By x86 analogy, using pseudos to unfold a TEST32rm into >> MOV32rm + TEST32rr means I can skip the complex operand fitting effort >> needed to pick specific machine instructions. There are many such >> examples where handling real instructions would become a gross >> overload. >> >> One drawback of this approach...