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store32p
2014 Mar 19
2
[LLVMdev] Type inference on registers with can contain multiple types
...ore
floating-point values. So each register can store either an int or an
IEEE float. I define a register class like this:
def GR32 : RegisterClass<"MyArch", [i32, f32], 32,
(sequence "R%u", 0, 32)>;
So far so good. However, when I write a rule to store a register:
def STORE32r : S32<
(outs), (ins GR32:$rS, GR32:$rD),
"st {$rS, ($rD)}",
[(store GR32:$rS, (iPTR GR32:$rD))]>;
...then I get the dreaded 'cannot infer all types in pattern' error.
This is presumably because tablegen can't tell whether the input is an
i32 or a f32.
What's the...