Displaying 2 results from an estimated 2 matches for "store32p".
2009 Apr 22
2
[LLVMdev] Def/Kill flags for subregisters
...t; = LOAD32imm <ga:i56_s>
%reg1028D<def> = SRLd %reg1025D, 16
%reg1029D16L<def> = EXTRACT_SUBREG %reg1026D, 1
%reg1030P<def> = ADDimm7 %reg1027P, 4
STORE16pi %reg1029D16L, %reg1030P, Mem:ST(2,4) [i56_s + 4]
STORE8p_imm16 %reg1028D, %reg1027P, 6, Mem:ST(1,2) [i56_s + 6]
STORE32p %reg1024D, %reg1027P, Mem:ST(4,4) [i56_s + 0]
RTS %RETS<imp-use>
So far so good. After coalescing and allocating registers, I have this
code:
Live Ins: %R0 %R1
%P0<def> = LOAD32imm <ga:i56_s>
%R2<def> = MOVE %R1<kill>
%R2<def> = SRLd %R2, 16
%P1<def&g...
2009 Apr 22
0
[LLVMdev] Def/Kill flags for subregisters
...;
> %reg1028D<def> = SRLd %reg1025D, 16
> %reg1029D16L<def> = EXTRACT_SUBREG %reg1026D, 1
> %reg1030P<def> = ADDimm7 %reg1027P, 4
> STORE16pi %reg1029D16L, %reg1030P, Mem:ST(2,4) [i56_s + 4]
> STORE8p_imm16 %reg1028D, %reg1027P, 6, Mem:ST(1,2) [i56_s + 6]
> STORE32p %reg1024D, %reg1027P, Mem:ST(4,4) [i56_s + 0]
> RTS %RETS<imp-use>
>
> So far so good. After coalescing and allocating registers, I have this
> code:
>
> Live Ins: %R0 %R1
> %P0<def> = LOAD32imm <ga:i56_s>
> %R2<def> = MOVE %R1<kill>
> %R...