Displaying 20 results from an estimated 486 matches for "sergei".
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sergey
2006 Dec 05
1
vorbis-tools-1.1.1 build mechanism stubbornly refuses to build with FLAC, ogg123, speex
...builds and install everything locally, and, of
course, it uses the available mechanisms to specify search paths for both headers
and libraries; the tool first builds dependencies abd then the target itself.
So, for example, 'configure' for vorbis-tools-1.1.1 is rub this way:
cd /maxtor5/sergei/AppsFromScratchWD/build/vorbis-tools-1.1.1;
PATH=/maxtor5/sergei/AppsFromScratchWD/install/curl-7.15.5/bin:/maxtor5/sergei/AppsFromScratchWD/install/flac-1.1.2/bin:/maxtor5/sergei/AppsFromScratchWD/install/gnutls-1.4.5/bin:/maxtor5/sergei/AppsFromScratchWD/install/libgcrypt-1.2.3/bin:/maxtor5/serge...
2007 Nov 25
1
vorbis-tools-1.1.1 build fails during linking
Hello All,
even though 'configure' for vorbis-tools-1.1.1 is OK 'make' fails - please see
the command line and error messages below.
Aby ideas why this happens ?
Thanks,
Sergei.
The failing command line and error messages:
99 gcc -O20 -ffast-math -fsigned-char -o oggenc oggenc.o audio.o encode.o platform.o
resample.o -L/maxtor5/sergei/AppsFromScratchWD/install/curl-7.15.5/lib
-L/maxtor5/sergei/AppsFromScratchWD/install/flac-1.2.1/lib
-L/maxtor5/sergei/AppsFromScra...
2016 Feb 12
3
CloneFunction during LTO leads to seg fault?
In general I use DebugInfoFinder and clear out Metadata if GV in null or GV->isDeclaration().
If there is any interest, I can post that patch...
Sergei
---
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
> -----Original Message-----
> From: Tobias Edler von Koch [mailto:tobias at codeaurora.org]
> Sent: Friday, February 12, 2016 9:51 AM
> To: Mehdi Amini; Scott A. Carr
> Cc: llvm-d...
2014 Jun 13
2
[LLVMdev] Looking for a fix to memory leak in DWARF support
...representation or incorrect debug info? If debug info for LTO is known to be non-useful or ambiguous or flat wrong - there is no point in fixing its emission... or will it still be practical and if I manage to improve it somewhat the customer will still have some value-add by using it?
Thanks...
Sergei
---
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
> -----Original Message-----
> From: Eric Christopher [mailto:echristo at gmail.com]
> Sent: Friday, June 13, 2014 4:32 PM
> To: Sergei Larin
> Cc: David Blaikie; LLVM Developers...
2014 Jun 13
2
[LLVMdev] Looking for a fix to memory leak in DWARF support
...rogram). I must admit, it is a rather large application as well, so as expected, any inefficiencies are multiplied greatly.
>From little that I have seen so far, it looks like debug metadata for an IR object linger behind once the object itself is eliminated (optimized). Rings a bell?
Thanks.
Sergei
---
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
> -----Original Message-----
> From: Eric Christopher [mailto:echristo at gmail.com]
> Sent: Friday, June 13, 2014 4:00 PM
> To: Sergei Larin
> Cc: David Blaikie; LLVM Developers...
2014 Jun 13
4
[LLVMdev] Looking for a fix to memory leak in DWARF support
...but no clear proof yet. I was hoping it was an obvious thing since I recall a discussion about it a while ago... but maybe I am just confused.
Was your work for compressing DWARF data motivated by a certain inefficiency in debug info representation? Did it result in significant savings?
Thanks.
Sergei
---
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
> -----Original Message-----
> From: David Blaikie [mailto:dblaikie at gmail.com]
> Sent: Friday, June 13, 2014 12:41 PM
> To: Sergei Larin
> Cc: LLVM Developers Mailing List
>...
2012 Mar 29
2
[LLVMdev] VLIWPacketizerList: failing to schedule terminators
On Thu, Mar 29, 2012 at 01:50:58PM -0500, Sergei Larin wrote:
> Tom,
>
> What is in your isSchedulingBoundary? If it contains isLabel you might
> need to disable that assert:
>
> assert(!MI->isTerminator() && !MI->isLabel() &&
> "Cannot schedule terminators or labels!");
>
&...
2013 Jan 29
1
[LLVMdev] Apparent indeterminism in PreVerifier
Is there a test case that you can share ?
On Jan 29, 2013, at 9:24 AM, Sergei Larin <slarin at codeaurora.org> wrote:
> Nadav,
>
> Thanks for the quick response. By now I am convinced that the given loop
> ends up vectorized with enough difference to cause bad things later on, but
> I have not found the exact cause yet. To continue with my work I'...
2012 Aug 10
2
[LLVMdev] VLIW code generation for LLVM backend
On Aug 9, 2012, at 10:09 AM, Sergei Larin <slarin at codeaurora.org> wrote:
> Yang,
>
> This might not be such a tough choice on engineering side - one of the
> LLVM differentiators is the ground-up, early introduced support for VLIW
> specific features…
Actually, LLVM lacked support for VLIW until fairly rec...
2013 Jan 29
2
[LLVMdev] Apparent indeterminism in PreVerifier
Hi Sergei,
"addRuntimeCheck" inserts code that checks that two or more arrays are disjoint. I looked at the code and it looks fine. We generate PHIs in the order that they appear in a vector. The values are inserted in 'canVectorizeMemory', which also looks fine. Please let me know if you...
2012 Aug 10
2
[LLVMdev] MI bundle liveness attributes
Hi Sergei. If an instruction conditionally writes R0 then I think it needs to implicitly use R0 for proper liveness
Andy
On Aug 9, 2012, at 9:48 AM, Sergei Larin <slarin at codeaurora.org> wrote:
>
> Hello everyone,
>
> Let me (re)present a question that might have previously been di...
2012 Mar 29
0
[LLVMdev] VLIWPacketizerList: failing to schedule terminators
...arget hooks. isSchedulingBoundary is one of them. Also try to
disable that assert and see what happens. It sounds strange, but in some
cases that assert is overly restrictive.
Andy,
Those are just my guesses, but the issue looks very similar to our first
experience with sched DAG constructor.
Sergei
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
> -----Original Message-----
> From: Tom Stellard [mailto:thomas.stellard at amd.com]
> Sent: Thursday, March 29, 2012 2:23 PM
> To: Sergei Larin
> Cc: 'Anshuman Dasgupta'; llvmdev at cs.uiuc.edu
> Su...
2011 Nov 14
2
[LLVMdev] alias analysis in ScheduleDagInstr class
Hi Sergei, thanks for considering my question. We if-convert some code, such that the basic block looks as follows after if-conversion:
ld char from A into R1
p1 = R1>255? (generate the predicate)
p1 | R1 = 255 (conditional execution)
st char R1 to A
ld char from A+1 into R2
p2 = R2>255? (generate t...
2013 Jan 29
0
[LLVMdev] Apparent indeterminism in PreVerifier
...ference to cause bad things later on, but
I have not found the exact cause yet. To continue with my work I'll have to
simply turn off vectorization for now, but I will come back and investigate.
Again, there is some indeterminism in order of PHIs processing somewhere.
I'll keep you posted.
Sergei
---
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
The Linux Foundation
> -----Original Message-----
> From: Nadav Rotem [mailto:nrotem at apple.com]
> Sent: Tuesday, January 29, 2013 11:15 AM
> To: Sergei Larin
> Cc: llvmdev at cs.uiuc.edu
> Subje...
2012 Aug 31
2
[LLVMdev] Assert in LiveInterval update
...I != UE; UI.skipInstruction()) {}
Aren't we currently dealing with units, not registers ?
SlotIndex LastUse = findLastUseBefore(LI->reg, OldIdx);
.and isn't MRI.use_nodbg_begin(Reg) expects a register, not a unit? .or did
I got it wrong again. Sorry to bug you on this.
Sergei
---
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
The Linux Foundation
From: Lang Hames [mailto:lhames at gmail.com]
Sent: Thursday, August 30, 2012 3:17 PM
To: Sergei Larin
Cc: Andrew Trick; LLVM Developers Mailing List
Subject: Re: [LLVMdev] Assert in Live...
2012 Aug 13
0
[LLVMdev] MI bundle liveness attributes
...his is what Arnold has suggested also, and from this point it looks
like it should work, but it will require parsing the bundle every time we
care to know whether this is a real use or a conditional def. This might
become awkward... but I guess I should provide a better use case to prove my
point.
Sergei
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
> -----Original Message-----
> From: Andrew Trick [mailto:atrick at apple.com]
> Sent: Thursday, August 09, 2012 7:09 PM
> To: Sergei Larin
> Cc: LLVM Developers Mailing List; Jakob Stoklund Olesen
> Subject:...
2012 Jun 08
3
[LLVMdev] Instruction bundles before RA: Rematerialization
Hi Sergei, Jakob,
Thanks for your comments !
On 07/06/2012 20:41, Sergei Larin wrote:
>
> Jakob,
>
> Please see my comments below. Hope this helps.
>
> Sergei
>
> --
>
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
>
> *From:*Jakob Stoklund Olesen...
2011 Nov 30
0
[LLVMdev] [llvm-commits] Bottom-Up Scheduling?
...uler design for my target
would be unwise until such discussion would take place. I also do not
separate this process from bundle/packet representation. If you perceive an
overhead associated with this activity, I could volunteer to help.
Also, please see my comments embedded below.
Thanks.
Sergei Larin
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
> -----Original Message-----
> From: Andrew Trick [mailto:atrick at apple.com]
> Sent: Tuesday, November 29, 2011 3:16 PM
> To: Sergei Larin
> Cc: 'Hal Finkel'; llvmdev at cs.uiuc.edu
> Subject:...
2012 Aug 13
0
[LLVMdev] VLIW code generation for LLVM backend
But we are really striving to change it fast :)
Dan,
My comparative point was that LLVM has a greater potential to accommodate
VLIW going forward than GCC does at this point.
Would you agree to that?
Sergei
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
> -----Original Message-----
> From: Dan Gohman [mailto:gohman at apple.com]
> Sent: Friday, August 10, 2012 12:30 PM
> To: Sergei Larin
> Cc: 'Triple Yang'; llvmdev at cs.uiuc.edu
> Subject: Re: [LLV...
2012 Aug 31
0
[LLVMdev] Assert in LiveInterval update
...t = LIS.getSlotIndexes()->getInstructionIndex(MI);
if (InstSlot > LastUse && InstSlot < OldIdx)
LastUse = InstSlot;
}
}
return LastUse;
}
This is not a patch, more like thinking aloud. If this does not make sense,
please let me know.
Sergei
---
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
The Linux Foundation
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On
Behalf Of Sergei Larin
Sent: Friday, August 31, 2012 11:53 AM
To: 'Lang Hames'
Cc: 'LLVM Develop...