search for: scavenging

...p. Maybe I'm misunderstanding this code. // If the target knows how to save/restore the register, let it do so; // otherwise, use the emergency stack spill slot. if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { // Spill the scavenged register before I. assert(ScavengingFrameIndex >= 0 && "Cannot scavenge register without an emergency spill slot!"); TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC,TRI); MachineBasicBlock::iterator II = prior(I); TRI->eliminateFrameIndex(II, SPAdj, this);...

Hello everybody, I try to install samba on ubuntu server 13.04 So I downloaded the 4.0.9 version of samba but when the make I get this error: ../source3/smbd/scavenger.c : In function 'scavenger_timer' : ../source3/smbd/scavenger.c: 482:3 : error : format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'uint64_t' [-Werror=format]

I read the 4.9 “Features added" release notes about newly available DNS scavenging features, and the problem with domains that were set up in earlier versions of samba AD. "It is now possible to enable scavenging of DNS Zones to remove DNS records that were dynamically created and have not been touched in some time.” “This support should however only be enabled on new zone...

Hi there, I tried to build samba 4.0.9 on a Debian Wheezy 7.1 x86 fresh install and got this error: [2717/3935] Compiling source3/smbd/scavenger.c ../source3/smbd/scavenger.c: In function ?scavenger_timer?: ../source3/smbd/scavenger.c:482:3: error: format ?%lu? expects argument of type ?long unsigned int?, but argument 3 has type ?uint64_t? [-Werror=format] ../source3/smbd/scavenger.c:490:3:

...erstanding this code. > > // If the target knows how to save/restore the register, let it do so; > // otherwise, use the emergency stack spill slot. > if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { > // Spill the scavenged register before I. > assert(ScavengingFrameIndex >= 0 && > "Cannot scavenge register without an emergency spill slot!"); > TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, > RC,TRI); > MachineBasicBlock::iterator II = prior(I); > TRI->eliminateFrameIndex...

You mean when I "explicity" use it by calling methods of register scavenger? Right now I'm just allocating virtual registers that will be resolved by the use of register scavenger and I'm also providing an override of the virtual method saveScavengerRegister. In Mips16, I have an extra mips 32 register (not usually very useful since it can only be used in a move instruction)

s/llvm-commits/llvmdev/ On Dec 9, 2011, at 12:58 PM, Arnold Schwaighofer wrote: > >> As Jakob pointed out to me, the core problem is that the current >> register scavenger implementation will only give you one register; for >> the PowerPC case, and it looks like for your case as well, we might >> really need two registers. In the short term, a reasonable solution

I ran into another issue with register scavenger. In my case, I don't need a place on the stack for an emergency spill slot. I have these free mips32 registers, that are not in general very useful for other things, for the emergency spill slot. I can move to and from mips16 (subset of mips32) registers and mips32 registers. I also have a situation where I need two free registers so then

CC the list. On Sat, Nov 10, 2012 at 6:30 PM, Arnold Schwaighofer <arnold.schwaighofer at gmail.com> wrote: > Assuming you use the scavenger in your own code yes. > > A usage could look like: > > for all basic blocks BB: > RS->enter(BB) > for all instructions CurrInst in block order: > if CurrInst has virtual def > CurrReg = RS->scavenge(CurrInst)

Hi Jakob, I believe Hal is trying to enable register scavenger to find two (or more) registers that can be used as temporaries. One problem I see with this approach is that, if you use register scavenger during PEI, you will have to pessimistically set aside two emergency spill slots before you call scavengeRegister, even if it turns out you only need one. Having an extra stack slot might not be

Thanks Jon and Hal for the helpful pointers. By returning true from requiresRegisterScavenging() and requiresFrameIndexScavenging(), LLVM handled all the scavenging effort. That is nearly painless for the target, so why do some targets seem to do scavenging on their own? When the scavenged register is loaded with a simple immediate, is it safe to search the BB and replace other uses of the...

Hi, I would like to know what register scavenging is, but reading RegisterScavenging.h [1] and googling don't help too much. Could someone explain it a little bit (what it is and when we need it), or point me to some nice link, I will be very appreciated. :-) [1] http://llvm.org/docs/doxygen/html/RegisterScavenging_8h_source.html Regards, ch...

This patch adds parameter "EliminateFI" to RegScavenger::scavengeRegister, which tells register scavenger not to eliminate frame index of the emergency spill slot if set to false. I have pseudo load, store and copy instructions which are generated during register allocation and expanded post-RA but before the final stack size is known. I use register scavenger to search for a temporary

On Mar 25, 2013, at 12:04 PM, Akira Hatanaka <ahatanak at gmail.com> wrote: > This patch adds parameter "EliminateFI" to RegScavenger::scavengeRegister, which tells register scavenger not to eliminate frame index of the emergency spill slot if set to false. > > I have pseudo load, store and copy instructions which are generated during register allocation and expanded

Hi, attached is a second try for the bigstack patch for SPU, with testcase. It is essentially the patch committed as 97091, and reverted as 97099, but with the following additions: -in vararg handling, registers are marked to be live, to not confuse the register scavenger -function prologue and epilogue are not emitted, if the stack size is 16. 16 means it is empty - there is only the

...register class. This will use cross-class spilling in most cases, but unfortunately we can't guarantee that an ACRegs virtual register will never be spilled. This just makes it much less likely to happen. Targets are still required to be able to spill all legal register classes. Instead of scavenging for registers during pseudo-expansion, I would like to make it possible to create new virtual registers during spilling. The plan is to give TII::storeRegToStackSlot() permission to: - Insert multiple instructions at the provided iterator, and - Create new virtual registers, possibly from differe...

...cavenger for MIPS to free up register AT which is currently reserved to load large immediates. All targets which currently use register scavenger to search for a scratch register (ARM, CellSPU, PowerPC and XCore) override function processFunctionBeforeCalleeSavedScan and call RegisterScavenger::setScavengingFrameIndex if they decide an emergency spill slot is needed. Since processFunctionBeforeCalleeSavedScan is called before it is known which callee-saved registers need to be spilled, the targets decide whether the spill slot is needed without knowing the exact stack frame size. It seems to me that i...

Hi! I have some problems with spill/reload and register scavenging which result in illegal code. As our apps, compiled by LLVM and our backend, become more and more complex we have the following problem with our backend: In most cases registers are spilled on function entry to stack slots and reloaded on function exit. At some points registers are spilled and rel...

Red Hat Enterprise Linux Server release 5.4 (Tikanga) Samba 3.0.33-3.15.el5_4.1 I have run into an issue where the DNS records added by a net ads join seem to be being scavenged. From what I understand, Windows servers/workstations check in (update their host record) on the AD DNS server on a regular basis. So the question is, how can I have samba/winbind do the same? I could just setup a cron

On Feb 28, 2010, at 11:49 PM, <Kalle.Raiskila at nokia.com> <Kalle.Raiskila at nokia.com> wrote: > Jakob Stoklund Olesen skrev: >> On Feb 26, 2010, at 10:09 AM, Scott Michel wrote: >>> This patch now causes new problems in the CellSPU >>> backend (more stqd's and lqd's), so I have to investigate those >>> before committing the patch. >