Displaying 8 results from an estimated 8 matches for "sarevokcc".
2011 Mar 15
2
[LLVMdev] How to choose targets to build in CMake?
Hi all,
I understand from the document that I should be able to configure llvm with
only specific targets
by passing -DLLVM_TARGETS_TO_BUILD=some-backend to cmake.
However, I get the following errors whenever I don't include X86 in the
target list:
CMake Error at cmake/modules/LLVMConfig.cmake:127 (message):
Library `X86' not found in list of llvm libraries.
Call Stack (most recent
2011 Mar 15
0
[LLVMdev] How to choose targets to build in CMake?
On Tue, Mar 15, 2011 at 6:34 PM, Dongrui She <sarevokcc at gmail.com> wrote:
> However, I get the following errors whenever I don't include X86 in the
> target list:
on top of trunk, it seems cmake requires at least "native" (for yours,
X86) target.
(I reconfirmed with -DLLVM_TARGETS_TO_BUILD=ARM on x86)
For workaround, you have...
2010 Jul 06
0
[LLVMdev] Question on the use of TableGen
Hi all,
I'm trying to create a new backend for a processor, and I start with
modifying the existing backends like MIPS and Microblaze.
I have a problem when I try to add a register class in the Target's register
description, it looks like this:
def IGPRegs : RegisterClass<"MBlaze", [v8i16], 128, [PR0, PR1, PR2, PR3]>;
// PR0 - PR3 are registers defined before
I want to
2010 Jul 26
1
[LLVMdev] How to specify patterns for instructions with accumulator in selection DAG?
Hi,
I am wondering how to specify the selection DAG patterns for instructions
that use accumulator.
For example multiply-accumulate instruction with one destination operand and
two source operands:
mac $dst, $src1, $src2 ;; $dst += $src1*$src2
Seems that it has a cycle in the pattern. So how do I specify it in the DAG?
There are a few instructions in the ARM backend like this one, but the
2010 Sep 20
1
[LLVMdev] Is it possible to have multiple stacks in the backend?
Hi all,
I'm developing a backend for a custom architecture.
The target architecture has different memory for different data types(vector
and scalar).
So is it possible to maintain two different stacks, one for vector and the
other for scalar?
----
Regards,
Dongrui She
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2011 Mar 21
1
[LLVMdev] How to get register liveness information for each MachineBasicBlock
Hi all,
I try to print the live-in and live-out registers for each basic block in a
backend for my own target.
And I can get a list of live-in registers directly in MachineBasicBlock.
Is there a quick way to also get the list of live-out registers without
redoing the analysis. I think
this information is computed and stored somewhere.
--
Regards,
Dongrui
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2013 Jan 07
0
[LLVMdev] Generating unusual instruction
Hi,
Have you try to directly describe such patterns in tblgen file? Like this:
(brcond (i32 (cond_op RC:$rs, RC:$rt)), bb:$offset)
MIPS backend does that. I also do this in my own backend, and seem to be
working fine.
On Mon, Jan 7, 2013 at 11:55 AM, Vikram Singh <vsp1729 at gmail.com> wrote:
> I have seen that most of the targets do comparison and branching
> in two separate
2013 Mar 18
0
[LLVMdev] Install LLVM CMake modules
Hi All,
I have a system running Linux x86_64. And I have the latest LLVM from the
repo compiled and installed using CMake (2.8.10.2).
In one of my projects, I need the LLVM libraries. So I use CMake to
configure the compiler and linker flags ( Find_Package(LLVM Required) ).
CMake is complaining about missing LLVM-Config when some users try to
compile the project. I looked at the