search for: regmasks

...i <mehdi.amini at apple.com> wrote: > > > On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> > wrote: > > > > Hello Mentors, > > > > I have completed writing simple register mask calculator pass, an > immutable pass that stores RegMasks and provides API to query them, and a > target specific pass for X86 target which currently iterates through all MI > in given MF and if a call instruction is found then it quires for RegMask > to Immutable pass and prints which registers are clobbered and preserved as > per actual regi...

Hello Mentors, I have completed writing simple register mask calculator pass, an immutable pass that stores RegMasks and provides API to query them, and a target specific pass for X86 target which currently iterates through all MI in given MF and if a call instruction is found then it quires for RegMask to Immutable pass and prints which registers are clobbered and preserved as per actual register allocation for...

...rote: > >> >> > On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> >> wrote: >> > >> > Hello Mentors, >> > >> > I have completed writing simple register mask calculator pass, an >> immutable pass that stores RegMasks and provides API to query them, and a >> target specific pass for X86 target which currently iterates through all MI >> in given MF and if a call instruction is found then it quires for RegMask >> to Immutable pass and prints which registers are clobbered and preserved as >>...

...te: >>> >>> > On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> wrote: >>> > >>> > Hello Mentors, >>> > >>> > I have completed writing simple register mask calculator pass, an immutable pass that stores RegMasks and provides API to query them, and a target specific pass for X86 target which currently iterates through all MI in given MF and if a call instruction is found then it quires for RegMask to Immutable pass and prints which registers are clobbered and preserved as per actual register allocation for...

...gt; wrote: > > > On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com <mailto:vivekvpandya at gmail.com>> wrote: > > > > Hello Mentors, > > > > I have completed writing simple register mask calculator pass, an immutable pass that stores RegMasks and provides API to query them, and a target specific pass for X86 target which currently iterates through all MI in given MF and if a call instruction is found then it quires for RegMask to Immutable pass and prints which registers are clobbered and preserved as per actual register allocation for...

> On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> wrote: > > Hello Mentors, > > I have completed writing simple register mask calculator pass, an immutable pass that stores RegMasks and provides API to query them, and a target specific pass for X86 target which currently iterates through all MI in given MF and if a call instruction is found then it quires for RegMask to Immutable pass and prints which registers are clobbered and preserved as per actual register allocation for...

...> > On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> >>> wrote: >>> > >>> > Hello Mentors, >>> > >>> > I have completed writing simple register mask calculator pass, an >>> immutable pass that stores RegMasks and provides API to query them, and a >>> target specific pass for X86 target which currently iterates through all MI >>> in given MF and if a call instruction is found then it quires for RegMask >>> to Immutable pass and prints which registers are clobbered and preserved...

...gt; On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> wrote: >>>>> > >>>>> > Hello Mentors, >>>>> > >>>>> > I have completed writing simple register mask calculator pass, an immutable pass that stores RegMasks and provides API to query them, and a target specific pass for X86 target which currently iterates through all MI in given MF and if a call instruction is found then it quires for RegMask to Immutable pass and prints which registers are clobbered and preserved as per actual register allocation for...

...;> > On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com <mailto:vivekvpandya at gmail.com>> wrote: >> > >> > Hello Mentors, >> > >> > I have completed writing simple register mask calculator pass, an immutable pass that stores RegMasks and provides API to query them, and a target specific pass for X86 target which currently iterates through all MI in given MF and if a call instruction is found then it quires for RegMask to Immutable pass and prints which registers are clobbered and preserved as per actual register allocation for...

...6, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> >>>> wrote: >>>> > >>>> > Hello Mentors, >>>> > >>>> > I have completed writing simple register mask calculator pass, an >>>> immutable pass that stores RegMasks and provides API to query them, and a >>>> target specific pass for X86 target which currently iterates through all MI >>>> in given MF and if a call instruction is found then it quires for RegMask >>>> to Immutable pass and prints which registers are clobbered a...

Hello Clang and LLVM Devs, I have been working to add support for an attribute in clang and LLVM that helps user to guide interprocedural register allocation. But the use case I am having is very limited and thus I belieave it is good to have discussion on this before sending a patch. So for IPRA we have a situation where a function is calling a function which is written in assembly and it is

...: Re: [llvm-dev] RFC: Dynamically Allocated "Callee Saved Registers" Lists Hi Ben, On Jan 11, 2017, at 11:26 PM, Ben Simhon, Oren <oren.ben.simhon at intel.com<mailto:oren.ben.simhon at intel.com>> wrote: Hi Mehdi, It is true that both IPRA and the proposed mechanism save RegMasks. So you might say that the data structure in the immutable pass should be reused, This is not exactly what I’m saying, let me clarify: I’m saying if the two high-level features needs the same underlying feature (dynamic regmask), then the underlying feature should be shared (unless there is a good...

...ime comes from the different layout of >>> the function in the asm file? (I.e., because of the dummy scc pass.) >>> >>> Hello Quentin, >> >> Please do not consider previous results as there was a major bug in >> RegMask calculation due to not considering RegMasks of callee in MF body >> while calculating register usage information, that has been fixed now ( as >> discussed with Matthias Braun and Mehdi Amini ) and after this bugfix I >> have run test-suite with and without IPRA. Yes there is runtime slow down >> for some test cases...

...: Re: [llvm-dev] RFC: Dynamically Allocated "Callee Saved Registers" Lists Hi Ben, On Jan 11, 2017, at 11:26 PM, Ben Simhon, Oren <oren.ben.simhon at intel.com<mailto:oren.ben.simhon at intel.com>> wrote: Hi Mehdi, It is true that both IPRA and the proposed mechanism save RegMasks. So you might say that the data structure in the immutable pass should be reused, This is not exactly what I’m saying, let me clarify: I’m saying if the two high-level features needs the same underlying feature (dynamic regmask), then the underlying feature should be shared (unless there is a good...

After PrologEpilogCodeInserter I found that the instructions that restore callee saved registers S0,S1,LR are in the wrong location ,the instructions are: %S0<def> = LD %SP, 36; mem:LD4[FixedStack2] %S1<def> = LD %SP, 40; mem:LD4[FixedStack1] %LR<def> = LD %SP, 44; mem:LD4[FixedStack0] (LR is the Return address register) the whole code of print-machineinstrs are: # After

...Vivek, > > How much of the slow down on runtime comes from the different layout of > the function in the asm file? (I.e., because of the dummy scc pass.) > > Hello Quentin, Please do not consider previous results as there was a major bug in RegMask calculation due to not considering RegMasks of callee in MF body while calculating register usage information, that has been fixed now ( as discussed with Matthias Braun and Mehdi Amini ) and after this bugfix I have run test-suite with and without IPRA. Yes there is runtime slow down for some test cases ranging from 1% to 64% similarly com...

Hi Mehdi, It is true that both IPRA and the proposed mechanism save RegMasks. So you might say that the data structure in the immutable pass should be reused, but this is the only similarity. Even this similarity is not exactly true. I save register masks that doesn’t use passed/returned arguments while IPRA saves register masks for modified registers. So how can they shar...

Dear community, This is to brief you the progress of Interprocedural Register Allocation, for those who are interested to see the progress in terms of code please consider http://reviews.llvm.org/D20769 This patch contains simple infrastructure to propagate register usage information of callee to caller in call graph. The code generation order is changed to follow bottom up order on call graph ,

...In my case, this is a functional issue. The analysis must run in order to be compatible with other compilers. 2. IPRA passes are not enabled by default and when they are enabled many tests fail due to various reasons (mainly because the CallGraph bottom up approach). 3. The manipulated RegMasks generated using RegUsageInfoCollector are very different than the manipulated RegMasks that I need. It will be an abuse to change the current pass implementation. So new pass is required. 4. When dumping the MIR after running IPRA passes, assertion is raised because the RegMask name is unknow...

...>> of the function in the asm file? (I.e., because of the dummy scc pass.) >>>>> >>>>> Hello Quentin, >>>> >>>> Please do not consider previous results as there was a major bug in >>>> RegMask calculation due to not considering RegMasks of callee in MF body >>>> while calculating register usage information, that has been fixed now ( as >>>> discussed with Matthias Braun and Mehdi Amini ) and after this bugfix I >>>> have run test-suite with and without IPRA. Yes there is runtime slow down >&...