search for: rbit

Hi, On ARMv6T2 this turns cttz into rbit, clz instead of the 4 instruction sequence it is now. I'm not sure if adding RBIT to ARMISD and doing this optimization in the legalize pass is the best option, but the only better way I could think of doing it was to add a bitreverse intrinsic to llvm ir, which itself might not be the best op...

On Jan 14, 2010, at 10:13 PM, David Conrad wrote: > Hi, > > On ARMv6T2 this turns cttz into rbit, clz instead of the 4 > instruction sequence it is now. > > I'm not sure if adding RBIT to ARMISD and doing this optimization in > the legalize pass is the best option, but the only better way I > could think of doing it was to add a bitreverse intrinsic to llvm > ir,...

On Jan 15, 2010, at 10:03 AM, Chris Lattner wrote: > > When/if another target wants this, we could add a ISD::RBIT operation, > it doesn't need to be added at the llvm ir level, Blackfin can add with backwards carry, essentially doing (rbit (add (rbit a), (rbit b))) This is used for FFTs. I wasn't hoping to be able to pattern-match something so complicated.

On Fri, Jan 15, 2010 at 6:03 PM, Chris Lattner <clattner at apple.com> wrote: > > On Jan 14, 2010, at 10:13 PM, David Conrad wrote: > >> Hi, >> >> On ARMv6T2 this turns cttz into rbit, clz instead of the 4 >> instruction sequence it is now. >> >> I'm not sure if adding RBIT to ARMISD and doing this optimization in >> the legalize pass is the best option, but the only better way I >> could think of doing it was to add a bitreverse intrinsic to ll...

...at I know of that could potentially benefit from >> this optimization being global (that have a clz and bitreverse >> instruction but not ctz) are AVR32 and C64x, neither of which llvm >> has backends for yet. > > When/if another target wants this, we could add a ISD::RBIT operation, > it doesn't need to be added at the llvm ir level, The XCore also has ctlz and bitreverse instructions and not cttz. At the moment in the XCore backend cttz is marked as legal and expanded to this pair of instructions in a pattern in the InstrInfo.td. -- Richard Osborne | XM...

...-3.7.1p2/sshconnect1.c openssh-3.7.1p2-serverlieswarning/sshconnect1.c --- openssh-3.7.1p2/sshconnect1.c 2003-09-02 08:51:17.000000000 -0400 +++ openssh-3.7.1p2-serverlieswarning/sshconnect1.c 2003-11-04 02:29:50.000000000 -0500 @@ -494,7 +494,8 @@ packet_get_bignum(server_key->rsa->n); rbits = BN_num_bits(server_key->rsa->n); - if (bits != rbits) { + if (bits == rbits + 1 && ! options.server_lies_warning) { + } else if (bits != rbits) { logit("Warning: Server lies about size of server public key: " "actual size is %d bits vs. announced %d.",...

...that could potentially benefit from >>> this optimization being global (that have a clz and bitreverse >>> instruction but not ctz) are AVR32 and C64x, neither of which llvm >>> has backends for yet. >> >> When/if another target wants this, we could add a ISD::RBIT >> operation, >> it doesn't need to be added at the llvm ir level, > > The XCore also has ctlz and bitreverse instructions and not cttz. At > the moment in the XCore backend cttz is marked as legal and expanded > to this pair of instructions in a pattern in the Ins...

...y benefit from >>>> this optimization being global (that have a clz and bitreverse >>>> instruction but not ctz) are AVR32 and C64x, neither of which llvm >>>> has backends for yet. >>> >>> When/if another target wants this, we could add a ISD::RBIT >>> operation, >>> it doesn't need to be added at the llvm ir level, >> >> The XCore also has ctlz and bitreverse instructions and not cttz. At >> the moment in the XCore backend cttz is marked as legal and expanded >> to this pair of instruction...

...Thu Jul 5 10:49:28 2001 @@ -37,6 +37,7 @@ #include "packet.h" #include "mpaux.h" #include "uidswap.h" +#include "compat.h" #include "log.h" #include "readconf.h" #include "key.h" @@ -960,7 +961,8 @@ sum_len += clen; rbits = BN_num_bits(host_key->n); - if (bits != rbits) { + if (bits != rbits && + !((datafellows & SSH_BUG_SERVERLIESSIZE) && (rbits + 1 == bits))) { log("Warning: Server lies about size of server host key: " "actual size is %d bits vs. announced %d.&q...

...lini <stefano.stabellini@eu.citrix.com> --- diff -r 07a126ac0425 console.c --- a/console.c Mon Feb 16 11:39:06 2009 +0000 +++ b/console.c Mon Feb 16 12:07:19 2009 +0000 @@ -1310,6 +1310,9 @@ pf.rshift = 0; pf.gshift = 8; pf.bshift = 16; + pf.rbits = 8; + pf.gbits = 8; + pf.bbits = 8; break; case 32: pf.rmask = 0x0000FF00; @@ -1324,6 +1327,10 @@ pf.rshift = 8; pf.gshift = 16; pf.bshift = 24; + pf.rbits = 8; + pf.gbits = 8; +...

...1e5)) [1] 64 set.seed(123) max(sample(2^38, 1e5)) [1] 64 set.seed(123) max(sample(2^42, 1e5)) [1] 1024 >From the above, we see that if N is greater than 2^31, then N is bounded by (2^(ceiling(log2(N)) ? 32)). Looking at the source code to src/main/RNG.c, we have the following: static double rbits(int bits) { int_least64_t v = 0; for (int n = 0; n <= bits; n += 16) { int v1 = (int) floor(unif_rand() * 65536); v = 65536 * v + v1; } // mask out the bits in the result that are not needed return (double) (v & ((1L << bits) - 1));...

...x86, Win32 status major 1 minor 1.1 year 2000 month August day 15 language R > source("xx.r") # This is where the above code is [1] "../eps/ar.eps" [1] "../eps/ar.pdf" Error in tempfile("Rbit") : cannot find unused tempfile name > The error comes with the pdf-bit even if I interchange the two parts doing the different kinds of files. Any clues?? ---------------------- Bendix Carstensen Senior Statistician Steno Diabetes Centre Niels Steensens Vej 2 DK-2820 Gentofte Denmark...

...(1:10,1:10,main="ONE") plot(1:10,1:10,main="TWO") dev.off() the resulting file test.pdf contains four pages: graph ONE, graph TWO, graph ONE, graph TWO. I can recreate the problem with R version 1.2.1 and 1.2.2. I am using Aladdin ghostscript version 6.50. The temporary file Rbit... has the correct number of graphs in it. Furthermore, if I execute from the command line the command as constructed in 'bitmap()', using the Rbit... file as input, I get a pdf file with the correct number of graphs in it. --please do not edit the information below-- Version: platform...

...gt; plot(1:10,1:10,main="TWO") > dev.off() > > the resulting file test.pdf contains four pages: graph ONE, graph TWO, > graph ONE, graph TWO. I can recreate the problem with R version 1.2.1 and > 1.2.2. I am using Aladdin ghostscript version 6.50. The temporary file > Rbit... has the correct number of graphs in it. Furthermore, if I execute > from the command line the command as constructed in 'bitmap()', using the > Rbit... file as input, I get a pdf file with the correct number of graphs > in it. It's Windows-specific and easy to fix: repla...

...stop(paste(paste("Device ", type, "is not available"), "Available devices are", paste(gs, collapse="\n"), sep="\n")) if(missing(pointsize)) pointsize <- 1.5*min(width, height) tmp <- tempfile("Rbit") on.exit(unlink(tmp)) dev.print(device=postscript, file=tmp, width=width, height=height, pointsize=pointsize, horizontal=F, ...) psfile <- scan(tmp, what="", sep="\n", quiet=TRUE) bb <- strsplit(psfile[9], " ")[[1]] ep <...

Could everyone please test the latest snapshots as we will be making a new release soon. If you have any patches you would like us to consider, please resend them to the list ASAP. -d -- | Damien Miller <djm at mindrot.org> \ ``E-mail attachments are the poor man's | http://www.mindrot.org / distributed filesystem'' - Dan Geer

...software) into an application I''m writing. I can''t figure out, though, how to get output from capistrano when it''s used through the CLI or configuration class, however. I see that it implements a logger (Logger) and I see that starting on line 12 of the included logger.rbit has options to change the device to something that responds to put: --- start snip capistrano-1.1.0/lib/capistrano/logger.rb --- def initialize(options={}) output = options[:output] || STDERR case when output.respond_to?(:puts) @device = output else...

...lectionDAG node and a set of `llvm.bitreverse.*` intrinsics have been introduced. The intention is that backends should no longer have to reimplement similar code to match instruction patterns to their own ISA's bitreverse instruction. See also the patch to the ARM backend that replaces ARMISD::RBIT with ISD::BITREVERSE. [r252878](http://reviews.llvm.org/rL252878), [r253047](http://reviews.llvm.org/rL253047). ## Clang commits * Support for `__attribute__(internal_linkage)` was added. This is much like C's static keyword, but applies to C++ class methods. [r252648](http://reviews.llvm.or...

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