search for: r61

Displaying 20 results from an estimated 21 matches for "r61".

Did you mean: r1
2008 Aug 05
2
VMX on Lenovo R61, disabled bi BIOS ?
Hi, I''m currently trying to use a Linovo R61 Thinkpad equipped w/ Core2 Duo for HVM Virtualization. BIOS shows CPU/Virtualization->enabled. Xen 3.2.0 shows (Xeo) VMX disabled by BIOS Does someone knows any problems with R61 Thinkpads? Thanks in advance. cheers, Stephan -- Stephan Seitz Senior System Administrator *netz-hau...
2005 Mar 29
2
MeetMe flags in * 1.0.7
...rching Areski's new Web-MeetMe management gui, I found some odd (from what I expected) behaviour). Using the CLI to set un/mute status works but does not update the flags, or so it appears. Starting with a fresh conference (1 user) *CLI> meetme list 3456 User #: 1 Channel: OH323/R61 Using the CLI to mute the caller (no change in the user status0 *CLI> meetme mute 3456 1 *CLI> meetme list 3456 User #: 1 Channel: OH323/R61 Using the *-DTMF menu to mute oneself *CLI> meetme list 3456 User #: 1 Channel: OH323/R61 (Listen only) Is this the desired behaviour?...
2008 Apr 04
2
[LLVMdev] InstCombine Question
...; attached anywhere and how can I get rid of it? > > Don't do undefined behavior? :) I don't think it's undefined behavior. Right before instcombine, we have this: %r60 = load <2 x i64>* %"$LCS_1", align 16 ; <<2 x i64>> [#uses=2] ; srcLine 41 %r61 = extractelement <2 x i64> %r60, i32 0 ; <i64> [#uses=1] ; srcLine 41 %r62 = getelementptr <2 x double>* null, i32 0, i64 %r61 ; <double*> [#uses=1] ; srcLine 41 %r63 = load double* %r62 ; <double> [#uses=1] ; srcLine 41 So we're loading a vector of point...
2008 Apr 04
0
[LLVMdev] InstCombine Question
...d of it? > > > > Don't do undefined behavior? :) > > I don't think it's undefined behavior. Right before instcombine, we have > this: > > %r60 = load <2 x i64>* %"$LCS_1", align 16 ; <<2 x i64>> [#uses=2] ; > srcLine 41 > %r61 = extractelement <2 x i64> %r60, i32 0 ; <i64> [#uses=1] ; srcLine > 41 %r62 = getelementptr <2 x double>* null, i32 0, i64 %r61 ; <double*> > [#uses=1] ; srcLine 41 > %r63 = load double* %r62 ; <double> [#uses=1] ; srcLine 41 > > So we're loa...
2014 Jun 20
2
[LLVMdev] Word Addressing
Hi all, All of the data types are 32 bits and the pointer is 32 bit. Therefore, I need word adressing instead of byte adressing to use 8 GB memory. I was told that R600 uses word adressing and I looked at its codes but I could not find where the backends handles word adressing. Do you have any ideas about it? Thanks in advance. -------------- next part -------------- An HTML attachment was
2008 Apr 04
0
[LLVMdev] InstCombine Question
On Fri, 4 Apr 2008, David Greene wrote: > I am confused by this bit of code in instcombine: > > 09789 if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(Op)) { > 09790 const Value *GEPI0 = GEPI->getOperand(0); > 09791 // TODO: Consider a target hook for valid address spaces for this > xform. > 09792 if
2008 Apr 04
2
[LLVMdev] InstCombine Question
I am confused by this bit of code in instcombine: 09789 if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(Op)) { 09790 const Value *GEPI0 = GEPI->getOperand(0); 09791 // TODO: Consider a target hook for valid address spaces for this xform. 09792 if (isa<ConstantPointerNull>(GEPI0) && 09793
2010 Jun 15
0
[LLVMdev] Question on X86 backend
...[ R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, R32, R33, R34, R35, R36, R37, R38, R39, R40, R41, R42, R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57, R58, R59, R60, R61, R62, R63, R64, R65, R66, R67, R68, R69, R70, R71, R72, R73, R74, R75, R76, R77, R78, R79, R80, R81, R82, R83, R84, R85, R86, R87, R88, R89, R90, R91, R92, R93, R94, R95, R96, R97, R98, R99, R100, R101, R102, R103, R104, R105, R106, R107, R108, R109, R110, R111, R112, R113, R114, R115, R116, R1...
2010 Jun 15
2
[LLVMdev] Question on X86 backend
Hi Micah, > In X86InstrInfo.td for Call Instructions, it mentions that Uses for > argument registers are added manually. Can someone point me to the > location where they are added as the comment doesn't reference a > where or how? the register uses are added by the function X86TargetLowering::LowerCall() during the DAG Lowering phase. This is the relevant code segment:
2010 Aug 30
4
xen-linux-system-2.6.32-5-xen-amd64: Lenovo R61, kernel boots on baremetel, no boot with xen4 hypervisor‏
Hello list, I have performed a fresh install (fully updated) of squeeze amd64 and installed the xen-linux-system-2.6.32-5-xen-amd64 package with all its dependencies. When I restart and tried to boot the linux-image-2.6.32-5-xen-amd64 (pvops style) kernel on bare-metal my laptop boots fine. When I use the hyper-visor on the system with the same linux-image-2.6.32-5-xen-amd64 kernel, it hangs
2010 Aug 30
4
xen-linux-system-2.6.32-5-xen-amd64: Lenovo R61, kernel boots on baremetel, no boot with xen4 hypervisor‏
Hello list, I have performed a fresh install (fully updated) of squeeze amd64 and installed the xen-linux-system-2.6.32-5-xen-amd64 package with all its dependencies. When I restart and tried to boot the linux-image-2.6.32-5-xen-amd64 (pvops style) kernel on bare-metal my laptop boots fine. When I use the hyper-visor on the system with the same linux-image-2.6.32-5-xen-amd64 kernel, it hangs
2010 Sep 14
5
make-kpkg (Debian based tool) does not build xen patched kernel‏
...p-2.6.34.4-xen can not be generated, and therefore a FATAL error causes the make-kpkg process to fail! A System.map-2.6.34.4-xen can be generated when the kernel is built and packaged into a Debian binary with make deb-pkg. Can anyone else reproduce this problem? uname -a Linux BUBBLE 2.6.34.4-r61-xen #1 SMP Tue Sep 14 10:39:11 EDT 2010 x86_64 GNU/Linux apt-cache policy kernel-package kernel-package: Installed: 12.036 Candidate: 12.036 Version table: *** 12.036 0 500 http://mirror.csclub.uwaterloo.ca/debian/ squeeze/main amd64 Packages 100 /...
1998 Jun 18
2
R-beta: glm bug
A non-text attachment was scrubbed... Name: not available Type: text Size: 997 bytes Desc: not available Url : https://stat.ethz.ch/pipermail/r-help/attachments/19980618/ee08ba8d/attachment.pl
2010 Jul 13
2
[Bug 29039] New: Crash at kernel level
...(id=36991) --> (https://bugs.freedesktop.org/attachment.cgi?id=36991) kernel messages from crash After hours of working fine, my system suddenly locked up with seemingly nothing left to do but reboot. I'm running the up to date xorg-edgers PPA on Ubuntu Maverick on an Thinkpad R61 with nVidia Quadro NVS 140M. Attached /var/log/messages from the crash. Somewhat unsure that I'm filing this bug correctly. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are the as...
2016 Apr 08
2
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...... And after the first lowering step: MAIN:-1 () BB:0 (77 instructions) - df = { } -> BB:1 (tree) 0: mov u32 %r56 0x00000000 (0) 1: ld u64 %r57d c15[0x300] (0) 2: mov u32 %r58 0x00000004 (0) 3: ld u32 %r59 c15[0x308] (0) 4: set u8 %p60 gt u32 %r58 %r59 (0) 5: mov u32 %r61 0x00000000 (0) 6: not %p60 ld u32 %r62 g[%r57d+0x0] (0) ... Note how the 'b' printing is only used before the buffer access is lowered to a global access, so this seems to be the right thing todo. Regards, Hans > >> case FILE_MEMORY_GLOBAL: c = 'g'; break;...
2015 Jun 07
43
[Bug 90887] New: PhiMovesPass in register allocator broken
https://bugs.freedesktop.org/show_bug.cgi?id=90887 Bug ID: 90887 Summary: PhiMovesPass in register allocator broken Product: Mesa Version: git Hardware: All OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau Assignee:
2010 Oct 13
4
[Bug 30842] New: G84M/NVS 140M GPU Lockup
https://bugs.freedesktop.org/show_bug.cgi?id=30842 Summary: G84M/NVS 140M GPU Lockup Product: xorg Version: unspecified Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driver/nouveau AssignedTo: nouveau at
2016 Apr 12
2
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...instructions) - df = { } >> -> BB:1 (tree) >> 0: mov u32 %r56 0x00000000 (0) >> 1: ld u64 %r57d c15[0x300] (0) >> 2: mov u32 %r58 0x00000004 (0) >> 3: ld u32 %r59 c15[0x308] (0) >> 4: set u8 %p60 gt u32 %r58 %r59 (0) >> 5: mov u32 %r61 0x00000000 (0) >> 6: not %p60 ld u32 %r62 g[%r57d+0x0] (0) >> ... >> >> Note how the 'b' printing is only used before the buffer access >> is lowered to a global access, so this seems to be the right thing todo. >> > > Fine by me. > Thanks...
2016 Apr 08
0
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...gt; MAIN:-1 () > BB:0 (77 instructions) - df = { } > -> BB:1 (tree) > 0: mov u32 %r56 0x00000000 (0) > 1: ld u64 %r57d c15[0x300] (0) > 2: mov u32 %r58 0x00000004 (0) > 3: ld u32 %r59 c15[0x308] (0) > 4: set u8 %p60 gt u32 %r58 %r59 (0) > 5: mov u32 %r61 0x00000000 (0) > 6: not %p60 ld u32 %r62 g[%r57d+0x0] (0) > ... > > Note how the 'b' printing is only used before the buffer access > is lowered to a global access, so this seems to be the right thing todo. > Fine by me. Thanks. > Regards, > > Hans > &...
2016 Apr 14
0
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...t;>> -> BB:1 (tree) >>> 0: mov u32 %r56 0x00000000 (0) >>> 1: ld u64 %r57d c15[0x300] (0) >>> 2: mov u32 %r58 0x00000004 (0) >>> 3: ld u32 %r59 c15[0x308] (0) >>> 4: set u8 %p60 gt u32 %r58 %r59 (0) >>> 5: mov u32 %r61 0x00000000 (0) >>> 6: not %p60 ld u32 %r62 g[%r57d+0x0] (0) >>> ... >>> >>> Note how the 'b' printing is only used before the buffer access >>> is lowered to a global access, so this seems to be the right thing todo. >>> >>...