Displaying 20 results from an estimated 31 matches for "nvc0loweringpass".
2018 Sep 23
3
[Bug 108032] New: nv50_ir_lowering_gm107.cpp:326: undefined reference to `nv50_ir::NVC0LoweringPass::loadMsAdjInfo32(nv50_ir::TexInstruction::Target, unsigned int, int, nv50_ir::Value*, bool)'
https://bugs.freedesktop.org/show_bug.cgi?id=108032
Bug ID: 108032
Summary: nv50_ir_lowering_gm107.cpp:326: undefined reference to
`nv50_ir::NVC0LoweringPass::loadMsAdjInfo32(nv50_ir::T
exInstruction::Target, unsigned int, int,
nv50_ir::Value*, bool)'
Product: Mesa
Version: git
Hardware: All
OS: Linux (All)
Status: NEW
Severity: normal...
2019 Oct 14
1
[PATCH] gm107/ir: fix loading z offset for layered 3d image bindings
...uveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 1f702a987d8..0f68a9a229f 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -1802,6 +1802,9 @@ NVC0LoweringPass::loadSuInfo32(Value *ptr, int slot, uint32_t off, bool bindless
{
uint32_t base = slot * NVC0_SU_INFO__STRIDE;
+ // We don't upload surface info for bindless for GM107+
+ assert(!bindless || targ->getChipset() < NVISA_GM107_CHIPSET);
+
if (ptr) {
ptr = bld.mkOp2v(OP_...
2014 Aug 08
2
[PATCH 1/3] nvc0/ir: add base tex offset for fermi indirect tex case
...ivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index f010767..4a9e48f 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -603,10 +603,18 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
Value *ticRel = i->getIndirectR();
Value *tscRel = i->getIndirectS();
- if (ticRel)
+ if (ticRel) {
i->setSrc(i->tex.rIndirectSrc, NULL);
- if (tscRel)
+ if (i->tex.r)
+ ticRel = bld.mkOp2v(OP_A...
2016 Mar 17
4
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...ers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index d0936d8..628deb7 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -1141,13 +1141,14 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
handleSharedATOM(atom);
return true;
default:
- assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
+ assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
base = loadResInfo64(ind, atom->getSrc(0)->reg.fileIndex * 16);...
2014 Mar 20
0
[PATCH] nvc0/ir: move sample id to second source arg to fix sampler2DMS
...drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 3840f75..62241ba 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -666,8 +666,9 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
const int dim = i->tex.target.getDim() + i->tex.target.isCube();
const int arg = i->tex.target.getArgCount();
const int lyr = arg - (i->tex.target.isMS() ? 2 : 1);
+ const int chipset = prog->getTarget()->getChipset();
- if (prog->...
2014 Jul 05
1
[PATCH 1/2] nvc0/ir: use manual TXD when offsets are involved
...drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 0e24db7..398b28f 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -769,7 +769,8 @@ NVC0LoweringPass::handleTXD(TexInstruction *txd)
if (dim > 2 ||
txd->tex.target.isCube() ||
arg > 4 ||
- txd->tex.target.isShadow())
+ txd->tex.target.isShadow() ||
+ txd->tex.useOffsets)
return handleManualTXD(txd);
for (int c = 0; c < dim; ++...
2016 Apr 08
2
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
..._nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>> index d0936d8..628deb7 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>> @@ -1141,13 +1141,14 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
>> handleSharedATOM(atom);
>> return true;
>> default:
>> - assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
>> + assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
>> base = load...
2014 Jul 05
0
[PATCH] nvc0: do quadops on the right texture coordinates for TXD
...drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 8f26645..0e24db7 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -712,6 +712,7 @@ NVC0LoweringPass::handleManualTXD(TexInstruction *i)
Value *zero = bld.loadImm(bld.getSSA(), 0);
int l, c;
const int dim = i->tex.target.getDim();
+ const int array = i->tex.target.isArray();
i->op = OP_TEX; // no need to clone dPdx/dPdy later
@@ -722,7 +723,7 @@ NVC0LoweringPass::han...
2014 Sep 25
0
[PATCH] gm107/ir: fix texture argument order
...rivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 3afbf43..9ec2366 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -601,6 +601,21 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
// lod bias
// depth compare
// offsets (same as fermi, except txd which takes it with array)
+ //
+ // Maxwell (tex):
+ // array
+ // coords
+ // indirect handle
+ // sample
+ // lod bias
+ // depth compare
+ // offsets
+ //
+...
2016 Mar 14
2
[RFC mesa] nouveau: Add support for OpenCL global memory buffers
...ivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 6cb4dd4..bcc96de 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -2106,6 +2106,7 @@ NVC0LoweringPass::visit(Instruction *i)
} else if (i->src(0).getFile() == FILE_SHADER_OUTPUT) {
assert(prog->getType() == Program::TYPE_TESSELLATION_CONTROL);
i->op = OP_VFETCH;
+#if 0
} else if (i->src(0).getFile() == FILE_MEMORY_GLOBAL) {
Value *ind = i->...
2016 Mar 23
0
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> index d0936d8..628deb7 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> @@ -1141,13 +1141,14 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
> handleSharedATOM(atom);
> return true;
> default:
> - assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
> + assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
> base = loadResInfo64(ind, atom->...
2016 Apr 12
2
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>>> index d0936d8..628deb7 100644
>>>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>>> @@ -1141,13 +1141,14 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
>>>> handleSharedATOM(atom);
>>>> return true;
>>>> default:
>>>> - assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
>>>> + assert(atom->src(0).getFile() == FILE_MEMO...
2016 Mar 14
2
[RFC mesa] nouveau: Add support for OpenCL global memory buffers
...pp
>> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>> index 6cb4dd4..bcc96de 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>> @@ -2106,6 +2106,7 @@ NVC0LoweringPass::visit(Instruction *i)
>> } else if (i->src(0).getFile() == FILE_SHADER_OUTPUT) {
>> assert(prog->getType() == Program::TYPE_TESSELLATION_CONTROL);
>> i->op = OP_VFETCH;
>> +#if 0
>> } else if (i->src(0).getFile() == FI...
2016 Apr 08
0
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>> index d0936d8..628deb7 100644
>>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>> @@ -1141,13 +1141,14 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
>>> handleSharedATOM(atom);
>>> return true;
>>> default:
>>> - assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
>>> + assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
>>...
2016 Mar 16
2
[PATCH mesa 4/6] nouveau: codegen: s/FILE_MEMORY_GLOBAL/FILE_MEMORY_BUFFER/
...0_ir_lowering_nvc0.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> index d0936d8..563d7c2 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> @@ -1141,7 +1141,7 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
> handleSharedATOM(atom);
> return true;
> default:
> - assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
> + assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
> base = loadResInfo64(ind, atom->getS...
2016 Apr 14
0
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...nv50_ir_lowering_nvc0.cpp
>>>>> index d0936d8..628deb7 100644
>>>>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>>>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>>>> @@ -1141,13 +1141,14 @@ NVC0LoweringPass::handleATOM(Instruction
>>>>> *atom)
>>>>> handleSharedATOM(atom);
>>>>> return true;
>>>>> default:
>>>>> - assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
>>>>> + asse...
2016 Mar 16
0
[PATCH mesa 4/6] nouveau: codegen: s/FILE_MEMORY_GLOBAL/FILE_MEMORY_BUFFER/
...ivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index d0936d8..563d7c2 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -1141,7 +1141,7 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
handleSharedATOM(atom);
return true;
default:
- assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
+ assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
base = loadResInfo64(ind, atom->getSrc(0)->reg.fileIndex * 16);...
2016 Mar 16
0
[PATCH mesa 4/6] nouveau: codegen: s/FILE_MEMORY_GLOBAL/FILE_MEMORY_BUFFER/
...pp
>> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>> index d0936d8..563d7c2 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>> @@ -1141,7 +1141,7 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
>> handleSharedATOM(atom);
>> return true;
>> default:
>> - assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
>> + assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
>> base = load...
2015 Feb 20
10
[PATCH 01/11] nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmax
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
.../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 66 +++++++++++++++++++++-
1 file changed, 63 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index dfb093c..e38a3b8 100644
---
2016 Mar 14
2
[RFC mesa] nouveau: Add support for OpenCL global memory buffers
...s/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>>> index 6cb4dd4..bcc96de 100644
>>>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
>>>> @@ -2106,6 +2106,7 @@ NVC0LoweringPass::visit(Instruction *i)
>>>> } else if (i->src(0).getFile() == FILE_SHADER_OUTPUT) {
>>>> assert(prog->getType() ==
>>>> Program::TYPE_TESSELLATION_CONTROL);
>>>> i->op = OP_VFETCH;
>>>> +#if 0
>>...