search for: nv50_ir_target_nvc0

...ssfully render simple off-screen buffers. Alexandre Courbot (2): nvc0: add GK20A 3D class nvc0: use SM35 ISA with GK20A src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 + src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 13 +++++++++---- src/gallium/drivers/nouveau/nv_object.xml.h | 1 + src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 9 ++++++++- 5 files changed, 20 insertions(+), 6 deletions(-) -- 1.9.3

...when this chip is detected. > > Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> > --- > src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 + > src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 2 +- > src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 13 +++++++++---- > 3 files changed, 11 insertions(+), 5 deletions(-) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h > index bbb89d97932e..aab857ee7e4f 100644 > --- a/src/gallium/drivers/nouveau/codeg...

...eau/codegen/nv50_ir_from_tgsi.cpp | 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 8 +++++--- src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 ++++- src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 1 + 6 files changed, 13 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h index 7b0eb2f..5141fc6 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h +++ b/src/gallium/drivers/nouveau/codegen/nv50...

...SM35 ISA. Use the GK110 path when this chip is detected. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 + src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 13 +++++++++---- 3 files changed, 11 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h index bbb89d97932e..aab857ee7e4f 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h +++...

...t uses the SM35 ISA. Use the GK110 path when this chip is detected. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 2 +- .../drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 15 ++++++++++----- 3 files changed, 12 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h index bbb89d97932e..f829aac0bcc2 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_drive...

...2 +- >> src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 8 +++++--- >> src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + >> src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 ++++- >> src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 1 + >> 6 files changed, 13 insertions(+), 5 deletions(-) >> >> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h >> index 7b0eb2f..5141fc6 100644 >> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h &...

..._tgsi.cpp | 2 +- > src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 8 +++++--- > src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + > src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 ++++- > src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 1 + > 6 files changed, 13 insertions(+), 5 deletions(-) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h > index 7b0eb2f..5141fc6 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h > +++ b/src/galliu...

...r_lowering_nvc0.cpp | 8 >>>> +++++--- >>>> src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + >>>> src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 >>>> ++++- >>>> src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 1 + >>>> 6 files changed, 13 insertions(+), 5 deletions(-) >>>> >>>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h >>>> b/src/gallium/drivers/nouveau/codegen/nv50_ir.h >>>> index 7b0eb2f..5141fc6 100644 >>>&...

...uveau/codegen/nv50_ir_lowering_nvc0.cpp | 8 >>> +++++--- >>> src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + >>> src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 >>> ++++- >>> src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 1 + >>> 6 files changed, 13 insertions(+), 5 deletions(-) >>> >>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h >>> b/src/gallium/drivers/nouveau/codegen/nv50_ir.h >>> index 7b0eb2f..5141fc6 100644 >>> --- a/src/gallium/dr...

...> .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 14 +++++++--- > .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 5 +++- > .../drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + > .../nouveau/codegen/nv50_ir_target_nv50.cpp | 1 + > .../nouveau/codegen/nv50_ir_target_nvc0.cpp | 1 + > 10 files changed, 74 insertions(+), 21 deletions(-) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h > index fdc2195..5141fc6 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h > +++ b/sr...

...| 8 >>>>> +++++--- >>>>> src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + >>>>> src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 >>>>> ++++- >>>>> src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 1 + >>>>> 6 files changed, 13 insertions(+), 5 deletions(-) >>>>> >>>>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h >>>>> b/src/gallium/drivers/nouveau/codegen/nv50_ir.h >>>>> index 7b0eb2f..5141fc6...

Hi All, This series implements using double immediates in the nouveau codegen code. This turns the following (nvc0) code: 1: mov u32 $r2 0x00000000 (8) 2: mov u32 $r3 0x3fe00000 (8) 3: add f64 $r0d $r0d $r2d (8) Into: 1: add f64 $r0d $r0d 0.500000 (8) This has been tested with the 2 double shader tests which I just send to the piglet list. On a gk208 (gk110 / SM35)

...0.cpp | 26 +++++++++++++----- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 14 +++++++--- .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 5 +++- .../drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + .../nouveau/codegen/nv50_ir_target_nv50.cpp | 1 + .../nouveau/codegen/nv50_ir_target_nvc0.cpp | 1 + 10 files changed, 74 insertions(+), 21 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h index fdc2195..5141fc6 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h +++ b/src/gallium/drivers/nouveau/code...

tgsi_default_instruction_memory / tgsi_build_instruction_memory were returning uninitialized memory for tgsi_instruction_memory.Texture and tgsi_instruction_memory.Format. Note 0 means not set, and thus is a correct default initializer for these. Fixes: 3243b6fc97 ("tgsi: add Texture and Format to tgsi_instruction_memory") Cc: Nicolai Hähnle <nicolai.haehnle at amd.com>

...| 10 > +++++----- > src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 8 ++++---- > src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 2 +- > src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 6 +++--- > src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 2 +- > 11 files changed, 38 insertions(+), 38 deletions(-) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h > b/src/gallium/drivers/nouveau/codegen/nv50_ir.h > index 7b0eb2f..fdc2195 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h > +++ b/src...

...ers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 14 +++++++--- >> .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 5 +++- >> .../drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + >> .../nouveau/codegen/nv50_ir_target_nv50.cpp | 1 + >> .../nouveau/codegen/nv50_ir_target_nvc0.cpp | 1 + >> 10 files changed, 74 insertions(+), 21 deletions(-) >> >> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h >> index fdc2195..5141fc6 100644 >> --- a/src/gallium/drivers/nouveau/codegen/nv5...

...r_lowering_nvc0.cpp | 10 +++++----- src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 8 ++++---- src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 6 +++--- src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 2 +- 11 files changed, 38 insertions(+), 38 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h index 7b0eb2f..fdc2195 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h +++ b/src/gallium/drivers/nouveau/codegen/n...

...-- >> src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 8 ++++---- >> src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 2 +- >> src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 6 +++--- >> src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 2 +- >> 11 files changed, 38 insertions(+), 38 deletions(-) >> >> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h >> b/src/gallium/drivers/nouveau/codegen/nv50_ir.h >> index 7b0eb2f..fdc2195 100644 >> --- a/src/gallium/drivers/nouveau/codegen...

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 66 +++++++++++++++++++++- 1 file changed, 63 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp index dfb093c..e38a3b8 100644 ---

The headers hadn't been regenerated in a long time, and there were a few minor divergences. Among other things, rnndb has changed naming to G80/etc, for now I've not tackled switching that over and manually replaced the nvidia codenames back to the chip ids. However no other modifications of the headergen'd headers was done. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>