Displaying 20 results from an estimated 31 matches for "nouveau_bo_fixup_align".
2013 Nov 12
0
[PATCH 6/7] drm/nouveau: more paranoia in nouveau_bo_fixup_align
...+++-----------------
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index bb3734d..635a192 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -160,24 +160,20 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
struct nouveau_device *device = nv_device(drm->device);
- if (device->card_type < NV_50) {
- if (nvbo->tile_mode) {
- if (device->chipset >= 0x40) {
- *align = 65536;
- *si...
2019 Sep 10
1
[Intel-gfx] [PATCH v6 08/17] drm/ttm: use gem vma_node
...> Date: Wed Aug 14 11:00:48 2019 +0200
>
> drm/nouveau: Initialize GEM object before TTM object
>
> breaks nouveau userspace which tries to allocate GEM objects with a
> non-page-aligned size. Previously nouveau_gem_new would just call
> nouveau_bo_init which would call nouveau_bo_fixup_align before
> initializing the GEM object. With this change, it is done after. What
> do you think -- OK to just move that bit of logic into the new
> nouveau_bo_alloc() (and make size/align be pointers so that they can
> be fixed up?)
Hi Ilia,
sorry, got side-tracked earlier and forgot to...
2019 Aug 21
2
[Intel-gfx] [PATCH v6 08/17] drm/ttm: use gem vma_node
On Wed, Aug 21, 2019 at 04:33:58PM +1000, Ben Skeggs wrote:
> On Wed, 14 Aug 2019 at 20:14, Gerd Hoffmann <kraxel at redhat.com> wrote:
> >
> > Hi,
> >
> > > > Changing the order doesn't look hard. Patch attached (untested, have no
> > > > test hardware). But maybe I missed some detail ...
> > >
> > > I came up with
2009 Dec 27
3
[PATCH 1/2] drm/nv50: align size of buffer object to the right boundaries.
...eau_bo.c | 9 ++++-----
1 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index e342a41..9fc4bd6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -65,8 +65,9 @@ nouveau_bo_fixup_align(struct drm_device *dev,
/*
* Some of the tile_flags have a periodic structure of N*4096 bytes,
- * align to to that as well as the page size. Overallocate memory to
- * avoid corruption of other buffer objects.
+ * align to to that as well as the page size. Align the size to the
+ * appr...
2010 Feb 02
2
[PATCH 1/6] drm/nv50: align size of buffer object to the right boundaries.
...u_bo.c | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index db0ed4c..028719f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -65,8 +65,10 @@ nouveau_bo_fixup_align(struct drm_device *dev,
/*
* Some of the tile_flags have a periodic structure of N*4096 bytes,
- * align to to that as well as the page size. Overallocate memory to
- * avoid corruption of other buffer objects.
+ * align to to that as well as the page size. Align the size to the
+ * appr...
2019 Sep 16
4
[PATCH 0/4] drm/nouveau: Miscellaneous fixes
From: Thierry Reding <treding at nvidia.com>
Hi Ben,
these are fixes for a couple of issues that I've been running into when
testing on various Tegra boards. The first two patches fix up issues in
the fix that I had sent out earlier to fix the regression introduced in
drm-misc-next. The first one is critical because it avoids a BUG_ON as
reported by Ilia, while the second is less
2013 Aug 28
1
[PATCH 4/6] drm/nouveau: introduce NOUVEAU_GEM_TILE_WCUS
.../drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
> index f4a2eb9..c5fcbcc 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_bo.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
> @@ -231,6 +231,12 @@ nouveau_bo_new(struct drm_device *dev, int size, int align,
>
> nouveau_bo_fixup_align(nvbo, flags, &align, &size);
> nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
> +
> + if (tile_flags & NOUVEAU_GEM_TILE_WCUS)
> + nvbo->valid_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
> + else
> + nvbo-&g...
2013 Nov 29
2
Fixing nouveau for >4k PAGE_SIZE
...| 1);
phys += NV41_GART_PAGE;
pte += 4;
- cnt -= 1;
}
}
}
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index c0fde6b..16dce89 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -178,7 +178,7 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
*size = roundup(*size, (1 << nvbo->page_shift));
*align = max((1 << nvbo->page_shift), *align);
}
-
+ *align = roundup(*align, PAGE_SIZE);
*size = roundup(*size, PAGE_SIZE);
}
@@ -221,7 +221,7 @@ nouveau_bo_new(struct drm_device *d...
2013 Aug 11
2
Fixing nouveau for >4k PAGE_SIZE
...hift = 12;
> > if (drm->client.base.vm) {
> > if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
> > - nvbo->page_shift = drm->client.base.vm->vmm->lpg_shift;
> > + nvbo->page_shift = lpg_shift;
> > }
> >
> > nouveau_bo_fixup_align(nvbo, flags, &align, &size);
> Hm.. I don't know if it will be an issue here. But I'm concerned about the cases where nouveau_vm can end up unaligned.
> This will not be an issue for the bar mappings, because they map the entire bo, and bo's are always page aligned.
> S...
2015 Apr 17
3
[PATCH 4/6] drm: enable big page mapping for small pages when IOMMU is available
...ot use big pages at all. In effect,
many buffers will be rejected for this reason. A behavior like "if the
buffer size of more than 256KB, increase the size of the buffer to the
next multiple of 128K and use big pages" would probably yield better
results.
> }
>
> nouveau_bo_fixup_align(nvbo, flags, &align, &size);
> @@ -1641,6 +1646,10 @@ nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nvkm_vm *vm,
> (nvbo->bo.mem.mem_type == TTM_PL_VRAM ||
> nvbo->page_shift != vma->vm->mmu->lpg_shift))
> nvkm_vm_map(...
2013 Aug 11
2
Fixing nouveau for >4k PAGE_SIZE
..._bo_new(struct drm_device *dev, int size, int align,
nvbo->page_shift = 12;
if (drm->client.base.vm) {
if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
- nvbo->page_shift = drm->client.base.vm->vmm->lpg_shift;
+ nvbo->page_shift = lpg_shift;
}
nouveau_bo_fixup_align(nvbo, flags, &align, &size);
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
index ca5492a..494cf88 100644
--- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
@@ -31,7 +31,7 @@ nv04_sgdma_bind(struct ttm_...
2015 Jun 15
2
[PATCH v2 2/2] drm/nouveau: add GEM_SET_TILING staging ioctl
...uveau_drm.h | 8 ++++++
> 7 files changed, 95 insertions(+), 12 deletions(-)
>
> diff --git a/drm/nouveau/nouveau_bo.c b/drm/nouveau/nouveau_bo.c
> index 6edcce1658b7..2a2ebbeb4fc0 100644
> --- a/drm/nouveau/nouveau_bo.c
> +++ b/drm/nouveau/nouveau_bo.c
> @@ -178,6 +178,24 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
> *size = roundup(*size, PAGE_SIZE);
> }
>
> +void
> +nouveau_bo_update_tiling(struct nouveau_drm *drm, struct nouveau_bo *nvbo,
> + struct nvkm_mem *mem)
> +{
> + switch (drm->device.info.family) {
> + case NV_DEVICE_INFO_V0...
2013 Aug 11
0
Fixing nouveau for >4k PAGE_SIZE
..., int align,
> nvbo->page_shift = 12;
> if (drm->client.base.vm) {
> if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
> - nvbo->page_shift = drm->client.base.vm->vmm->lpg_shift;
> + nvbo->page_shift = lpg_shift;
> }
>
> nouveau_bo_fixup_align(nvbo, flags, &align, &size);
Hm.. I don't know if it will be an issue here. But I'm concerned about the cases where nouveau_vm can end up unaligned.
This will not be an issue for the bar mappings, because they map the entire bo, and bo's are always page aligned.
See nouveau_bo_f...
2013 Dec 11
0
Fixing nouveau for >4k PAGE_SIZE
...gt; }
> }
> }
Ack
> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
> index c0fde6b..16dce89 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_bo.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
> @@ -178,7 +178,7 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
> *size = roundup(*size, (1 << nvbo->page_shift));
> *align = max((1 << nvbo->page_shift), *align);
> }
> -
> + *align = roundup(*align, PAGE_SIZE);
> *size = roundup(*size...
2019 Sep 08
0
[Intel-gfx] [PATCH v6 08/17] drm/ttm: use gem vma_node
...ding <treding at nvidia.com>
Date: Wed Aug 14 11:00:48 2019 +0200
drm/nouveau: Initialize GEM object before TTM object
breaks nouveau userspace which tries to allocate GEM objects with a
non-page-aligned size. Previously nouveau_gem_new would just call
nouveau_bo_init which would call nouveau_bo_fixup_align before
initializing the GEM object. With this change, it is done after. What
do you think -- OK to just move that bit of logic into the new
nouveau_bo_alloc() (and make size/align be pointers so that they can
be fixed up?)
Cheers,
-ilia
2013 Aug 28
0
[PATCH 4/6] drm/nouveau: introduce NOUVEAU_GEM_TILE_WCUS
...etion(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index f4a2eb9..c5fcbcc 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -231,6 +231,12 @@ nouveau_bo_new(struct drm_device *dev, int size, int align,
nouveau_bo_fixup_align(nvbo, flags, &align, &size);
nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
+
+ if (tile_flags & NOUVEAU_GEM_TILE_WCUS)
+ nvbo->valid_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
+ else
+ nvbo->valid_caching = TTM_PL_MASK_CACHING;
+
nouveau_bo_placement_set(nvbo,...
2013 Aug 29
0
Fixing nouveau for >4k PAGE_SIZE
...if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
>> > - nvbo->page_shift = drm->client.base.vm->vmm->lpg_shift;
>> > + nvbo->page_shift = lpg_shift;
>> > }
>> >
>> > nouveau_bo_fixup_align(nvbo, flags, &align, &size);
>> Hm.. I don't know if it will be an issue here. But I'm concerned about the cases where nouveau_vm can end up unaligned.
>> This will not be an issue for the bar mappings, because they map the entire bo, and bo's are always page aligned...
2013 Sep 02
0
[PATCH] drm/nv50-: fix tiled memory layout checks
...++++++----------------
1 file changed, 24 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 88f0c45..0daf3f0 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -176,8 +176,8 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
*size = roundup(*size, 32 * nvbo->tile_mode);
}
} else {
- *size = roundup(*size, (1 << nvbo->page_shift));
- *align = max((1 << nvbo->page_shift), *align);
+ *align = 1 << nvbo->page_shift;
+ *size = roundup(*size, *al...
2015 Jun 15
4
[PATCH v2 0/2] drm/nouveau: option for staging ioctls and new GEM_SET_TILING ioctl
Second version of this patchset addressing Ben's comments and fixing a few
extra things.
This patchset proposes to introduce a "staging" module option to dynamically
enable features (mostly ioctls) that are merged but may be refined before
they are declared "stable". The second patch illustrates the use of this
staging option with the SET_TILING ioctl, which can be used to
2019 May 23
2
[RFC][PATCH] kernel.h: Add generic roundup_64() macro
...32c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -143,14 +143,6 @@ nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
kfree(nvbo);
}
-static inline u64
-roundup_64(u64 x, u32 y)
-{
- x += y - 1;
- do_div(x, y);
- return x * y;
-}
-
static void
nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
int *align, u64 *size)
diff --git a/fs/xfs/xfs_linux.h b/fs/xfs/xfs_linux.h
index edbd5a210df2..13de9d49bd52 100644
--- a/fs/xfs/xfs_linux.h
+++ b/fs/xfs/xfs_linux.h
@@ -207,13 +207,6 @@ static inline xfs_dev_t linux_to_xfs_dev_t(dev_t dev)
#define xfs...