search for: new_reg

...han, struct ttm_resource *reg) { if (reg->mem_type == TTM_PL_TT) return NvDmaTT; @@ -45,7 +45,7 @@ nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo, int nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) + struct ttm_resource *old_reg, struct ttm_resource *new_reg) { struct nvif_push *push = chan->chan.push; u32 src_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, old_reg); diff --git a/drivers/gpu/drm/nouveau/nouveau_bo5039.c b/drivers/gpu/drm/nouveau/nouveau_bo5039.c index f9b9b85abe444..4c75...

...pe == TTM_PL_TT) > return NvDmaTT; > @@ -45,7 +45,7 @@ nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo, > > int > nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, > - struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) > + struct ttm_resource *old_reg, struct ttm_resource *new_reg) > { > struct nvif_push *push = chan->chan.push; > u32 src_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, old_reg); > diff --git a/drivers/gpu/drm/nouveau/nouveau_bo5039.c b/drivers/gpu/drm/...

...tes(v_reg); for(unsigned u = 0; u < use_sites.size(); u++) { MachineInstr * mi = use_sites[u]; if(mi == last_seen) { continue; // this happens when the same virtual is used multiple // times in the same instruction. } unsigned new_reg = create_new_virtual_register(v_reg); if(mi->getParent()->getNumber() == ks.get_basic_block()->getNumber()) { ks.replace_used_reg(mi, new_reg, v_reg); } this->vrm->grow(); this->reg_mapping->grow(); this->vrm->assignVirt...

So what addIntervalsToSpills returns are new intervals to allocate with infinite weights, right? And I need not to allocate the old interval. Should hasStackSlot return true on its register then? On 8/21/06, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > > Well, someone correct me if am wrong, but, you still have to allocate > physical registers to them,

I made the change to the BuildMI() call. Again, I don't think that matters. #define BUILD_INS(opcode, new_reg, i) \ BuildMI(*MBB, OldMI, MBBI->getDebugLoc(), TII->get(X86::opcode)) \ .addReg(X86::new_reg, kill).addImm(i) I didn't completely understand your other proposed change: ​ for (MachineBasicBlock::iterator MBBI = MBB->begin(); MBBI != MB...

This seems a very natural approach but I probably am having a trouble with the iterator invalidation. However, looking at other peephole optimizers passes, I couldn't see how to do this: #define BUILD_INS(opcode, new_reg, i) \ BuildMI(*MBB, MBBI, MBBI->getDebugLoc(), TII->get(X86::opcode)) \ .addReg(X86::new_reg, kill).addImm(i) for (MachineFunction::iterator MFI = MF.begin(), MFE = MF.end(); MFI != MFE; ++MFI) { MachineBasicBlock* MBB = MFI; for (Machi...

...pass gets called per MachineFunction and then iterates over each MachineBasicBlock and in turn over each MachineInst. When it finds an instruction which should be replaced, it builds a new instruction: NewMI = BuildMI(*MBB, MBBI, MBBI->getDebugLoc(), TII->get(X86::opcode)) .addReg(X86::new_reg, kill) .addImm(i); This works and it correctly places the new instruction just before the old instruction in the assembly output. So far so good. Now I have to remove the old instruction. But everything I try crashes LLVM, either immediately or eventually. Various incantations which haven'...

...u = 0; u < use_sites.size(); u++) { > MachineInstr * mi = use_sites[u]; > if(mi == last_seen) { > continue; // this happens when the same virtual is used > multiple > // times in the same instruction. > } > unsigned new_reg = create_new_virtual_register(v_reg); > if(mi->getParent()->getNumber() == > ks.get_basic_block()->getNumber()) { > ks.replace_used_reg(mi, new_reg, v_reg); > } > this->vrm->grow(); > this->reg_mapping->grow(); >...

..._NESTING); + if (drm_drv_uses_atomic_modeset(drm->dev)) + mutex_lock(&cli->mutex); + else + mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING); + ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, intr); if (ret == 0) { ret = drm->ttm.move(chan, bo, &bo->mem, new_reg); -- 2.27.0

...lowering NEG/ABS instructions. > However I met a problem : apparently getNextOperandForReg() can returns a MachineOperand before the one I'm processing. > > The following code snippet : > > > void R600ModifiersPropagation::substituteReg(MachineOperand &def_MO, unsigned new_reg, unsigned char flag) { > MachineOperand * MO = def_MO.getNextOperandForReg(); > while (MO && MO->isUse()) { > MachineOperand *next_MO = MO->getNextOperandForReg(); > MO->dump(); > > MO = next_MO; > } > } > > displays instructions th...

...44 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -967,7 +967,6 @@ nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, old_reg)); OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, new_reg)); - page_count = new_reg->num_pages; while (page_count) { int line_count = (page_count > 2047) ? 2047 : page_count; -- 2.14.1

Hello. I am making a backend for a virtual machine. But it does assume infinite number of virtual registers unlike those of usual machines. In this case, how can I implement this? Would you mind telling me some tips? Thank you so much. Seung Jae Lee

...> > + else > > + mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING); > > + > > ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, intr); > > if (ret == 0) { > > ret = drm->ttm.move(chan, bo, &bo->mem, new_reg); > > Well if you're certain it works now. :) > > Reviewed-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com> > -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch

There are 11 BuildMI() functions in MachineInstrBuilder.h including four using the iterator and one using an instruction. But I just don't think that's it. The creation of the new instruction works fine (works fine with OldMI as well) and the new instruction is present in the assembly output. The problem is removing the old instruction correctly. > The loop header needs to be

...However I met a problem : apparently getNextOperandForReg() can returns a > MachineOperand before the one I'm processing. >> >> The following code snippet : >> >> >> void R600ModifiersPropagation::substituteReg(MachineOperand &def_MO, > unsigned new_reg, unsigned char flag) { >>   MachineOperand * MO = def_MO.getNextOperandForReg(); >>   while (MO && MO->isUse()) { >>     MachineOperand *next_MO = MO->getNextOperandForReg(); >>     MO->dump(); >> >>     MO = next_MO; >>   } >>...

...mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING); > > > > + > > > > ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, intr); > > > > if (ret == 0) { > > > > ret = drm->ttm.move(chan, bo, &bo->mem, new_reg); > > > > > > Well if you're certain it works now. :) > > > > > > Reviewed-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com> Acked-by: Ben Skeggs <bskeggs at redhat.com> > > > > > > > > > -- > > Daniel...

Hi, R600 hardware (Radeon gfx card) does neither have a NEG nor an ABS instruction ; however any sources operand can be negated/abs'd by setting a bit for every source operand in the final bytecode (but not DST). A good way of modeling this behavior in LLVM is by using TargetFlag on operand. Currently the R600 LLVM backend in Mesa lower NEG and ABS DAG instruction to a MOV + TargetFlag using

...7,10 @@ nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, bool evict, ??????????????? list_for_each_entry(vma, &nvbo->vma_list, head) { ??????????????????????? nouveau_vma_map(vma, mem); ??????????????? } +?????????????? if (bo->mem.mm_node) +?????????????????????? nvbo->offset = (new_reg->start << PAGE_SHIFT); +?????????????? else +?????????????????????? nvbo->offset = 0; ??????? } else { ??????????????? list_for_each_entry(vma, &nvbo->vma_list, head) { ??????????????????????? WARN_ON(ttm_bo_wait(bo, false, false)); Regards, Nirmoy > > Regards, >...

...x, SINGLE_DEPTH_NESTING); > > > > > > + > > > > > > ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, intr); > > > > > > if (ret == 0) { > > > > > > ret = drm->ttm.move(chan, bo, &bo->mem, new_reg); > > > > > > > > > > Well if you're certain it works now. :) > > > > > > > > > > Reviewed-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com> > > Acked-by: Ben Skeggs <bskeggs at redhat.com> > > Can yo...

...>> *bo, bool evict, >> ??????????????? list_for_each_entry(vma, &nvbo->vma_list, head) { >> ??????????????????????? nouveau_vma_map(vma, mem); >> ??????????????? } >> +?????????????? if (bo->mem.mm_node) >> +?????????????????????? nvbo->offset = (new_reg->start << PAGE_SHIFT); >> +?????????????? else >> +?????????????????????? nvbo->offset = 0; >> ??????? } else { >> ??????????????? list_for_each_entry(vma, &nvbo->vma_list, head) { >> ??????????????????????? WARN_ON(ttm_bo_wait(bo, false, false));...