search for: msix_entry_used

Displaying 20 results from an estimated 28 matches for "msix_entry_used".

[PATCHv2 05/13] qemu: MSI-X support functions
2009 Jun 02
0
[PATCHv2 05/13] qemu: MSI-X support functions
...offset; + /* Make flags bit writeable. */ + pdev->mask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCHv2 05/13] qemu: MSI-X support functions
2009 Jun 02
0
[PATCHv2 05/13] qemu: MSI-X support functions
...offset; + /* Make flags bit writeable. */ + pdev->mask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCHv3 05/13] qemu: MSI-X support functions
2009 Jun 05
1
[PATCHv3 05/13] qemu: MSI-X support functions
...ffset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCHv3 05/13] qemu: MSI-X support functions
2009 Jun 05
1
[PATCHv3 05/13] qemu: MSI-X support functions
...ffset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCH 05/11] qemu: MSI-X support functions
2009 May 25
1
[PATCH 05/11] qemu: MSI-X support functions
...offset; + /* Make flags bit writeable. */ + pdev->mask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCH 05/11] qemu: MSI-X support functions
2009 May 25
1
[PATCH 05/11] qemu: MSI-X support functions
...offset; + /* Make flags bit writeable. */ + pdev->mask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCHv6 05/12] qemu/pci: MSI-X support functions
2009 Jun 21
1
[PATCHv6 05/12] qemu/pci: MSI-X support functions
...ffset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCHv6 05/12] qemu/pci: MSI-X support functions
2009 Jun 21
1
[PATCHv6 05/12] qemu/pci: MSI-X support functions
...ffset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCHv5 05/13] qemu: MSI-X support functions
2009 Jun 18
0
[PATCHv5 05/13] qemu: MSI-X support functions
...ffset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCHv5 05/13] qemu: MSI-X support functions
2009 Jun 18
0
[PATCHv5 05/13] qemu: MSI-X support functions
...ffset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCHv4 05/13] qemu: MSI-X support functions
2009 Jun 10
0
[PATCHv4 05/13] qemu: MSI-X support functions
...ffset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCHv4 05/13] qemu: MSI-X support functions
2009 Jun 10
0
[PATCHv4 05/13] qemu: MSI-X support functions
...ffset; + /* Make flags bit writeable. */ + pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector; + + for (vector = 0; vector < dev->msix_entries_nr; ++vector) + dev->msix_entry_used[vector] = 0; +} + +/* Handle MSI-X capability config write. */ +void msix_write_config(PCIDevice *dev, uint32_t addr, + uint32_t val, int len) +{ + unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET; + if (addr + len <= enable_pos || addr > enable_pos) +...
[PATCH 1/2] qemu-kvm: add MSI-X support
2009 May 11
0
[PATCH 1/2] qemu-kvm: add MSI-X support
...dd_config(dev, nentries, bar_nr, bar_size, new_size); + if (ret) + return ret; + + dev->msix_irq_entries = qemu_malloc(nentries * + sizeof *dev->msix_irq_entries); + if (!dev->msix_irq_entries) + goto err_entries; + + dev->msix_entry_used = qemu_mallocz(nentries * + sizeof *dev->msix_entry_used); + if (!dev->msix_entry_used) + goto err_used; + + dev->msix_table_page = qemu_mallocz(MSIX_PAGE_SIZE); + if (!dev->msix_table_page) + goto err_page; + + dev->ms...
[PATCH 1/2] qemu-kvm: add MSI-X support
2009 May 11
0
[PATCH 1/2] qemu-kvm: add MSI-X support
...dd_config(dev, nentries, bar_nr, bar_size, new_size); + if (ret) + return ret; + + dev->msix_irq_entries = qemu_malloc(nentries * + sizeof *dev->msix_irq_entries); + if (!dev->msix_irq_entries) + goto err_entries; + + dev->msix_entry_used = qemu_mallocz(nentries * + sizeof *dev->msix_entry_used); + if (!dev->msix_entry_used) + goto err_used; + + dev->msix_table_page = qemu_mallocz(MSIX_PAGE_SIZE); + if (!dev->msix_table_page) + goto err_page; + + dev->ms...
[PATCHv2-RFC 1/2] qemu-kvm: add MSI-X support
2009 May 20
0
[PATCHv2-RFC 1/2] qemu-kvm: add MSI-X support
...| + bar_nr); + pdev->cap.msix = config_offset; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector, changed = 0; + + /* TODO: handle errors */ + for (vector = 0; vector < dev->msix_irq_entries_nr; ++vector) + if (dev->msix_entry_used[vector]) { + kvm_del_routing_entry(kvm_context, &dev->msix_irq_entries[vector]); + dev->msix_entry_used[vector] = 0; + changed = 1; + } + if (changed) + kvm_commit_irq_routes(kvm_context); +} + +static void msix_enable(PCIDevice *dev) +{ +...
[PATCHv2-RFC 1/2] qemu-kvm: add MSI-X support
2009 May 20
0
[PATCHv2-RFC 1/2] qemu-kvm: add MSI-X support
...| + bar_nr); + pdev->cap.msix = config_offset; + return 0; +} + +static void msix_free_irq_entries(PCIDevice *dev) +{ + int vector, changed = 0; + + /* TODO: handle errors */ + for (vector = 0; vector < dev->msix_irq_entries_nr; ++vector) + if (dev->msix_entry_used[vector]) { + kvm_del_routing_entry(kvm_context, &dev->msix_irq_entries[vector]); + dev->msix_entry_used[vector] = 0; + changed = 1; + } + if (changed) + kvm_commit_irq_routes(kvm_context); +} + +static void msix_enable(PCIDevice *dev) +{ +...
[PATCHv2 3/3] qemu-kvm: vhost-net implementation
2009 Aug 13
0
[PATCHv2 3/3] qemu-kvm: vhost-net implementation
...ci_dev, address, val, len); } +static int virtio_pci_irqfd(void * opaque, uint16_t vector, int fd) +{ + VirtIOPCIProxy *proxy = opaque; + struct kvm_irqfd call = { }; + int r; + + if (vector >= proxy->pci_dev.msix_entries_nr) + return -EINVAL; + if (!proxy->pci_dev.msix_entry_used[vector]) + return -ENOENT; + call.fd = fd; + call.gsi = proxy->pci_dev.msix_irq_entries[vector].gsi; + r = kvm_vm_ioctl(kvm_state, KVM_IRQFD, &call); + if (r < 0) + return r; + return 0; +} + +static int virtio_pci_queuefd(void * opaque, int n, int fd) +{ +...
[PATCHv2 3/3] qemu-kvm: vhost-net implementation
2009 Aug 13
0
[PATCHv2 3/3] qemu-kvm: vhost-net implementation
...ci_dev, address, val, len); } +static int virtio_pci_irqfd(void * opaque, uint16_t vector, int fd) +{ + VirtIOPCIProxy *proxy = opaque; + struct kvm_irqfd call = { }; + int r; + + if (vector >= proxy->pci_dev.msix_entries_nr) + return -EINVAL; + if (!proxy->pci_dev.msix_entry_used[vector]) + return -ENOENT; + call.fd = fd; + call.gsi = proxy->pci_dev.msix_irq_entries[vector].gsi; + r = kvm_vm_ioctl(kvm_state, KVM_IRQFD, &call); + if (r < 0) + return r; + return 0; +} + +static int virtio_pci_queuefd(void * opaque, int n, int fd) +{ +...
[PATCHv3 3/4] qemu-kvm: vhost-net implementation
2009 Aug 17
1
[PATCHv3 3/4] qemu-kvm: vhost-net implementation
...ci_dev, address, val, len); } +static int virtio_pci_irqfd(void * opaque, uint16_t vector, int fd) +{ + VirtIOPCIProxy *proxy = opaque; + struct kvm_irqfd call = { }; + int r; + + if (vector >= proxy->pci_dev.msix_entries_nr) + return -EINVAL; + if (!proxy->pci_dev.msix_entry_used[vector]) + return -ENOENT; + call.fd = fd; + call.gsi = proxy->pci_dev.msix_irq_entries[vector].gsi; + r = kvm_vm_ioctl(kvm_state, KVM_IRQFD, &call); + if (r < 0) + return r; + return 0; +} + +static int virtio_pci_queuefd(void * opaque, int n, int fd) +{ +...
[PATCHv3 3/4] qemu-kvm: vhost-net implementation
2009 Aug 17
1
[PATCHv3 3/4] qemu-kvm: vhost-net implementation
...ci_dev, address, val, len); } +static int virtio_pci_irqfd(void * opaque, uint16_t vector, int fd) +{ + VirtIOPCIProxy *proxy = opaque; + struct kvm_irqfd call = { }; + int r; + + if (vector >= proxy->pci_dev.msix_entries_nr) + return -EINVAL; + if (!proxy->pci_dev.msix_entry_used[vector]) + return -ENOENT; + call.fd = fd; + call.gsi = proxy->pci_dev.msix_irq_entries[vector].gsi; + r = kvm_vm_ioctl(kvm_state, KVM_IRQFD, &call); + if (r < 0) + return r; + return 0; +} + +static int virtio_pci_queuefd(void * opaque, int n, int fd) +{ +...