search for: mrm0m

...t;0xF6, "test", Xi16, X86testpat, MRM0r>; def TEST32ri : BinOpRI_F<0xF6, "test", Xi32, X86testpat, MRM0r>; def TEST64ri32 : BinOpRI_F<0xF6, "test", Xi64, X86testpat, MRM0r>; def TEST8mi : BinOpMI_F<"test", Xi8 , X86testpat, MRM0m, 0xF6>; def TEST16mi : BinOpMI_F<"test", Xi16, X86testpat, MRM0m, 0xF6>; def TEST32mi : BinOpMI_F<"test", Xi32, X86testpat, MRM0m, 0xF6>; def TEST64mi32 : BinOpMI_F<"test", Xi64, X86testpat, MRM0m, 0xF6>; // When testing the re...

llvm/lib/Target/X86/X86InstrInfo.td: class X86Inst<bits<8> opcod, Format f, ImmType i, dag ops, string AsmStr> : Instruction { .... dag OperandList = ops; string AsmString = AsmStr; } def MOV32mi : Ii32<0xC7, MRM0m, (ops i32mem:$dst, i32imm:$src), "mov{l} {$src, $dst|$dst, $src}">; I cannot find any document on initializing the 'dag' type variable, and I cannot understand the syntax of "asmstring" either. how does the x86 asmwrite interpret the "AsmStri...

I am new to the LLVM backends, I am wondering how instruction selection is done in LLVM backends, I looked at the .td files in Target/X86, they all seem to be small and do not deal with common X86 instructions, i.e. mov, push, pop, etc. Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

...zu-Chien Chiu wrote: > llvm/lib/Target/X86/X86InstrInfo.td: > class X86Inst<bits<8> opcod, Format f, ImmType i, dag ops, string > AsmStr> : Instruction { > .... > dag OperandList = ops; > string AsmString = AsmStr; > } > > def MOV32mi : Ii32<0xC7, MRM0m, (ops i32mem:$dst, i32imm:$src), > "mov{l} {$src, $dst|$dst, $src}">; > > I cannot find any document on initializing the 'dag' type variable, > and I cannot understand the syntax of "asmstring" either. The DAG operator is just a nested s...

...t/X86/X86InstrInfo.td: > > class X86Inst<bits<8> opcod, Format f, ImmType i, dag ops, string > > AsmStr> : Instruction { > > .... > > dag OperandList = ops; > > string AsmString = AsmStr; > > } > > > > def MOV32mi : Ii32<0xC7, MRM0m, (ops i32mem:$dst, i32imm:$src), > > "mov{l} {$src, $dst|$dst, $src}">; > > > > I cannot find any document on initializing the 'dag' type variable, > > and I cannot understand the syntax of "asmstring" either. > > The D...

hi, i am struggling to understand how MRMDestReg is used in X86. in X86InstrFormat.td, we have this: class Format<bits<7> val> { bits<7> Value = val; } def MRMDestReg : Format<3> i think eventually, MRMDestReg is mapped back to ModMRM byte. but this still doesnt make sense to me why MRMDestReg is defined this way, and how it is mapped back to ModRM byte. any hint

...4 - like MRMSrcMem, but a second source register is encoded in bits [7:4] of an immediate. Memory is the 4th operand. Rarely used. MRMXm - modrm.mod==0x3, with a value of 0 in modrm[5:3]. modrm[2:0] and optional sib byte and displacement encode memory address. This is almost the same as MRM0m, but the disassembler ignores modrm[5:3] MRM0m-MRM7m - modrm.mod!=0x3, with a fixed value(0-7) in modrm[5:3]. modrm[2:0] and optional sib byte and displacement encode memory address. MRMDestReg - modrm.mod==0x3, modrm[2:0] encodes destination register. if vex.vvvv is used encodes the next...

...++i) { > - const MachineOperand& MO = MI.getOperand(i); > - if (MO.isRegister()) { > - if (isX86_64ExtendedReg(MO)) > - REX |= 1 << Bit; > - Bit++; > - } > - } > - break; > - } > - case X86II::MRM0m: case X86II::MRM1m: > - case X86II::MRM2m: case X86II::MRM3m: > - case X86II::MRM4m: case X86II::MRM5m: > - case X86II::MRM6m: case X86II::MRM7m: > - case X86II::MRMDestMem: { > - unsigned e = isTwoAddr ? 5 : 4; > - i = isTwoAddr ? 1 : 0; > - if (NumO...

I am attempting to create an instruction which takes a single 64-bit immediate. This doesn't seem like a thing that would exist already (because who needs an instruction which just takes an immediate?) How might I implement this easily? Perhaps I could use a format which encodes a register, which is then unused? Thanks for the help. Gus -------------- next part -------------- An HTML

OK, here's a new patch that adds the infrastructure and the implementation for X86, ARM and PPC of GetInstSize and GetFunctionSize. Both functions are virtual functions defined in TargetInstrInfo.h. For X86, I moved some commodity functions from X86CodeEmitter to X86InstrInfo. What do you think? Nicolas Evan Cheng wrote: > > I think both of these belong to TargetInstrInfo. And