Displaying 5 results from an estimated 5 matches for "mov16rr".
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mov16mr
2009 Dec 18
2
[LLVMdev] Questions of instruction target description of MSP430
Hi everyone,
I am puzzled by several instruction defines in MSP430.
1
def MOV16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src),
"mov.w\t{$src, $dst}",
[ ]>;
Because it's an empty dag pattern[ ], by what does instuction selector
select intruction 'MOV16rr'?
2
let canFoldAsLoad = 1, isReMaterializable = 1, mayH...
2009 Dec 19
0
[LLVMdev] Questions of instruction target description of MSP430
Hi,
1. This instruction is not selected automatically by the instruction selector. The instruction combine / select stages insert registercopies, and they are expanded later on by the copyRegToReg() function provided by the MSP430InstrInfo to this MOV16rr.
2. ReMaterializable means there is no need to find a way to preserve the value in a register : the instruction can be just be reissued whenever the value is needed. This remove some pressure on register alloc, and avoid unnecessary spilling.
3. It says that beside doing an add, it also affects (...
2010 Jun 03
0
[LLVMdev] FW: Unused argument registers can not be reused ?
...hen dumping the test function body at the path entry & exit is :
# Machine code for function test:
Function Live Ins: %R15W in reg%1024, %R14W in reg%1025, %R13W in reg%1026, %R12W in reg%1027
BB#0: derived from LLVM BB %entry
Live Ins: %R15W %R14W %R13W %R12W
%reg1027<def> = MOV16rr %R12W
%reg1026<def> = MOV16rr %R13W
%reg1025<def> = MOV16rr %R14W
%reg1024<def> = MOV16rr %R15W
%reg1028<def> = MOV16rm %reg0, <ga:@b>; mem:LD2[@b]
%reg1029<def> = ADD16rm %reg1028, %reg0, <ga:@a>, %SRW<imp-def,dea...
2010 Jun 03
2
[LLVMdev] Unused argument registers can not be reused ?
...0,40:0)
livein register: R13B dead +[0,3:0)
livein register: R12W live through +[0,40:0)
livein register: R12B dead +[0,3:0)
4 %reg1028<def> = MOV16rm %reg0, <ga:@b>; mem:LD2[@b]
register: %reg1028 +[6,14:0)
12 %reg1029<def> = MOV16rr %reg1028<kill>
register: %reg1029 +[14,30:0)
20 %reg1029<def> = ADD16rm %reg1029, %reg0, <ga:@a>, %SRW<imp-def>; mem:LD2[@a]
register: %reg1029 replace range with [14,22:1) RESULT: %reg1029,0.000000e+00 = [14,22:1)[22,30:0) 0 at 22-(30) 1 at 14-(2...
2009 Sep 18
0
[LLVMdev] Problems with live-ins and live-outs
...essors according to CFG: 0xa244c6c (#2) 0xa244cb8 (#3)
if.then5: 0xa244c6c, LLVM BB @0xa1e93c0, ID#2:
Live Ins: %R15W %R15B
Predecessors according to CFG: 0xa244c20 (#1)
%R12W<def> = MOV16ri 10
%R12W<def> = SUB16rr %R12W, %R15W<kill>, %SRW<imp-def>
%R15W<def> = MOV16rr %R12W<kill>
RET %R15W<imp-use,kill>
if.end7: 0xa244cb8, LLVM BB @0xa1f09c0, ID#3:
Live Ins: %R15W %R15B
Predecessors according to CFG: 0xa244c20 (#1)
%R15W<def> = ADD16ri %R15W, 18, %SRW<imp-def>
RET %R15W<imp-use,kill>
return: 0xa244d04, LLVM BB @0xa1efa18, I...