Displaying 5 results from an estimated 5 matches for "mov16mr".
2015 Mar 24
3
[LLVMdev] [PATCH] fix outs/ins of MOV16mr instruction (X86)
Hi,
This patch fixes outs/ins of MOV16mr instruction of X86.
Thanks.
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index e9a0431..f5b2064 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -1412,7 +1412,7 @@ let SchedRW = [WriteStore] in {
def MOV8mr : I<0x88, MRMDest...
2015 Mar 25
3
[LLVMdev] [PATCH] fix outs/ins of MOV16mr instruction (X86)
On Wed, Mar 25, 2015 at 12:56 AM, Ahmed Bougacha <ahmed.bougacha at gmail.com>
wrote:
> On Tue, Mar 24, 2015 at 7:54 AM, Jun Koi <junkoi2004 at gmail.com> wrote:
> > Hi,
> >
> > This patch fixes outs/ins of MOV16mr instruction of X86.
> >
> > Thanks.
> >
> >
> > diff --git a/lib/Target/X86/X86InstrInfo.td
> b/lib/Target/X86/X86InstrInfo.td
> > index e9a0431..f5b2064 100644
> > --- a/lib/Target/X86/X86InstrInfo.td
> > +++ b/lib/Target/X86/X86InstrInfo.td
>...
2015 Apr 02
2
[LLVMdev] [PATCH] fix outs/ins of MOV16mr instruction (X86)
On Wed, Mar 25, 2015 at 10:28 AM, Tim Northover <t.p.northover at gmail.com>
wrote:
> >> Why? i16mem here stands for the pointer, not the actual memory. A
> >> store doesn't define a pointer, so why would it be in "outs"?
> >
> > Then why does this "i16mem:$dst" belongs to "ins"? Is that wrong,
> correct?
>
> Think
2019 Sep 27
2
What about multiple MachineMemOperands in one MI (BranchFolding/MachineInstr::mayAlias)?
...ind any clear definition.)
For example BranchFolder may do things like this (also see https://godbolt.org/z/iphFH4):
# *** IR Dump Before Control Flow Optimizer ***:
bb.0.entry:
...
JCC_1 %bb.2, 5, implicit killed $eflags
JMP_1 %bb.1
bb.1.s1:
CALL64pcrel32 @bar, ... , implicit-def $rax
MOV16mr killed renamable $rax, 1, $noreg, 0, $noreg, renamable $bx :: (store 2 into %ir.r)
JMP_1 %bb.3
bb.2.s2:
CALL64pcrel32 @bar, ... , implicit-def $rax
MOV16mr killed renamable $rax, 1, $noreg, 0, $noreg, renamable $bx :: (store 2 into %ir.r2)
bb.3.cond.end:
...
# *** IR Dump After Control Fl...
2012 Jul 04
2
[LLVMdev] Assertion in PHIElimination.cpp
...%vreg58<def> = SUB16rr %vreg57, %vreg18<kill>, %EX<imp-def>; GR16:%vreg58,%vreg57 GEXR16:%vreg18
%vreg59<def> = ADD16rm %vreg58<kill>, <fi#1>, 16, %EX<imp-def>; mem:LD1[%sunkaddr21](align=8)(tbaa=!"int") GR16:%vreg59,%vreg58
MOV16mr <fi#1>, 16, %vreg59; mem:ST1[%sunkaddr21](align=8)(tbaa=!"int") GR16:%vreg59
%vreg20<def> = COPY %vreg59; GEXR16:%vreg20 GR16:%vreg59
%vreg21<def> = MOV16rm <fi#1>, 15; mem:LD1[%sunkaddr24](tbaa=!"int") GEXR16:%vreg21
%vreg81<de...