search for: machineinstructions

> From: Eric Christopher > Subject: Re: [LLVMdev] How to associate extra comments to a > MachineInstruction ? > > Should be spelled like this yes? > > Asm->OutStreamer.AddComment("foo") > Asm->EmitFoo(); > > -eric That should work at the moment that you are emitting the instructions. But what would you do when you are manipulating a

Hi, is there a convenient way to associate/add a comment to a MachineInstruction, so that in the produced assembly file, the comment is added next to the instruction ? Greetings, Jeroen Dobbelaere

On Thu, May 30, 2013 at 2:16 PM, Jeroen Dobbelaere <Jeroen.Dobbelaere at synopsys.com> wrote: >> From: Eric Christopher >> Subject: Re: [LLVMdev] How to associate extra comments to a >> MachineInstruction ? >> >> Should be spelled like this yes? >> >> Asm->OutStreamer.AddComment("foo") >> Asm->EmitFoo(); >> >> -eric

Should be spelled like this yes? Asm->OutStreamer.AddComment("foo") Asm->EmitFoo(); -eric On Thu, May 30, 2013 at 1:44 PM, Jeroen Dobbelaere <Jeroen.Dobbelaere at synopsys.com> wrote: > Hi, > > is there a convenient way to associate/add a comment to a MachineInstruction, so that > in the produced assembly file, the comment is added next to the instruction ?

Hi Chris, Gordon, Here's a patch to allow a GCStrategy to customize the places where it wants to insert safe points. I'm not sure who maintains the GC code today in LLVM (I'd be happy to take ownership, if needed). The patch just adds up a custom safepoints flag, similar to the way the GCStrategy can customize intrinsics lowering, or roots initialization. It works pretty well, as

On 2011-10-31, at 17:21, Nicolas Geoffray wrote: > Here's a patch to allow a GCStrategy to customize the places where it wants to insert safe points. I'm not sure who maintains the GC code today in LLVM (I'd be happy to take ownership, if needed). > > The patch just adds up a custom safepoints flag, similar to the way the GCStrategy can customize intrinsics lowering, or

We'll be doing something similar for our OpenVMS port.  Right now I'm using "AsmStreamer->GetCommentOS()" and writing to the stream at the assembler level but that gets aligned on a right-side column (the column is hardcoded) and you have to be in verbose mode.  So if you come up with something or have a quick design, post it so perhaps we can leverage each other's work. 

There is no generic mechanism as far as I know. You can look at AsmPrinter.cpp/emitComments() to see what situations trigger comments at the moment. - Matthias > On Feb 3, 2018, at 4:40 AM, Martin J. O'Riordan via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > When I am constructing sequences of instructions during custom lowering, I would like to be able to also add a

When I am constructing sequences of instructions during custom lowering, I would like to be able to also add a comment that appears in the generated assembly with '-S -fverbose-asm'. There is a large set of 'add*' functions to attach additional information to the MI, but I don't see one for adding comments. Is there a method I can call to attach an arbitrary string

Our TCE backend (which is not in the official llvm repo) benefits greatly from information that which memory load/store is a spill generated by register allocation. These spill memory operation can never alias with other memory operations, and our own instruction scheduler can optimize much better with better alias information. I have created a code which adds marking these spill

Is there an easy way to get the MVT::ValueType of a MachineInstruction MachineOperand? For example, the register operand of an x86 MOVAPD should have an MVT::ValueType of v2f64. A MOVAPS register operand should have an MVT::ValueType of v4f32. So given a MachineInstruction and its MachineOperands is there some easy way to derive this information? I don't see anything in TargetInstrInfo

...> > So this one needs to be coordinated. Next week, I might see about > adding MachineInstruction support to the SelectionDAG so you can load up > a DAG post-ISel and then spit it back out scheduled. That would be much appreciated, particularly if it means that we can have scheduled MachineInstructions living alongside DAGs in such a way that changing the DAG (adding/removing a couple of instructions, say) doesn't _necessarily_ require rescheduling the whole function. I'm thinking of a future JIT here, where it would be nice to be able to sprinkle/reap instrumentation code over functi...

On Monday 19 January 2009 18:21, Dan Gohman wrote: > > Dan, how does the scheduler handle memory dependence? I'm working on > > something that requires memory dependence information for > > MachineInstructions. > > At the moment, it knows simple things, like constant pool loads > don't have dependencies, and references to distinct stack slots are > independent, and so on. Ok. > I have a few ideas for how more precise memory dependencies might be > achieved. > > We have Machi...

Hi all, The register allocator that I implemented is failing in the LLVM cvs version, but not in LLVM 1.1. The generated code fails a check in the x86 peephole optimizer: llc: PeepholeOptimizer.cpp:128: bool <unnamed>::PH::PeepholeOptimize(llvm::Machi neBasicBlock&, llvm::ilist_iterator<llvm::MachineInstr>&): Assertion `MI->getNum Operands() == 2 && "These

...em. We don't currently > have any targets in-tree that require no-ops, so it may not address all > your needs out of the box, but patches are welcome :-). Dan, how does the scheduler handle memory dependence? I'm working on something that requires memory dependence information for MachineInstructions. -Dave

Thanks for the review Gordon. On Tue, Nov 1, 2011 at 2:21 AM, Gordon Henriksen <gordonhenriksen at mac.com>wrote: > On 2011-10-31, at 17:21, Nicolas Geoffray wrote: > > > Here's a patch to allow a GCStrategy to customize the places where it > wants to insert safe points. I'm not sure who maintains the GC code today > in LLVM (I'd be happy to take ownership, if

...this > possible by starting to modify the SelectionDAG Files ? > Or can i even build a "standalone" custom scheduler? > Thank you very much for any tipps. You might be interested to look at our recent scheduler generalization project in TCE [1]. In our case we convert from LLVM MachineInstructions to the IR of our custom scheduler (CFG+DDG) which is then converted back to fresh MachineBasicBlocks/MachineInstructions for assembly generation in the LLVM side. The first (non-TTA) target we are experimenting with is the Cell SPU. Eventually we hope to see the LLVM code generation framework impr...

Hi there, i created a Function Pass to retrieve the Control/Data Flow Graph from a simple program, now i would like to statically schedule the Instructions. Is this possible by starting to modify the SelectionDAG Files ? Or can i even build a "standalone" custom scheduler? Thank you very much for any tipps. Ben

...d there would stick around in the IR after the machine code was emitted, and if the function were JITted again, we'd get duplicate safe points. Another way to do it might be to add a MachineFunction pass next to createGCMachineCodeAnalysisPass() (or instead of it), which could emit appropriate MachineInstructions to implement the safe point. This, of course, forces safe points to be written in MachineInstructions instead of IR instructions, which isn't ideal. Another way might be to run a pass over the IR inserting llvm.safepoint() calls, which could be implemented as a function in the module. Then we&...

...needs to be coordinated. Next week, I might see about >> adding MachineInstruction support to the SelectionDAG so you can load up >> a DAG post-ISel and then spit it back out scheduled. > > That would be much appreciated, particularly if it means that we can have > scheduled MachineInstructions living alongside DAGs in such a way that > changing the DAG (adding/removing a couple of instructions, say) doesn't > _necessarily_ require rescheduling the whole function. I'm thinking of a > future JIT here, where it would be nice to be able to sprinkle/reap > instrumentat...