search for: ld1

Displaying 20 results from an estimated 152 matches for "ld1".

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2015 Feb 19
2
[LLVMdev] ScheduleDAGInstrs computes deps using IR Values that may be invalid
...------------------------------------ BB#14: derived from LLVM BB %if.end.1 Live Ins: %X16 %X17 %X18 %X7 %X0 %X6 %X4 %W8 %X15 %X14 %W3 %W2 %X1 %X10 %X11 %X12 %X13 %X9 Predecessors according to CFG: BB#12 %X5<def> = ADDXrr %X16, %X13 * %W19<def> = LDRBBui %X5, 1; mem:LD1[%scevgep95](tbaa=<0x6e02518>) * %W3<def> = MADDWrrr %W2<kill>, %W3<kill>, %WZR * %W2<def> = SUBWrr %W3<kill>, %W19<kill> * STRBBui %W2<kill>, %X5<kill>, 1; mem:ST1[%scevgep95](tbaa=<0x6e02518>) Successors according to...
2014 Apr 26
2
[LLVMdev] How can I get rid of "OPFL_Chain" in myCPUGenInstrInfo.inc
hi Tim,guys, it was regarding splitting 16-bit ADDC to two 8-bit ADDC+ADDE. the 8-bit ADDE instruction is defined as: let Constraints="$dst=$op0",mayStore=1, hasSideEffects=0,neverHasSideEffects=1 in def ADDErm: myInstr <0x0, (outs Intregs:$dst) (ins Intregs:$op0,MEMi:$op1), "", [set IntRegs:$dest (adde IntRegs:$op0, (load ADDRi:$op1))] > very unlucky, this
2014 Apr 28
2
[LLVMdev] How can I get rid of "OPFL_Chain" in myCPUGenInstrInfo.inc
...the said TF node was created when Selected() was called in ADDC node. 2) the source code under test short a,b; void test() { a+=b; } 3)the DAG after ADDC was seleced: Select node: 0x4977a20: ch,glue = <<Unknown Machine Node #65419>> 0x4972bd0, 0x49731d0, 0x4976c20, 0x49730d0<Mem:LD1[@a](align=2)> Result node: 0x4977a20: ch,glue = <<Unknown Machine Node #65419>> 0x4972bd0, 0x49731d0, 0x4976c20, 0x49730d0<Mem:LD1[@a](align=2)> Result DAG: SelectionDAG has 21 nodes: 0x49606f0: ch = EntryToken [ORD=1] [ID=0] 0x4972cd0: i8 = undef [ORD=1] [ID=2] 0x49735...
2011 Sep 23
2
LDA cutoff value
Hello, I have run a linear discriminant analysis for the simple 2 group case using the MASS package lda() function. With priors fixed at 0.5 and unequal n for each group, the output basically provides the group means and the LD1 value. There is no automatic output of the cutoff (decision boundary) value used to classify values of the response variable into the different groups. I have tried various unsuccessful approaches to extract this value. It is obvious that in the simple 2 group case the value will be close to the...
2009 Sep 29
1
help with lda function from MASS package
...V1 > [1,] 0.7656185 > [2,] 0.8712707 > [3,] 1.1192567 > [4,] 0.3092117 > [5,] -1.3622976 > [6,] -0.8391481 > [7,] -0.8639119 > attr(,"scaled:center") > V1 > 151.233 > attr(,"scaled:scale") > V1 > 17.23484 > > > LD1est <- read.table(textConnection(" LD1 > + 1 -2.3769280 > + 2 -2.7049437 > + 3 -3.4748309 > + 4 -0.9599825 > + 5 4.2293774 > + 6 2.6052193 > + 7 2.6820884"), header=T) > > > > scale(LD1est) > LD1 > 1 -0.7656170 > 2 -0.8712721 > 3 -...
2009 Sep 28
1
help with lda function
...3.57 5.65 0 [4,] 3.16 5.47 0 [5,] 2.58 4.46 1 [6,] 2.16 6.22 1 [7,] 3.27 3.52 1 If I do the following; "names(d)<-c("y","x1","x2") d$x1 = d$x1 * 100 d$x2 = d$x2 * 100 g<-lda( y ~ x1 + x2, data=d) v2 <- predict(g, d)", I get; LD1 1 -2.3769280 2 -2.7049437 3 -3.4748309 4 -0.9599825 5 4.2293774 6 2.6052193 7 2.6820884 However, If I do it manually, "rawdata<-matrix(scan("tab1_1. > > dat"),ncol=3,byrow=T) > group <- rawdata[,1] > X <- 100 * rawdata[,2:3] > Apf <- X[group==1,] >...
2015 Mar 03
3
[LLVMdev] ReduceLoadWidth, DAGCombiner and non 8bit loads/extloads question.
...lue.html>(); LegalOperations is false for the first pre-legalize pass and true for the post-legalize pass. The first pass is target-independent yes? So that makes sense. The issue we are having is this: we don't support 8 bit loads and we don't support 8 bit extloads, so we end up with LD1 with zext after either the first pass or the second pass (depending on the test case). If we add the TargetLowering callback method setLoadExtAction(ISD::ZEXTLOAD, MVT::i8, Expand) then it crashes during legalization and if we don't have that in then it crashes during instruction selection. Th...
2012 Aug 14
2
[LLVMdev] Load serialisation during selection DAG building
...cause my problems occur during instruction selection rather than scheduling. A simple and concrete example is a pattern like: [(set GR:$dst (add GR:$src (nvload addr:$mem)))] where nvload matches a load provided that isVolatile() is false. If the selection DAG looks like: | | LD1 LD2 ^ ^ | | \ / add ^ | \ / ST and the chain like: LD1 LD2 ^ ^ | | \ / TokenFactor ^ | ST then the add instruction is selected. However...
2002 Jan 16
1
getting the response (dependent) from formula?
I'm trying to build a vector (fitting systems of equations) and I'm having a little trouble getting the response variables from a list of formulas... bdgmodel <- lbdg ~ d1sqr + ld1 + lhg hgmodel <- lhg ~ ht2 + lht + whc inst <- ~ d1sqr + ld1 + ht2 + lht + whc systemeq <- list( bdgmodel, hgmodel ) # manually generate the y matrix... y <- cbind( matrix( lbdg ), matrix( log(hg) ) ) I would like to replace the previous line with something like....
2011 Dec 08
1
lda output missing
...axh cdlai sumlai sumbas totalbio normal 901.3722 16.66994 15.70927 0.010393258 1.672247 5.471812 27.67875 warm 972.4916 22.27247 19.64740 0.002429775 3.181994 9.892683 47.68511 ratio normal 0.01162921 warm 0.85721910 Coefficients of linear discriminants: LD1 sumstem 0.001111176 maxdbh 0.034299258 maxh -0.287343783 cdlai -2.021350057 sumlai 1.407215702 sumbas -0.419422181 totalbio 0.110403369 ratio 0.001657649 David A. Lutz, Ph. D. Center for Energy, Environment, and Sustainability Wake Forest University The Amazon Aid Founda...
2015 Mar 03
2
[LLVMdev] ReduceLoadWidth, DAGCombiner and non 8bit loads/extloads question.
1) It's crashing because LD1 is produced due to LegalOperations=false in pre-legalize pass. Then Legalization does not know how to handle it so it asserts on a default case. I don't know if it's a reasonable expectation or not but we do not have support for it. I have not tried overriding shouldReduceLoadWidth. 2) I s...
2016 Jul 29
2
Help with ISEL matching for an SDAG
I have the following selection DAG: SelectionDAG has 9 nodes: t0: ch = EntryToken t2: i64,ch = CopyFromReg t0, Register:i64 %vreg0 t16: i32,ch = load<LD1[%ptr](tbaa=<0x10023c9f448>), anyext from i8> t0, t2, undef:i64 t15: v16i8 = BUILD_VECTOR t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16 t11: ch,glue = CopyToReg t0, Register:v16i8 %V2, t15 t12: ch = PPCISD::RET_FLAG t11, Register:v16i8 %V2, t11:1 an...
2019 Dec 17
2
Build failure on powerpc64
...a static const long double tbl[] > * use exact scaling factor in long double precision > For most of these, it seems safe to leave them as is for ppc64. I would > have thought that the gcc compiler might have had issue with: > connections.c: > static long double ld1; > for (i = 0, j = 0; i < len; i++, j += size) { > ld1 = (long double) REAL(object)[i]; > format.c: > static const long double tbl[] = > ... but it doesn't. Perhaps the original code at issue: > arithmetic.c: > static LDOUBLE q_1_eps = 1 /...
2006 Apr 04
0
Fisher's discriminant functions
...data=data) > data.lda Call: lda(group ~ (v1 + v2 + v3), data = tmp.data) Prior probabilities of groups: 1 2 3 0.3333333 0.3333333 0.3333333 Group means: v1 v2 v3 1 2.0 3.5 5.5 2 10.0 8.5 8.5 3 20.5 14.5 15.0 Coefficients of linear discriminants: LD1 LD2 v1 0.8294354 0.6168736 v2 2.8623498 -1.7696711 v3 -0.7612283 0.8423363 Proportion of trace: LD1 LD2 0.9984 0.0016 In this example, I get 2 functions: LD1 and LD2 as the canonical functions for 3 groups, and what I'd need is 3 functions for my 3 groups (Fisher's disc...
2000 May 07
1
FW: Browsing issues NT WS 4.0 and Samba
...p = chris > force create mode = 0775 > force directory mode = 0775 > > [chris] > path = /u/data/ld0/chris > force user = chris > force group = chris > force create mode = 0775 > force directory mode = 0775 > writeable = no > > [sun] > path = /u/data/ld1/sun/sun > strict sync = yes > sync always = yes > force user = profadv > force group = sun > writeable = Yes > force create mode = 0775 > force directory mode = 0775 > # veto files = > /*ASI*/*AUS*/*ELA*/*ELI*/*INQ*/*NZL*/*TES*/*TRN*/*UK*/*.idx/*.int/*.gnt/ba >...
2012 Nov 08
0
mirt vs. eRm vs. ltm vs. winsteps
...;x6","x7") erm<-round(erm[order(erm$loc,decreasing=TRUE),],2) erm<-erm[c(2:4,1)] erm #I get the following order of item parameters: x2,x3,x7,x1,x4,x5,x6 library(ltm) grm<-grm(as.data.frame(pcmdat),constrained=TRUE,IRT.param=TRUE) ltm<-as.data.frame(unlist(coef.grm(grm))) ld1<-ltm[c(1,5,9,13,17,21,25),] ld2<-ltm[c(2,6,10,14,18,22,26),] ld3<-ltm[c(3,7,11,15,19,23,NA),] ltm<-as.data.frame(cbind(ld1,ld2,ld3)) ltm[7,3]<-0.5*rowSums(ltm[7,1:2])#to get the mean of ld1+ld2 when dividing by 3 names(ltm)<-c("thres1","thres2","thres3&quo...
2016 Mar 11
3
masked-load endpoints optimization
...ead the extra memory, regardless of whether this is a masked load or something else. Note that the x86 backend already does this, so either my proposal is ok for x86, or we're already doing an illegal optimization: define <4 x i32> @load_bonus_bytes(i32* %addr1, <4 x i32> %v) { %ld1 = load i32, i32* %addr1 %addr2 = getelementptr i32, i32* %addr1, i64 3 %ld2 = load i32, i32* %addr2 %vec1 = insertelement <4 x i32> undef, i32 %ld1, i32 0 %vec2 = insertelement <4 x i32> %vec1, i32 %ld2, i32 3 ret <4 x i32> %vec2 } $ ./llc -o - loadcombine.ll ... mo...
2011 Jun 05
1
[LLVMdev] MachineSink and EFLAGS
...tead if EFLAGS is live. > For an example we can look no further than the actual test which has been disabled after the fix (llvm/test/Codegen/X86/sink-hoist.ll, function zzz). > > BB#0: derived from LLVM BB %entry > %vreg0<def> = MOV8rm <fi#-2>, 1, %noreg, 0, %noreg; mem:LD1[FixedStack-2](align=4) GR8:%vreg0 > %vreg1<def> = AND8ri %vreg0, 127, %EFLAGS<imp-def,dead>; GR8:%vreg1,%vreg0 > %vreg2<def> = OR8ri %vreg0, -128, %EFLAGS<imp-def,dead>; GR8:%vreg2,%vreg0 > CMP8mi <fi#-1>, 1, %noreg, 0, %noreg, 0, %EFLAGS<imp-def>; me...
2009 Aug 05
1
Decision boundaries for lda function?
...of mine. Any help will be much appreciated. > library(MASS) > AA<-read.table("http://www.natursyn.dk/online/fingerprinting.txt",header=T) > aa.lda<-lda(as.matrix[3:9],AA$group) > aa.ld<-predict(aa.lda,dimen=2)$x > eqscplot(aa.ld,type="n",xlab="LD1", ylab="LD2",las=1) > text(aa.ld,c(rep('f',13),rep('b',10),rep('p',10))) > aa.mean<-lda(aa.ld,AA$group)$means > points(aa.mean,pch=3) Best, Thomas Larsen Leibniz-Laboratory for Stable Isotope Research Max-Eyth-Str. 11-13, 24118 Kiel, Germany...
2012 Aug 14
0
[LLVMdev] Load serialisation during selection DAG building
...ther than scheduling. > > A simple and concrete example is a pattern like: > > [(set GR:$dst (add GR:$src (nvload addr:$mem)))] > > where nvload matches a load provided that isVolatile() is false. > > If the selection DAG looks like: > > | | > LD1 LD2 > ^ ^ > | | > \ / > add > ^ > | > \ / > ST > > and the chain like: > > LD1 LD2 > ^ ^ > | | > \ / > TokenFactor &g...