search for: irq2

...cx88[0]: cmds: risc pc : 0xffffffff cx88[0]: cmds: iq wr ptr : 0xffffffff cx88[0]: cmds: iq rd ptr : 0xffffffff cx88[0]: cmds: cdt current : 0xffffffff cx88[0]: cmds: pci target : 0xffffffff cx88[0]: cmds: line / byte : 0xffffffff cx88[0]: risc0: 0xffffffff [ INVALID sol eol irq2 irq1 23 22 21 20 19 18 cnt1 cnt0 resync 14 13 12 count=4095 ] cx88[0]: risc1: 0xffffffff [ INVALID sol eol irq2 irq1 23 22 21 20 19 18 cnt1 cnt0 resync 14 13 12 count=4095 ] cx88[0]: risc2: 0xffffffff [ INVALID sol eol irq2 irq1 23 22 21 20 19 18 cnt1 cnt0 resync 14 13 12 count=4095 ] cx88[0...

...a PCI interrupt, * so allow interrupt sharing. */ -static struct irqaction fpu_irq = { math_error_irq, 0, CPU_MASK_NONE, "fpu", NULL, NULL }; +static struct irqaction fpu_irq = { + .handler = math_error_irq, + .name = "fpu" +}; + +/* + * Most legacy systems want to cascade IRQ2 to slave PIC + */ +static struct irqaction cascade_action = { + .handler = no_action, + .name = "cascade", +}; void __init init_ISA_irqs (void) { @@ -382,9 +393,6 @@ void __init native_init_IRQ(void) { int i; - /* all the set up before the call gates are initialised */ - pre_in...

...a PCI interrupt, * so allow interrupt sharing. */ -static struct irqaction fpu_irq = { math_error_irq, 0, CPU_MASK_NONE, "fpu", NULL, NULL }; +static struct irqaction fpu_irq = { + .handler = math_error_irq, + .name = "fpu" +}; + +/* + * Most legacy systems want to cascade IRQ2 to slave PIC + */ +static struct irqaction cascade_action = { + .handler = no_action, + .name = "cascade", +}; void __init init_ISA_irqs (void) { @@ -382,9 +393,6 @@ void __init native_init_IRQ(void) { int i; - /* all the set up before the call gates are initialised */ - pre_in...

..._irq(unsi if (irq & 8) { inb(0xA1); /* DUMMY - (do we need this?) */ outb(cached_A1,0xA1); - outb(0x60 + (irq & 7), 0xA0);/* ''Specific EOI'' to slave */ - outb(0x62,0x20); /* ''Specific EOI'' to master-IRQ2 */ + if ( need_eoi ) + { + outb(0x60 + (irq & 7), 0xA0);/* ''Specific EOI'' to slave */ + outb(0x62,0x20); /* ''Specific EOI'' to master-IRQ2 */ + } } else { inb(0x21); /* DUMMY - (do we...

Hi there! I just fresh-installed Xen on new server, Xeon E5-2620, and noticed following thing: node1 ~ # xl info -n host : node1 release : 3.8.8 version : #1 SMP Tue Apr 23 20:54:17 MSK 2013 machine : x86_64 nr_cpus : 6 max_cpu_id : 5 nr_nodes : 1 cores_per_socket : 6 threads_per_core

...: IOAPIC (id[0x02] address[0xfec01000] gsi_base[16]) (XEN) IOAPIC[1]: apic_id 2, version 17, address 0xfec01000, GSI 16-31 (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 high edge) (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) (XEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) ACPI: IRQ9 used by override. (XEN) Enabling APIC mode: Flat. Using 2 I/O APICs (XEN) Using ACPI (MADT) for SMP configuration information (XEN) Using scheduler: SMP Credit Scheduler (credit) (XEN) Detected 997.483 MHz processor. (XEN) Initing memory sharing. (XEN) MCE: The...

...01000] gsi_base[16]) IOAPIC[1]: apic_id 13, version 17, address 0xfec01000, GSI 16-31 ACPI: IOAPIC (id[0x0c] address[0xfec02000] gsi_base[32]) IOAPIC[2]: apic_id 12, version 17, address 0xfec02000, GSI 32-47 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) ACPI: IRQ0 used by override. ACPI: IRQ2 used by override. ACPI: IRQ5 used by override. Enabling APIC mode: Flat. Using 3 I/O APICs Using ACPI (MADT) for SMP configuration information Built 1 zonelists. Total pages: 133120 Kernel command line: ro root=/dev/VG00/VG_root Enabling fast FPU save and restore... done. Enabling unmasked SIMD...

...: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 14 global_irq 14 high edge) (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 15 global_irq 15 high edge) (XEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) ACPI: IRQ9 used by override. (XEN) ACPI: IRQ14 used by override. (XEN) ACPI: IRQ15 used by override. (XEN) Enabling APIC mode: Flat. Using 2 I/O APICs (XEN) ACPI: HPET id: 0x10de8201 base: 0xfed00000 (XEN) Using ACPI (MADT) for SMP configuration information (XEN) Using sch...

...CPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) (XEN) IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-39 (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) (XEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) ACPI: IRQ9 used by override. (XEN) Enabling APIC mode: Flat. Using 1 I/O APICs (XEN) ACPI: HPET id: 0x8086a701 base: 0xfed00000 (XEN) [VT-D]iommu.c:1168: IOMMU: unsupported (XEN) ---- print_iommu_regs ---- (XEN) drhd->address = 0 (XEN) VER = f0004800 (XEN) CAP = f000eef3f...

Hi, I have been receiving messages on a new DomU''s kern.log. I''ve done a lot of googling, but haven''t came up with anything very useful, at least not in a Xen context. I was wondering if anyone had any suggestions about what could be wrong. From everything I have read, there should be a stack trace included, but I am not seeing one. Thanks in advance, Ian. on

...CPI: IOAPIC (id[0x00] address[0xfec00000] gsi_base[0]) (XEN) IOAPIC[0]: apic_id 0, version 32, address 0xfec00000, GSI 0-23 (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) (XEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) ACPI: IRQ9 used by override. (XEN) Enabling APIC mode: Flat. Using 1 I/O APICs (XEN) ACPI: HPET id: 0x8086a701 base: 0xfed00000 (XEN) PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255 (XEN) PCI: Not using MMCONFIG. (XEN) ERST table was not found (XEN) Using...

...ecessary interrupt initialisation prior to setting up + * the "ordinary" interrupt call gates. For legacy reasons, the ISA + * interrupts should be initialised here if the machine emulates a PC + * in any way. + **/ +void __init pre_intr_init_hook(void) +{ + init_ISA_irqs(); +} + +/* + * IRQ2 is cascade interrupt to second interrupt controller + */ +static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; + +/** + * intr_init_hook - post gate setup interrupt initialisation + * + * Description: + * Fill in any interrupts that may have been left out...

...ecessary interrupt initialisation prior to setting up + * the "ordinary" interrupt call gates. For legacy reasons, the ISA + * interrupts should be initialised here if the machine emulates a PC + * in any way. + **/ +void __init pre_intr_init_hook(void) +{ + init_ISA_irqs(); +} + +/* + * IRQ2 is cascade interrupt to second interrupt controller + */ +static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; + +/** + * intr_init_hook - post gate setup interrupt initialisation + * + * Description: + * Fill in any interrupts that may have been left out...

...]: apic_id 9, version 17, address 0xfec01000, GSI 16-31 (XEN) ACPI: IOAPIC (id[0x0a] address[0xfec02000] gsi_base[32]) (XEN) IOAPIC[2]: apic_id 10, version 17, address 0xfec02000, GSI 32-47 (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) (XEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) Enabling APIC mode: Flat. Using 3 I/O APICs (XEN) Using ACPI (MADT) for SMP configuration information (XEN) Initializing CPU#0 (XEN) Detected 1993.586 MHz processor. (XEN) Using scheduler: Simple EDF Scheduler (sedf) (XEN) CPU: Trace cache: 12K uops, L1 D cache: 8K (XEN) C...

I am trying to get QNX working with Xen. I''ve going about it in a similar way as installing windows with Xen, but when I start the guest up to install the OS it hangs on the line: ''Hit Esc for .altboot.......'' If anyone has managed to get this working, or has any ideas/advice for me here it would be greatly appreciated! Bryan

...15:4 APIC version 20 (XEN) ACPI: LAPIC_NMI (acpi_id[0x00] dfl dfl lint[0x1]) (XEN) ACPI: LAPIC_NMI (acpi_id[5%\uffffe%B\uffff\u0349\uffff\uffff}\uffff\uffff\u015d\uffff\uffff\uffff\uffff\uffff}\uffff\uffff\u0161\uffff\uffff\uffff\uffff\uffff\u0655\uffffXEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) ACPI: IRQ11 used by override. (XEN) Enabling APIC mode: Flat. Using 4 I/O APICs (XEN) Using ACPI (MADT) for SMP configuration information (XEN) Initializing CPU#0 (XEN) Detected 3600.316 MHz processor. (XEN) Using scheduler: Borrowed Virtual Time (bvt) (XEN) CPU: Trace cac...

...#include <linux/interrupt.h> #include <linux/bootmem.h> #include <linux/mm.h> +#include <linux/pm.h> #include <asm/acpi.h> #include <asm/arch_hooks.h> #include <asm/processor.h> @@ -205,7 +206,6 @@ void __init intr_init_hook(void) setup_irq(2, &irq2); } - /* * Probe for the VMI option ROM */ @@ -238,6 +238,13 @@ void __init probe_vmi_rom(void) } } +/* Simple shutdown routine to power down in a VM */ +void +vmi_power_off(void) +{ + /* Shutdown halt powers off the CPU */ + shutdown_halt(); +} /* * Activate the VMI interfaces @@...

...#include <linux/interrupt.h> #include <linux/bootmem.h> #include <linux/mm.h> +#include <linux/pm.h> #include <asm/acpi.h> #include <asm/arch_hooks.h> #include <asm/processor.h> @@ -205,7 +206,6 @@ void __init intr_init_hook(void) setup_irq(2, &irq2); } - /* * Probe for the VMI option ROM */ @@ -238,6 +238,13 @@ void __init probe_vmi_rom(void) } } +/* Simple shutdown routine to power down in a VM */ +void +vmi_power_off(void) +{ + /* Shutdown halt powers off the CPU */ + shutdown_halt(); +} /* * Activate the VMI interfaces @@...

...I: IOAPIC (id[0x09] address[0xfec01000] gsi_base[24]) (XEN) IOAPIC[1]: apic_id 9, version 32, address 0xfec01000, GSI 24-47 (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) (XEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) ACPI: IRQ9 used by override. (XEN) Enabling APIC mode: Flat. Using 2 I/O APICs (XEN) ACPI: HPET id: 0x8086a701 base: 0xfed00000 (XEN) Using ACPI (MADT) for SMP configuration information (XEN) Early fatal page fault at e008:ff1ccc06 (cr2=ffffffa0, ec=0000) (XEN) Stack dump:...

...ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) (XEN) IOAPIC[0]: apic_id 2, version 3, address 0xfec00000, GSI 0-23 (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) (XEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) ACPI: IRQ9 used by override. (XEN) Enabling APIC mode: Flat. Using 1 I/O APICs (XEN) Using ACPI (MADT) for SMP configuration information (XEN) Initializing CPU#0 (XEN) Detected 1800.096 MHz processor. (XEN) Using scheduler: Simple EDF Scheduler (sedf) (XEN) CPU: CLK_CTL MS...