search for: irq0

Adding apic_verbosity=debug gives me that (hope nothing miss-typed as I have no serial console on this box). I found a lot of suggested workarounds: - noapic as suggested in output gives an noapic isn''t support - acpi_skip_timer_override has no effect at all Thx, Florian (XEN) Initing memory sharing. (XEN) AMD-Vi: IOMMU not found! (XEN) I/O virtualisation disabled (XEN) Getting

Adding apic_verbosity=debug gives me that (hope nothing miss-typed as I have no serial console on this box). I found a lot of suggested workarounds: - noapic as suggested in output gives an noapic isn''t support - acpi_skip_timer_override has no effect at all Thx, Florian (XEN) Initing memory sharing. (XEN) AMD-Vi: IOMMU not found! (XEN) I/O virtualisation disabled (XEN) Getting

...he underlying device (which is ipxe), and hooking the device interrupt so it can start getting some packets. What I'm experiencing is that if the underlying device doesn't support interrupts, i.e. the IntNumber that is returned in PXENV_UNDI_GET_INFORMATION is 0, then lpxelinux.0 will hook IRQ0 which is very bad behavior. one good example of the faulty code is in undinet.c where we open a device, we hook the IRQ regardless if its 0 or not, while in the latest iPXE code this behavior was corrected and a check expression was added to avoid such bad behavior -----Original Message----- From...

...ess 0xfec00000, GSI 0-15 (XEN) ACPI: IOAPIC (id[0x02] address[0xfec01000] gsi_base[16]) (XEN) IOAPIC[1]: apic_id 2, version 17, address 0xfec01000, GSI 16-31 (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 high edge) (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) (XEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) ACPI: IRQ9 used by override. (XEN) Enabling APIC mode: Flat. Using 2 I/O APICs (XEN) Using ACPI (MADT) for SMP configuration information (XEN) Using scheduler: SMP Credit Scheduler (credit) (XEN) Detected 997.483 MHz processor. (XEN) Init...

...sary. */ + spin_lock_irqsave(&rtc_lock, flags); + retval = get_wallclock(); + spin_unlock_irqrestore(&rtc_lock, flags); + return retval; +} #ifdef CONFIG_CPU_FREQ /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency @@ -893,6 +903,11 @@ static struct irqaction irq0 = { timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL }; +inline void time_init_hook() +{ + setup_irq(0, &irq0); +} + void __init time_init(void) { if (nohpet) @@ -932,7 +947,7 @@ void __init time_init(void) vxtime.tsc_quot = (USEC_PER_MSEC << US_SCAL...

...sary. */ + spin_lock_irqsave(&rtc_lock, flags); + retval = get_wallclock(); + spin_unlock_irqrestore(&rtc_lock, flags); + return retval; +} #ifdef CONFIG_CPU_FREQ /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency @@ -893,6 +903,11 @@ static struct irqaction irq0 = { timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL }; +inline void time_init_hook() +{ + setup_irq(0, &irq0); +} + void __init time_init(void) { if (nohpet) @@ -932,7 +947,7 @@ void __init time_init(void) vxtime.tsc_quot = (USEC_PER_MSEC << US_SCAL...

...CPU: AMD QEMU Virtual CPU version 2.5+ (family: 0x6, model: 0x6, stepping: 0x3) Performance Events: PMU not available due to virtualization, using software events only. ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 ..MP-BIOS bug: 8254 timer not connected to IO-APIC ...trying to set up timer (IRQ0) through the 8259A ... ..... (found apic 0 pin 2) ... ....... failed. ...trying to set up timer as Virtual Wire IRQ... ..... failed. ...trying to set up timer as ExtINT IRQ... ..... failed :(. Kernel panic - not syncing: IO-APIC + timer doesn't work! Boot with apic=debug and send a report. Th...

...64.h> + +#include <vmi_time.h> +#include <mach_timer.h> +#include <mach_apictimer.h> +#include <mach_schedclock.h> +#include <io_ports.h> + +#ifdef CONFIG_X86_LOCAL_APIC +#define VMI_ALARM_WIRING VMI_ALARM_WIRED_LVTT +#else +#define VMI_ALARM_WIRING VMI_ALARM_WIRED_IRQ0 +#endif + +/* Number of alarms per second. By default this is CONFIG_VMI_ALARM_HZ. */ +static int alarm_hz = CONFIG_VMI_ALARM_HZ; + +/* Cache of the value vmi_get_cycle_frequency / HZ. */ +static signed long long cycles_per_jiffy; + +/* Cache of the value vmi_get_cycle_frequency / alarm_hz. */ +s...

...64.h> + +#include <vmi_time.h> +#include <mach_timer.h> +#include <mach_apictimer.h> +#include <mach_schedclock.h> +#include <io_ports.h> + +#ifdef CONFIG_X86_LOCAL_APIC +#define VMI_ALARM_WIRING VMI_ALARM_WIRED_LVTT +#else +#define VMI_ALARM_WIRING VMI_ALARM_WIRED_IRQ0 +#endif + +/* Number of alarms per second. By default this is CONFIG_VMI_ALARM_HZ. */ +static int alarm_hz = CONFIG_VMI_ALARM_HZ; + +/* Cache of the value vmi_get_cycle_frequency / HZ. */ +static signed long long cycles_per_jiffy; + +/* Cache of the value vmi_get_cycle_frequency / alarm_hz. */ +s...

...01000] gsi_base[16]) (XEN) IOAPIC[1]: apic_id 9, version 17, address 0xfec01000, GSI 16-31 (XEN) ACPI: IOAPIC (id[0x0a] address[0xfec02000] gsi_base[32]) (XEN) IOAPIC[2]: apic_id 10, version 17, address 0xfec02000, GSI 32-47 (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) (XEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) Enabling APIC mode: Flat. Using 3 I/O APICs (XEN) Using ACPI (MADT) for SMP configuration information (XEN) Initializing CPU#0 (XEN) Detected 1993.586 MHz processor. (XEN) Using scheduler: Simple EDF Scheduler (sedf) (XEN) CPU: Trace cach...

Hi, This series corresponds do older patches in the paravirt series that was neither already applied, nor I will touch again. In general, they do not touch code that can be unified (at least, without being the unification a big problem on its own). They passed through this list a lot of times, so I feel them ready for inclusion, unless someone opposes. As with the other patches, they apply to

Hi, This series corresponds do older patches in the paravirt series that was neither already applied, nor I will touch again. In general, they do not touch code that can be unified (at least, without being the unification a big problem on its own). They passed through this list a lot of times, so I feel them ready for inclusion, unless someone opposes. As with the other patches, they apply to

...*/ - apic_wait_icr_idle(); - cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL; - /* - * Send the IPI. The write to APIC_ICR fires this off. - */ - apic_write_around(APIC_ICR, cfg); -} -#endif /* !CONFIG_SMP */ - - /* * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to * specific CPU-side IRQs. @@ -745,29 +590,6 @@ static int find_irq_entry(int apic, int } /* - * Find the pin to which IRQ[irq] (ISA) is connected - */ -static int find_isa_irq_pin(int irq, int type) -{ - int i; - - for (i = 0; i < mp_irq_entries; i++) { - int lbus = mp_irqs[i].mpc_s...

...*/ - apic_wait_icr_idle(); - cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL; - /* - * Send the IPI. The write to APIC_ICR fires this off. - */ - apic_write_around(APIC_ICR, cfg); -} -#endif /* !CONFIG_SMP */ - - /* * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to * specific CPU-side IRQs. @@ -745,29 +590,6 @@ static int find_irq_entry(int apic, int } /* - * Find the pin to which IRQ[irq] (ISA) is connected - */ -static int find_isa_irq_pin(int irq, int type) -{ - int i; - - for (i = 0; i < mp_irq_entries; i++) { - int lbus = mp_irqs[i].mpc_s...

...OAPIC (id[0x0d] address[0xfec01000] gsi_base[16]) IOAPIC[1]: apic_id 13, version 17, address 0xfec01000, GSI 16-31 ACPI: IOAPIC (id[0x0c] address[0xfec02000] gsi_base[32]) IOAPIC[2]: apic_id 12, version 17, address 0xfec02000, GSI 32-47 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) ACPI: IRQ0 used by override. ACPI: IRQ2 used by override. ACPI: IRQ5 used by override. Enabling APIC mode: Flat. Using 3 I/O APICs Using ACPI (MADT) for SMP configuration information Built 1 zonelists. Total pages: 133120 Kernel command line: ro root=/dev/VG00/VG_root Enabling fast FPU save and restore......

Fix virtual apic irq distribution. But currently we inject PIT irqs to cpu0 only. Also mute some warning messages. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Xin Li <xin.b.li@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

hi does anyone know if there are some known issues with running lpxelinux.0 with device that doesn't support Interrupts? i.e. irq function is null...

...t; is ipxe), and hooking the device interrupt so it can start getting > some packets. > > What I'm experiencing is that if the underlying device doesn't > support interrupts, i.e. the IntNumber that is returned in > PXENV_UNDI_GET_INFORMATION is 0, then lpxelinux.0 will hook IRQ0 > which is very bad behavior. > > one good example of the faulty code is in undinet.c where we open a > device, we hook the IRQ regardless if its 0 or not, while in the > latest iPXE code this behavior was corrected and a check expression > was added to avoid such bad behavior &g...

...9;'t boot or install. The cause is: At some point, Fedora 7 disables PIT interrupt by "vioapic.redirtbl[2].mask = 1, vpic.imr.bit0 = 0 (unmasked), vlapic.lvt[LINT0].mask = 1", and enables vlapic timer interrupt generating; In vmx_intr_assist() -> pt_update_irq(), we always choose IRQ0 rather than vlapic timer interrupt, because: 1) is_isa_irq_masked(v, 0) returns false due to vpic.imr.bit0 = 0; 2) the PIT''s pt->last_plt_gtime is less than vlapic timer''s -- at least I can see this on my hosts; However, in pt_update_irq() -> hvm_isa_irq_assert() -> vioa...

...2925] wcb4xxp 0000:08:00.0: Port 4: NT mode Dec 3 09:04:06 claire-ophbq3n0 kernel: [ 1720.273299] wcb4xxp 0000:08:00.0: Did not do the highestorder stuff Dec 3 09:04:06 claire-ophbq3n0 kernel: [ 1720.470984] wcb4xxp 0000:08:00.0: new card sync source: port 2 As I can see IRQ16 (from syslog) and IRQ0 from dahdi show status, what IRQ field from "dahdi show status" means ? Should this be equal to value from syslog ? Regards -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.digium.com/pipermail/asterisk-users/attachments/20081203/0285048b/attac...