search for: i56

Displaying 20 results from an estimated 26 matches for "i56".

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2009 Apr 22
2
[LLVMdev] Def/Kill flags for subregisters
I am trying to locate a bug that affects my Blackfin backend. I am having some trouble understanding the semantics of def/kill flags on machine operands when using subregisters. I compile this function: define void @i56_ls(i56 %x) nounwind { store i56 %x, i56* @i56_s ret void } And get this initial machine code: Live Ins: %R0 %R1 %reg1025D<def> = MOVE %R1 %reg1024D<def> = MOVE %R0 %reg1026D<def> = MOVE %reg1025D %reg1027P<def> = LOAD32imm <ga:i56_s> %reg1028D<def> = SR...
2010 Dec 01
2
[LLVMdev] fixed point types
...optimizations, mem ?? > Can you not just lower your fixed-point operations to widen, perform normal integer operation, shift and truncate? With LLVM's support for arbitrary-width integer types, it might work surprisingly nicely. For instance, a 8.24 multiply would be: - widen the i32s to i56s - multiply - shift right 24 - truncate to i32 Then you'd get working code free from LLVM's type legalizer and friends, and it would just be up to the backends to recognize the possibilities for doing things smarter, if they have relevant instructions. (Just like it is for rotation, etc.)...
2009 Dec 02
11
[LLVMdev] Adding multiples-of-8 integer types to MVT
Would there be any interest/opposition to extending the set of simple integer types in MVT to include the missing multiples of 8 (up to 64 bits)? That is: i24, i40, i48, i56? Adding the types to MVT (and ValueTypes.td) would allow LLVM to be targeted to architectures that have registers and operations of these sizes (for example, a 24-bit DSP that I'd like to develop a back end for has 24-, 48- and 56-bit native integer types). Back ends are currently limited to u...
2010 Dec 01
0
[LLVMdev] fixed point types
...gt; > Can you not just lower your fixed-point operations to widen, perform > normal integer operation, shift and truncate?  With LLVM's support for > arbitrary-width integer types, it might work surprisingly nicely.  For > instance, a 8.24 multiply would be: > - widen the i32s to i56s > - multiply > - shift right 24 > - truncate to i32 Wouldn't the result of 8.24 * 8.24 be 16.48, requiring widening to i64 instead of i56? > Then you'd get working code free from LLVM's type legalizer and > friends, and it would just be up to the backends to recognize...
2010 Sep 08
3
wine problem
http://i56.tinypic.com/2hn3pyx.png how do i fix this ive looked for this error already couldnt find anything and if you can help i cant agree to the tos of wow
2009 Dec 03
0
[LLVMdev] Adding multiples-of-8 integer types to MVT
Hi Ken, > Would there be any interest/opposition to extending the set of simple > integer types in MVT to include the missing multiples of 8 (up to 64 > bits)? That is: i24, i40, i48, i56? the type legalizer would need some work. Consider an architecture which has a 24 bit register. Then the type legalizer should legalize an i40 by first promoting it to an i48, then expanding that to two lots of i24. Another issue is how vectors of i24 would be represented in memory. Would succ...
2013 Feb 09
1
Troubleshooting underidentification issues in structural equation modelling (SEM)
Hi all, hope someone can help me out with this. Background Introduction I have a data set consisting of data collected from a questionnaire that I wish to validate. I have chosen to use confirmatory factor analysis to analyse this data set. Instrument The instrument consists of 11 subscales. There is a total of 68 items in the 11 subscales. Each item is scored on an integer scale between 1 to 4.
2009 Apr 22
0
[LLVMdev] Def/Kill flags for subregisters
...2009, at 12:03 AM, Jakob Stoklund Olesen wrote: > I am trying to locate a bug that affects my Blackfin backend. I am > having some trouble understanding the semantics of def/kill flags on > machine operands when using subregisters. > > I compile this function: > > define void @i56_ls(i56 %x) nounwind { > store i56 %x, i56* @i56_s > ret void > } > > And get this initial machine code: > > Live Ins: %R0 %R1 > %reg1025D<def> = MOVE %R1 > %reg1024D<def> = MOVE %R0 > %reg1026D<def> = MOVE %reg1025D > %reg1027P<def> =...
2009 Dec 03
0
[LLVMdev] Adding multiples-of-8 integer types to MVT
On Dec 2, 2009, at 12:32 PM, Ken Dyck wrote: > Would there be any interest/opposition to extending the set of simple > integer types in MVT to include the missing multiples of 8 (up to 64 > bits)? That is: i24, i40, i48, i56? > > Adding the types to MVT (and ValueTypes.td) would allow LLVM to be > targeted to architectures that have registers and operations of these > sizes (for example, a 24-bit DSP that I'd like to develop a back end > for > has 24-, 48- and 56-bit native integer types). Back...
2011 Apr 30
1
Using Asterisk + other FOSS projects to facilitate a call-in Internet Radio web-frontend
Good Evening, I'm setting up an Internet Radio website with call-in functionality, and need to know the kinds of FOSS tools I should install to get the job done. Here's an example of what I'm looking for: http://i56.tinypic.com/aafz4k.png Call protocol: [Producer calls in] [Host calls in] [Guest calls in]->[Screened by Producer, if accepted, conferenced into host] On the website they'll need to be able to call in (mic input grabbed), and listen in (without calling in). ____ I've been suggested m...
2009 Dec 06
0
[LLVMdev] Fwd: Adding multiples-of-8 integer types to MVT
...On Sat, Dec 5, 2009 at 5:33 AM, Duncan Sands <duncan.sands at math.u-psud.fr> wrote: >>> Would there be any interest/opposition to extending the set of simple >>> integer types in MVT to include the missing multiples of 8 (up to 64 >>> bits)? That is: i24, i40, i48, i56? > > By the way, the integer type legalization logic should probably go like > this: let T be an integer type. > > (1) If T is legal, do nothing. > (2) If there is a legal integer type which is bigger (in bitwidth) than T, > then promote T to the smallest legal type which is bi...
2009 Dec 05
2
[LLVMdev] Adding multiples-of-8 integer types to MVT
>> Would there be any interest/opposition to extending the set of simple >> integer types in MVT to include the missing multiples of 8 (up to 64 >> bits)? That is: i24, i40, i48, i56? By the way, the integer type legalization logic should probably go like this: let T be an integer type. (1) If T is legal, do nothing. (2) If there is a legal integer type which is bigger (in bitwidth) than T, then promote T to the smallest legal type which is bigger than T. (3) In the remaining...
2010 Sep 29
0
[LLVMdev] spilling & xmm register usage
...= fmul float %tmp7.i25.i, %tmp32.i50.i > %tmp34.i52.i = fadd float %tmp33.i51.i, 0xBFD6D1F0E0000000 > %tmp35.i53.i = fmul float %tmp7.i25.i, %tmp34.i52.i > %tmp36.i54.i = fadd float %tmp35.i53.i, 0x3FD470BF40000000 > %tmp37.i55.i = fmul float %tmp19.i37.i, %tmp36.i54.i > %tmp38.i56.i = fsub float 1.000000e+00, %tmp37.i55.i > %cmp.i59.i = fcmp olt float %tmp56.i, 0.000000e+00 > br i1 %cmp.i59.i, label %cond.then.i63.i, label %phi.exit69.i > > cond.then.i63.i: ; preds = %phi.exit.i > %tmp43.i62.i = fsub float 1.000000e+00, %tm...
2010 Sep 29
3
[LLVMdev] spilling & xmm register usage
Hello everybody, I have stumbled upon a test case (the attached module is a slightly reduced version) that shows extremely reduced performance on linux compared to windows when executed using LLVM's JIT. We narrowed the problem down to the actual code being generated, the source IR on both systems is the same. Try compiling the attached module: llc -O3 -filetype=asm -o BAD.s BAD.ll Under
2009 Nov 13
2
[LLVMdev] how to define a 24-bits register class
hi every one, i have a very strange cpu that have 24-bits reigsters, but i cant see i24 in machine value type? and if defining it as MVT others will be ok? thank you very much
2009 Nov 13
0
[LLVMdev] how to define a 24-bits register class
On Nov 13, 2009, at 6:45 AM, ether zhhb wrote: > hi every one, > > i have a very strange cpu that have 24-bits reigsters, but i cant see > i24 in machine value type? and if defining it as MVT others will be > ok? You'd want to add a new i24 MVT enum. -Chris
2009 Dec 03
1
[LLVMdev] Adding multiples-of-8 integer types to MVT
...M, Chris Lattner wrote: > > On Dec 2, 2009, at 12:32 PM, Ken Dyck wrote: > > > Would there be any interest/opposition to extending the set > of simple > > integer types in MVT to include the missing multiples of 8 > (up to 64 > > bits)? That is: i24, i40, i48, i56? > > > > Adding the types to MVT (and ValueTypes.td) would allow LLVM to be > > targeted to architectures that have registers and > operations of these > > sizes (for example, a 24-bit DSP that I'd like to develop a > back end > > for has 24-, 48- and 56...
2001 Feb 15
2
Trying to find rpmlib
While trying to install wine (rpm) on my Mandrake 7.1 system, I ran into a dependency problem. It needs rpmlib to continue. I've tried looking for it at rpmfind but came up empty. Does anyone know where I can find rpmlib? Thanks, Wayne
2011 Feb 22
5
Wine Java Error: Cannot find "winemenubuilder.exe"
Alright, so, I am trying to run a shimeji on my Mac. Shimeji's are these cute little animated characters that walk around your screen. I made a prefix that contains all the files required for the shimeji and when I try to run it I get these sorts of errors. I have no idea what is going on! I am not fluent in computer at all. Help please. ): [Image:
2010 Dec 14
2
Drop in performance
...#39;m here. If i edit the config file to use the OPENGL, (as recomended by everyone), my bar becomes red. So i'm guessing its because terrible performance: http://i51.tinypic.com/23iectl.png See the red bar. Now, let's remove that SET gxApi "opengl" from the config file: http://i56.tinypic.com/30ax502.jpg ( i had to take a photo with my mobile, because wine crashed everytime i took screenshots...with some damn fatal errors) Anyway, you can see a little improovment there, my graphics can go to fair now! BUT, in a practical way, there's no improovment at all, because i st...