search for: fixedstack0

After PrologEpilogCodeInserter I found that the instructions that restore callee saved registers S0,S1,LR are in the wrong location ,the instructions are: %S0<def> = LD %SP, 36; mem:LD4[FixedStack2] %S1<def> = LD %SP, 40; mem:LD4[FixedStack1] %LR<def> = LD %SP, 44; mem:LD4[FixedStack0] (LR is the Return address register) the whole code of print-machineinstrs are: # After PrologEpilogCodeInserter: # Machine code for function L_mpy_ls: Post SSA BB#0: derived from LLVM BB %0 Live Ins: %LR %S1 %S0 %SP<def> = ADDI %SP, -48 PROLOG_LABEL <MCSym=_tmp0> ST %LR<kill>...

...%Vrti_2 = insertelement <2 x i16> %Vrti_1, i16 %Vt4_1, i32 1 %Vt2_3 = bitcast float* %VFP_s2 to <2 x i16>* store <2 x i16> %Vrti_2, <2 x i16>* %Vt2_3, align 4  Error Log:LLVM ERROR: Cannot select: 0x9f554b0: ch = store 0x9d0f28c, 0x9f5d900, 0x9f54ba8, 0x9f54b20<ST2[FixedStack0](align=4), trunc to f16> [ID=52]  0x9f5d900: f32,ch = load 0x9f5e290, 0x9f5dd40, 0x9f54b20<LD4[%sunkaddr69]> [ORD=1810] [ID=51]  0x9f5dd40: i32 = add 0x9f55318, 0x9f5e0f8 [ORD=1808] [ID=31]  0x9f55318: i32,ch = CopyFromReg 0x9d0f28c, 0x9f6a3a0 [ORD=1796] [ID=26]  0x9f6a3a0: i32 = Register...

...ted with non-zero status 1 � � If I change the method, I use " %1 =�fptrunc float %0 �to half ", then " %2 = bitcast half %1 to i16", I meet samiliar problem, the log is following: LLVM ERROR: Cannot select: 0x9f554b0: ch = store 0x9d0f28c, 0x9f5d900, 0x9f54ba8, 0x9f54b20<ST2[FixedStack0](align=4), trunc to f16> [ID=52] 0x9f5d900: f32,ch = load 0x9f5e290, 0x9f5dd40, 0x9f54b20<LD4[%sunkaddr69]> [ORD=1810] [ID=51] 0x9f5dd40: i32 = add 0x9f55318, 0x9f5e0f8 [ORD=1808] [ID=31] 0x9f55318: i32,ch = CopyFromReg 0x9d0f28c, 0x9f6a3a0 [ORD=1796] [ID=26] 0x9f6a...

...g_addr and dest can't be the same register. This caused the following verifier error: *** Bad machine code: No live range at def *** - function: f3 - basic block: entry 0x9d68664 (BB#0) [0B;5056B) - instruction: 3688B %vreg96<earlyclobber,def> = LDDWRdPtrQ <fi#0>, 0; mem:LD2[FixedStack0](align=1) DREGS:%vreg96 - operand 0: %vreg96<earlyclobber,def> 3688e is not live in [3688r,4480r:0) 0 at 3688r *** Bad machine code: Early clobber def must be at an early-clobber slot *** - function: f3 Valno #0 is defined at 3688r in [3688r,4480r:0) 0 at 3688r I've noticed this...

...nsertelement <2 x i16> %Vrti_1, i16 %Vt4_1, i32 1 %Vt2_3 = bitcast float* %VFP_s2 to <2 x i16>* store <2 x i16> %Vrti_2, <2 x i16>* %Vt2_3, align 4    Error Log: LLVM ERROR: Cannot select: 0x9f554b0: ch = store 0x9d0f28c, 0x9f5d900, 0x9f54ba8, 0x9f54b20<ST2[FixedStack0](align=4), trunc to f16> [ID=52]  0x9f5d900: f32,ch = load 0x9f5e290, 0x9f5dd40, 0x9f54b20<LD4[%sunkaddr69]> [ORD=1810] [ID=51]  0x9f5dd40: i32 = add 0x9f55318, 0x9f5e0f8 [ORD=1808] [ID=31]  0x9f55318: i32,ch = CopyFromReg 0x9d0f28c, 0x9f6a3a0 [ORD=1796] [ID=26]  0x9f6a3a0: i32 = Regis...

...l>, %vreg59<imp-def>; aN40_0_7:%vreg59 Due to high register pressure vreg59 is spilled **** Local spiller rewriting MBB '': %vreg59:hi24<def,undef> = COPY %a1_gh<kill>, %vreg59<imp-def>; aN40_0_7:%vreg59 Store: Store40FI %a1_40<kill>,<fi#0>; mem:ST6[FixedStack0](align=2) And now the verifier complains: *** Bad machine code: Using an undefined physical register *** - function: accumconv - basic block: 0x97baae0 (BB#0) - instruction: Store40FI %a1_40<kill>,<fi#0>; mem:ST6[FixedStack0](align=2) - operand 0: %a1_40<kill> LLVM ERROR: Found...

...me register. > > This caused the following verifier error: > > *** Bad machine code: No live range at def *** > - function: f3 > - basic block: entry 0x9d68664 (BB#0) [0B;5056B) > - instruction: 3688B %vreg96<earlyclobber,def> = LDDWRdPtrQ <fi#0>, 0; mem:LD2[FixedStack0](align=1) DREGS:%vreg96 > - operand 0: %vreg96<earlyclobber,def> > 3688e is not live in [3688r,4480r:0) 0 at 3688r > > *** Bad machine code: Early clobber def must be at an early-clobber slot *** > - function: f3 > Valno #0 is defined at 3688r in [3688r,4480r:0) 0 at...

...8 x i8], [18 x i8]* @.str, i32 0, i32 0), i32 %2) ret i32 0 } Generated machine instructions (initial) BB#0: derived from LLVM BB %entry %vreg11<def> = MOVi32imm 6; GPR32:%vreg11 %vreg12<def> = MOVi32imm 5; GPR32:%vreg12 STRWui %WZR, <fi#0>, 0; mem:ST4[FixedStack0] STRWui %vreg12, <fi#1>, 0; mem:ST4[FixedStack1] GPR32:%vreg12 STRWui %vreg11, <fi#2>, 0; mem:ST4[FixedStack2] GPR32:%vreg11 ................................. Best Nisal

...caused the following verifier error: > > > > *** Bad machine code: No live range at def *** > > - function: f3 > > - basic block: entry 0x9d68664 (BB#0) [0B;5056B) > > - instruction: 3688B %vreg96<earlyclobber,def> = LDDWRdPtrQ <fi#0>, > 0; mem:LD2[FixedStack0](align=1) DREGS:%vreg96 > > - operand 0: %vreg96<earlyclobber,def> > > 3688e is not live in [3688r,4480r:0) 0 at 3688r > > > > *** Bad machine code: Early clobber def must be at an early-clobber slot > *** > > - function: f3 > > Valno #0 is defined...

...i16 %Vt4_1, i32 1 >> %Vt2_3 = bitcast float* %VFP_s2 to <2 x i16>* >> store <2 x i16> %Vrti_2, <2 x i16>* %Vt2_3, align 4 >> >> Error Log: >> LLVM ERROR: Cannot select: 0x9f554b0: ch = store 0x9d0f28c, >> 0x9f5d900, 0x9f54ba8, 0x9f54b20<ST2[FixedStack0](align=4), trunc to >> f16> [ID=52] >> 0x9f5d900: f32,ch = load 0x9f5e290, 0x9f5dd40, >> 0x9f54b20<LD4[%sunkaddr69]> [ORD=1810] [ID=51] >> 0x9f5dd40: i32 = add 0x9f55318, 0x9f5e0f8 [ORD=1808] [ID=31] >> 0x9f55318: i32,ch = CopyFromReg 0x9d0f28c, 0x9f6a3a0 [O...

...* %in %b = load <2 x i32>, <2 x i32> addrspace(1)* %b_ptr %result = add <2 x i32> %a, %b store <2 x i32> %result, <2 x i32> addrspace(1)* %out ret void } Which completely makes the tgsi backend unhappy: LLVM ERROR: Cannot select: t43: i32,ch = load<LD4[FixedStack0](align=16)> t45:1, FrameIndex:i32<0>, undef:i32 t41: i32 = FrameIndex<0> t8: i32 = undef In function: test2 Any hints on where to start looking with fixing these issues would be much appreciated. Regards, Hans

...iting an analysis pass for a custom processor. I get an unusual situation where the code generated for a BB is BB#23: derived from LLVM BB %sw.bb99 Live Ins: %vr2 %vr0 %vr1 %vr9 %vr3 %vr8 %vr4 %vr5 %vr6 Predecessors according to CFG: BB#22 %vr46<def> = LD_Iri %LV, -4; mem:LD4[FixedStack0] %vr7<def> = ADDri %vr9, 1 %vr47<def> = ADDri %vr46, -4 ST_Iri %LV, -4, %vr47<kill>; mem:ST4[%cpArg.addr] >>> %vr48<def> = LD_Iri %vr46<kill>, 0; mem:LD4[<unknown>] ST_Cri %vr9<kill>, 0, %vr48<kill>; mem:ST...

...ifier error: >> > >> > *** Bad machine code: No live range at def *** >> > - function: f3 >> > - basic block: entry 0x9d68664 (BB#0) [0B;5056B) >> > - instruction: 3688B %vreg96<earlyclobber,def> = LDDWRdPtrQ <fi#0>, >> 0; mem:LD2[FixedStack0](align=1) DREGS:%vreg96 >> > - operand 0: %vreg96<earlyclobber,def> >> > 3688e is not live in [3688r,4480r:0) 0 at 3688r >> > >> > *** Bad machine code: Early clobber def must be at an early-clobber >> slot *** >> > - function: f3 >&...

...loat @dasin(float) nounwind readnone You will get the following error: *** Bad machine code: No live range at def *** - function: f3 - basic block: entry 0x9e5d2bc (BB#0) [0B;3360B) - instruction: 2440e %vreg51<earlyclobber,def> = tLDRspi <fi#0>, 0, pred:14, pred:%noreg; mem:LD4[FixedStack0] tGPR:%vreg51 - operand 0: %vreg51<earlyclobber,def> 2440e is not live in [2440r,2976r:0) 0 at 2440r *** Bad machine code: Early clobber def must be at an early-clobber slot *** - function: f3 Valno #0 is defined at 2440r in [2440r,2976r:0) 0 at 2440r2440r LLVM ERROR: Found 2 machine...

On Jul 15, 2012, at 9:20 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Jakob, one more hint, I've placed some asserts around the code you added and noticed that the InlineSpiller::insertReload() function is not being called. > > 2012/7/14 Borja Ferrer <borja.ferav at gmail.com> > Hello Jakob, > > I'm still getting the error, I can give you any other

Hi All, So as discussed I've started working on a TGSI backend for llvm to use as a way to get compute going on nouveau (and other gpu-s). I'm still learning all the ins and outs of llvm so I do not have much to show yet. I've rebased Francisco's (curro's) latest version on top of llvm trunk, and added a commit on top to actual get it build with the latest trunk. So