search for: fifos

This is an initial series of patches to improve channel recovery on Turing GPUs with the goal of improving reliability enough to eventually enable SVM for Turing. It's likely follow up patches will be required to fully address problems with less trivial workloads than what I have been able to test thus far. This series primarily addresses a number of hardware changes to interrupt layout and

From: Thierry Reding <treding at nvidia.com> The purpose of BAR1 is primarily to make memory accesses coherent. However, some GPUs do not have BAR1 functionality. For example, the GV11B found on the Xavier SoC is DMA coherent and therefore doesn't need BAR1. Implement a variant of FIFO channels that work without a mapping of instance memory through BAR1. XXX ensure memory barriers are

Hi, I am having issues with nouveau driver in 4.11 Debian distribution kernel. I can start X session but the screen locks up e.g. when I try to exit mplayer fullscreen mode. The lock is swamped with tons of nouveau 0000:03:00.0: fifo: SCHED_ERROR 13 [] messages and I also can see some warnings ------------[ cut here ]------------ WARNING: CPU: 1 PID: 3535 at

hello, if i start a transient guest doamin via "virsh create abcd.xml" i see an additional libvirt thread and also some open files: pstree -h `pgrep libvirtd` libvirtd───11*[{libvirtd}] libvirtd 3016 root 21w REG 253,0 6044 1052094 /var/log/libvirt/libxl/abcd.log libvirtd 3016 root 22r FIFO 0,8 0t0 126124 pipe libvirtd 3016 root

Hi, On 04-12-15 09:54, Samuel Pitoiset wrote: > > > On 12/04/2015 09:45 AM, Hans de Goede wrote: <snip> >>> Please give a shot at this branch : >>> http://cgit.freedesktop.org/~hakzsam/mesa/log/?h=nvf0_compute >>> >>> It fixes the initialization of the compute state and allows me to >>> launch 'test_input_global' (ie. ./compute

On Sat, Feb 01, 2014 at 12:16:54PM +0900, Alexandre Courbot wrote: > GK20A's FIFO is compatible with NVE0, but only features 128 channels and > 1 runlist. > > Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> > --- > drivers/gpu/drm/nouveau/Makefile | 1 + > drivers/gpu/drm/nouveau/core/engine/fifo/nve0.h | 1 + >

Friends I need to get R reading from a fifo. I want it to block till there is some data in the fifo, consume what input it gets there, do some thing with it then loop back and block again. Very simple. Yes? No. The example in the documentation works OK.. zz <- fifo("foo-fifo", "w+") writeLines("abc", zz) print(readLines(zz))

tree: https://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost.git config-endian head: d8ede9b5e734748613d3e3108a4026244aa8e41f commit: 392755e77e260e8a173b228e8ecc17917f97d5eb [38/39] fixup! virtio_net: correct tags for config space fields config: arm64-allyesconfig (attached as .config) compiler: aarch64-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget

tree: https://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost.git config-endian head: df43c8f58f42ec36e91740f91ea7360f63213004 commit: e1e22056bc3641f340ed27012cfd1b8b05f83a0a [38/39] fixup! virtio_net: correct tags for config space fields config: arm64-allyesconfig (attached as .config) compiler: aarch64-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget

GK20A's FIFO is compatible with NVE0, but only features 128 channels and 1 runlist. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drivers/gpu/drm/nouveau/Makefile | 1 + drivers/gpu/drm/nouveau/core/engine/fifo/nve0.h | 1 + drivers/gpu/drm/nouveau/core/engine/fifo/nvea.c | 27 ++++++++++++++++++++++

From: Dave Airlie <airlied at redhat.com> The fence code uses the total number of channel ids to allocate a bunch of memory for fencing. This is probably not the best way to do this, but it's hard to fix right now. The GSP code realises it can fit 8 channels into a USERD page, so it claims it can support 256 channels max, but it then allocates channel ids sparsely (0, 8, 16 etc). This

https://bugs.freedesktop.org/show_bug.cgi?id=103721 Bug ID: 103721 Summary: Frequent freezes with nouveau on Thinkpad P50 Product: xorg Version: unspecified Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Driver/nouveau Assignee: nouveau at

GK20A's FIFO is compatible with NVE0, but only features 128 channels and 1 runlist. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drivers/gpu/drm/nouveau/Makefile | 1 + drivers/gpu/drm/nouveau/core/engine/fifo/nve0.h | 1 + drivers/gpu/drm/nouveau/core/engine/fifo/nvea.c | 35 ++++++++++++++++++++++

The offset should be 8 on Kepler and later. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- drm/nouveau/nvkm/engine/fifo/gk104.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Hi, According to the header[1] the offset for engine status register is 8. [1] https://github.com/kfractal/nouveau/blob/hwref/drm/nouveau/include/nvkm/hwref/gk104/fifo.h Thanks, Vince diff --git

gcc with W=1 reports drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c:451:1: error: no previous prototype for ?gf100_fifo_nonstall_block? [-Werror=missing-prototypes] 451 | gf100_fifo_nonstall_block(struct nvkm_event *event, int type, int index) | ^~~~~~~~~~~~~~~~~~~~~~~~~ gf100_fifo_nonstall_block is only used in gf100.c, so it should be static Signed-off-by: Tom Rix <trix at

Bits 28:29 of RUNLIST_BASE specify the memory target of the runlist. Set it to 0x3 (SYS_MEM_NONCOHERENT) if the runlist object resides in system memory. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nvkm/engine/fifo/gf100.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/engine/fifo/gf100.c

In https://nouveau.freedesktop.org/KernelModuleParameters.html, there is: Here is a list of engines: DEVICE DMAOBJ PBSP PCE0 PCE1 PCE2 PCRYPT PDISP PFIFO PGRAPH PMPEG PPM PPPP PVP SW Also, in debug: CLIENT I have tried to find a description of those. https://envytools.readthedocs.io/en/latest/ help a bit, but I don't find a

The following core dumps R 3.2.5, R 3.3.0 RC and R devel on Windows. I have tried to use a minimal setup (for all versions tested), i.e. C:\> cd C:\ C:\> set PATH=C:\PROGRA~1\R\R-33~1.0RC\bin C:\> set R_DEFAULT_PACKAGES=base C:\> R --quiet --vanilla > close(fifo("foo.tmp", open="wb")) [core dump] C:\> R --quiet --vanilla > con <-

On Mon, 4 Dec 2023 at 05:04, Paul Dufresne <dufresnep at zoho.com> wrote: > > In https://nouveau.freedesktop.org/KernelModuleParameters.html, there is: > Here is a list of engines: > DEVICE > DMAOBJ > PBSP > PCE0 > PCE1 > PCE2 > PCRYPT > PDISP > PFIFO > PGRAPH > PMPEG > PPM > PPPP > PVP

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: stable at vger.kernel.org --- Ian Romanick reported a kernel crash that implicated this path in a null pointer jump, which means that one of the function pointers had been nulled out. Not sure if a race there would explain it, but maybe. There is also questionable ramht usage in channv50 and various disp code. If you think this is a