Displaying 1 result from an estimated 1 matches for "fa_roff2".
Did you mean:
fa_roff0
2018 Apr 12
2
How to specify the RegisterClass of an IMPLICIT_DEF?
...the v2f32 type, but for others addressing mode context this register should be FPUabOffsetClass.
Is there a mechanism, an option to inforce/control the RegisterClass of registers defined by IMPLICIT_DEF ?
# Machine code for function vector2floatMulSum: SSA
Function Live Ins: %FA_ROFF1 in %vreg0, %FA_ROFF2 in %vreg1
BB#0: derived from LLVM BB %entry
Live Ins: %FA_ROFF1 %FA_ROFF2
%vreg1<def> = COPY %FA_ROFF2; FPUabOffsetClass:%vreg1
%vreg0<def> = COPY %FA_ROFF1; FPUabOffsetClass:%vreg0
%vreg3<def> = MOVSUTO_A_iSLo 1084227584, %RSPA<imp-use>; FPUaOff...