Displaying 5 results from an estimated 5 matches for "fa_roff0".
2018 Apr 23
2
pre-RA scheduling/live register analysis optimization (handle move) forcing spill of registers
...OffsetClass:%vreg0,%vreg5
112B %vreg7<def> = COPY %vreg6; FPUaOffsetClass:%vreg7 FPUaROUTMULRegisterClass:%vreg6
128B %vreg8<def> = FADD_A_oo %vreg4, %vreg7, %RFLAGA<imp-def,dead>; FPUaROUTADDRegisterClass:%vreg8 FPUaOffsetClass:%vreg4,%vreg7
144B %FA_ROFF0<def> = COPY %vreg8; FPUaROUTADDRegisterClass:%vreg8
176B MOVSUTO_SU_os_rpc %SU_ROFF0<kill>, %RPC<imp-def,dead>
192B NOP
# End machine code for function addproddivConst.
handleMove 64B -> 104B: %vreg4<def> = COPY %vreg3; FPUaOffsetClass:%vreg4 FPUaR...
2018 Mar 29
4
Mapping virtual registers to physical registers
...mapping as following:
MachineOperand destination = MI->getOperand(0);
MachineOperand offset = MI->getOperand(1);
unsigned destinationReg = destination.getReg();
int64_t FrameIndex = offset.getIndex();
destination.setReg(CLP::FA_ROFF0+FrameIndex);
destination.setIsDef(true);
TII->loadRegFromStackSlot(*MBB,
MI, destinationReg, FrameIndex,
&CLP::FPUaOffsetClassRegClass, TRI);
The code after custo...
2018 Mar 30
0
Mapping virtual registers to physical registers
...mapping as following:
MachineOperand destination = MI->getOperand(0);
MachineOperand offset = MI->getOperand(1);
unsigned destinationReg = destination.getReg();
int64_t FrameIndex = offset.getIndex();
destination.setReg(CLP::FA_ROFF0+FrameIndex);
destination.setIsDef(true);
TII->loadRegFromStackSlot(*MBB,
MI, destinationReg, FrameIndex,
&CLP::FPUaOffsetClassRegClass, TRI);
The code after custo...
2018 Apr 02
0
Mapping virtual registers to physical registers
... MachineOperand destination = MI->getOperand(0);
>
> MachineOperand offset = MI->getOperand(1);
>
> *unsigned*destinationReg = destination.getReg();
>
> int64_t FrameIndex = offset.getIndex();
>
> destination.setReg(CLP::FA_ROFF0+FrameIndex);
>
> destination.setIsDef(true);
>
> TII->loadRegFromStackSlot(*MBB,
>
> MI, destinationReg,
> FrameIndex,
>
>
> &am...
2018 Apr 03
1
Mapping virtual registers to physical registers
... MachineOperand destination = MI->getOperand(0);
>
> MachineOperand offset = MI->getOperand(1);
>
> *unsigned*destinationReg = destination.getReg();
>
> int64_t FrameIndex = offset.getIndex();
>
> destination.setReg(CLP::FA_ROFF0+FrameIndex);
>
> destination.setIsDef(true);
>
> TII->loadRegFromStackSlot(*MBB,
>
> MI, destinationReg,
> FrameIndex,
>
>
> &am...