Displaying 8 results from an estimated 8 matches for "escalasetflag".
2016 Jan 29
3
New register class and patterns
...eaf Cond> {
def _rr : SF_RR<op2Val, asmstr, Cond>;
def _ri : SF_RI<op2Val, asmstr, Cond>;
}
class SF_RR<bits<5> op2Val, string asmstr, PatLeaf Cond>
: InstRR<0x9, (outs), (ins GPR:$rA, GPR:$rB),
!strconcat(asmstr, "\t$rA, $rB"),
[(Escalasetflag (i32 GPR:$rA), (i32 GPR:$rB), Cond)]> {
bits<5> op2;
bits<5> rA;
bits<5> rB;
let Inst{25-21} = op2;
let Inst{20-16} = rA;
let Inst{15-11} = rB;
let op2 = op2Val;
}
class SF_RI<bits<5> op2Val, string asmstr, PatLeaf Cond>
: InstRI<0xf, (outs), (...
2016 Feb 02
2
New register class and patterns
...t; def _ri : SF_RI<op2Val, asmstr, Cond>;
> > }
> >
> > class SF_RR<bits<5> op2Val, string asmstr, PatLeaf Cond>
> > : InstRR<0x9, (outs), (ins GPR:$rA, GPR:$rB),
> > !strconcat(asmstr, "\t$rA, $rB"),
> > [(Escalasetflag (i32 GPR:$rA), (i32 GPR:$rB), Cond)]> {
> > bits<5> op2;
> > bits<5> rA;
> > bits<5> rB;
> >
> > let Inst{25-21} = op2;
> > let Inst{20-16} = rA;
> > let Inst{15-11} = rB;
> >
> > let op2 = op2Val;
> > }...
2016 Jan 30
1
New register class and patterns
...;op2Val, asmstr, Cond>;
> def _ri : SF_RI<op2Val, asmstr, Cond>;
> }
>
> class SF_RR<bits<5> op2Val, string asmstr, PatLeaf Cond>
> : InstRR<0x9, (outs), (ins GPR:$rA, GPR:$rB),
> !strconcat(asmstr, "\t$rA, $rB"),
> [(Escalasetflag (i32 GPR:$rA), (i32 GPR:$rB), Cond)]> {
> bits<5> op2;
> bits<5> rA;
> bits<5> rB;
>
> let Inst{25-21} = op2;
> let Inst{20-16} = rA;
> let Inst{15-11} = rB;
>
> let op2 = op2Val;
> }
>
It sounds to me like you are missing the...
2016 Feb 04
2
New register class and patterns
...assumption that there is an implicit register output if
there are no outputs given to the pattern? I'm also curious about how did
LLVM know that an output of this instruction was setting a flag in a
special purpose register rather than a GPR? When I look at the DAG pattern
for the instruction, (Escalasetflag (i32 GPR:$rA), immSExt16:$imm, Cond), I
can't find anything saying that it sets a flag in the special purpose
register.
I'm reposting code for convenience.
def SDT_EscalaSetFlag : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>]>;
def Escalatflag : SDNode<"EscalaISD:...
2016 Feb 04
2
New register class and patterns
...ave an output register. It sets a flag in
the special purpose register. So why creating a new register class would
cause a problem? In other words, since there is no output register, why
would LLVM start complaining. Below I'm repeating some code for reference.
Any help is appreciated.
def SDT_EscalaSetFlag : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>]>;
def Esenciasetflag : SDNode<"EsenciaISD::SET_FLAG", SDT_EsenciaSetFlag,
[SDNPOutGlue]>;
class SF_RI<bits<5> op2Val, string asmstr, PatLeaf Cond>
: InstRI<0xf, (outs), (i...
2016 Feb 03
2
New register class and patterns
On Tue, Feb 2, 2016 at 1:41 AM, Rail Shafigulin <rail at esenciatech.com>
wrote:
>
> Let me clarify.
>>
>> I'm not sure I understand what you are saying. Let me post more
>> information.
>>
>> Here is what I have defined for Escalasetflag
>>
>> def Escalasetflag : SDNode<"EscalaISD::SET_FLAG", SDT_EscalaSetFlag,
>> [SDNPOutGlue]>;
>>
>> How come it was working before and is is not working now? Clearly I'm
>> missing something, but I can't fi...
2016 Jan 29
2
New register class and patterns
I've added a new register class to my target, but haven't used any of the
new registers in any of the instructions. However when I compile llvm I get
the following error:
In SFEQ_ri: Could not infer all types in pattern
Curiously all the instructions where this error occurs are the set flag
instructions (flags like zero, less than, greater than etc).
Would anyone be able to figure out
2016 Feb 03
2
New register class and patterns
On Tue, Feb 2, 2016 at 8:42 PM, Matt Arsenault <arsenm2 at gmail.com> wrote:
>
> On Feb 2, 2016, at 16:52, Rail Shafigulin <rail at esenciatech.com> wrote:
>
> def SDT_EscalaSetFlag : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>]>;
>
>
> I think for setting an implicit register, you still need to have 1 result
> here.
>
> If you look at SDTX86CmpPTest, I think this is similar to what you are
> trying to do.
>
> -Matt
>
def SDTX86CmpPT...