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...ce the register allocator (and/or spiller) to not break certain instruction sequence. For example: phys_reg = MI1 vreg1 vreg 2 = MI2 phys_reg Is there a way to tell RA/spiller not to insert COPY or spill between MI1 and MI2? I am using greedy register allocator and inline spiller. -- Regards, Dongrui -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160509/03c0b3e6/attachment.html>

...4/CMakeLists.txt:3 (add_llvm_example) -- Configuring incomplete, errors occurred! When I try the autotools, I can get what I want by running configure with --enable-targets=some-backend Any ideas? I use cmake 2.8.0 on a fedora 10 i686 and I check out llvm from the svn repository. -- Regards, Dongrui -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110315/d7c86ad0/attachment.html>

...nstruction with one destination operand and two source operands: mac $dst, $src1, $src2 ;; $dst += $src1*$src2 Seems that it has a cycle in the pattern. So how do I specify it in the DAG? There are a few instructions in the ARM backend like this one, but the patterns are left blank. -- Regards, Dongrui -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100726/56bd7d85/attachment.html>

Hi all, I'm developing a backend for a custom architecture. The target architecture has different memory for different data types(vector and scalar). So is it possible to maintain two different stacks, one for vector and the other for scalar? ---- Regards, Dongrui She -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100920/8332f22e/attachment.html>

On Tue, Mar 15, 2011 at 6:34 PM, Dongrui She <sarevokcc at gmail.com> wrote: > However, I get the following errors whenever I don't include X86 in the > target list: on top of trunk, it seems cmake requires at least "native" (for yours, X86) target. (I reconfirmed with -DLLVM_TARGETS_TO_BUILD=ARM on x86) For wor...

...ers for each basic block in a backend for my own target. And I can get a list of live-in registers directly in MachineBasicBlock. Is there a quick way to also get the list of live-out registers without redoing the analysis. I think this information is computed and stored somewhere. -- Regards, Dongrui -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110321/d57dea89/attachment.html>

...53192.html > Sent from the LLVM - Dev mailing list archive at Nabble.com. > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > -- Regards, Dongrui -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130107/f8a918e7/attachment.html>

I have seen that most of the targets do comparison and branching in two separate instructions e.g. 'cmpl' followed by 'br' in x86 or the like. LLVM IR is also in same manner. I want to implement comparison+branching in one instruction like beq r1, r2, .label #if r1==r2 then jump to .label How to merge two instruction into one. Regards Vikram Singh -- View this

...types in pattern! def BSLLI : ArithI<0x11, "bslli ", shl, uimm5, immZExt5>; ^ It seems that defining a new register class changes how the tblgen infers the types in the DAG patterns. So what is the right way to add a register class for a different type? -- Regards, Dongrui -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100706/84969a35/attachment.html>

...LLVMConfig.cmake. It seems that the CMAKE_MODULE_PATH is never set to the install path. So it always falls back to the cmake/modules/ in the LLVM source directory, which may not be accessible for some users. Do I miss something when I configure LLVM or is that the intended behavior? -- Regards, Dongrui -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130318/c0dfdc94/attachment.html>