search for: createstackobject

Hi, I will soon be committing a change to MachineFrameInfo::CreateStackObject that removes the "bool MayNeedSP" parameter. This API change is part of larger patch that re-works stack layout passes to use analysis from the StackProtector pass to layout StackProtected objects (http://llvm-reviews.chandlerc.com/D2158). Out of tree targets will need to update their u...

On Sep 11, 2009, at 3:31 PM, David Greene wrote: > Attached is a patch to print asm comments for spill information. > We've discussed the mechanisms before but I wanted to run the > patch by everyone before I start to commit pieces. Some thoughts: The general approach to enhancing CreateStackObject and adding MachineInstr::AsmPrinterFlags seems fine to me! The testcase should use filecheck to avoid running llc 4 times. Also, it seems better to design a situation where you just have 16 live variables instead of taking some random function for gcc (you're implicitly depending on...

Hello, after some time I'm trying to build my code with the current CVS of LLVM, and have a problem. The mentioned file, around line 184, contains: if (FixedSlot == FixedSpillSlots+NumFixedSpillSlots) { // Nope, just spill it anywhere convenient. FrameIdx = FFI->CreateStackObject(RegInfo->getSpillSize(Reg)/8, RegInfo->getSpillAlignment(Reg)/8); } else { // Spill it to the stack where we must. FrameIdx = FFI->CreateFixedObject(RegInfo->getSpillSize(Reg)/8, FixedSlot-&g...

Attached is a patch to print asm comments for spill information. We've discussed the mechanisms before but I wanted to run the patch by everyone before I start to commit pieces. -Dave -------------- next part -------------- A non-text attachment was scrubbed... Name: spillcomments.patch Type: text/x-diff Size: 58930 bytes Desc: not available URL:

Hi, Is it possible to add a spill code (a pair of store /load ) to the machinecode in a pass before the instruction emitter? If so, how can I calculate the address (offset to the sp) for the spill store/load instructions? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

...avid Greene wrote: > > Attached is a patch to print asm comments for spill information. > > We've discussed the mechanisms before but I wanted to run the > > patch by everyone before I start to commit pieces. > > Some thoughts: > > The general approach to enhancing CreateStackObject and adding > MachineInstr::AsmPrinterFlags seems fine to me! Ok. > The testcase should use filecheck to avoid running llc 4 times. Also, > it seems better to design a situation where you just have 16 live > variables instead of taking some random function for gcc (you're > im...

The following problems happens with architectures, where stack alignment is smaller than the biggest preferred alignment for any data type SP pointer may point anywhere with alignment of stack alignment (4 in our case) SelectionDAGBuilder however calls CreateStackObject with preferred alignment is given data type(8 in our problemaric case. The ABI alignment for this data type is only 4) This means, that the MachineFrameInfo thinks that the stack object is aligned by 8 bytes, even though in reality if may also be aligned only by 4 bytes, of the SP points to addres...

...sing order of FrameIdxs? [1]: in fact, the way X86FrameLowering's spillCalleeSavedRegisters and PEI's calculateCalleeSavedRegisters are set up, I don't see a reason why the FrameIdxs and the generated push instructions have any relation at all. It seems that the code relies on MFI->CreateStackObject returning sequential integers. Thanks! -- Sanjoy

...8490604 The problem is in PEI::calculateCalleeSavedRegisters: // We may not be able to satisfy the desired alignment specification of // the TargetRegisterClass if the stack alignment is smaller. Use the // min. Align = std::min(Align, StackAlign); FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); This will create unaligned load/store for a callee-saved 128-bit register on the frame slot because StackAlign is 4. Adding a check for stack realignable or putting all the 128-bit registers as caller-save will fix the problem. if (!TFI->isStackRealignable()...

Vladimir Prus wrote: > What's the division by 8 for? Neither 'CreateStackObject' nor > 'getSpillAlignment' documentation say what units the size is, but > everywhere it's in bytes. In my specific case, 'getSplillAlignment' returns > 4, which becomes 0 after division. Oh, it looks that backends now should specify register size in bits. I've...

...; > > > > // We may not be able to satisfy the desired alignment > > specification > > of > > // the TargetRegisterClass if the stack alignment is smaller. Use > > the > > // min. > > Align = std::min(Align, StackAlign); > > FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); > > > > > > This will create unaligned load/store for a callee-saved 128-bit > > register on the frame slot because StackAlign is 4. > > > > > > Adding a check for stack realignable or putting all the 128-bit > > re...

...lem is in PEI::calculateCalleeSavedRegisters: > > > > // We may not be able to satisfy the desired alignment specification > of > // the TargetRegisterClass if the stack alignment is smaller. Use the > // min. > Align = std::min(Align, StackAlign); > FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); > > > This will create unaligned load/store for a callee-saved 128-bit > register on the frame slot because StackAlign is 4. > > > Adding a check for stack realignable or putting all the 128-bit > registers as caller-save will fix the prob...

...ct, the way X86FrameLowering's spillCalleeSavedRegisters and >> PEI's calculateCalleeSavedRegisters are set up, I don't see a reason >> why the FrameIdxs and the generated push instructions have any >> relation at all. It seems that the code relies on >> MFI->CreateStackObject returning sequential integers. >> >> Thanks! >> -- Sanjoy >> >> _______________________________________________ >> LLVM Developers mailing list >> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm...

...ct for reference. If you want to change the IR, I would > suggest using a FunctionPass instead of a MachineFunctionPass. Unless you > need codegen data. > > At the MachineInstr level, to allocate local memory you can use the > MachineFrameInfo interface. This provides methods like CreateStackObject > to allocate a new stack slot (which will be lowered to local memory in > PTX). The return value of these methods is an integer that represents a > FrameIndex. You can treat this as a pointer to your allocated object. You > will also need to emit the proper MachineInstr-level loads...

...IR as an immutable object for reference. If you want to change the IR, I would suggest using a FunctionPass instead of a MachineFunctionPass. Unless you need codegen data. At the MachineInstr level, to allocate local memory you can use the MachineFrameInfo interface. This provides methods like CreateStackObject to allocate a new stack slot (which will be lowered to local memory in PTX). The return value of these methods is an integer that represents a FrameIndex. You can treat this as a pointer to your allocated object. You will also need to emit the proper MachineInstr-level loads and stores to access...

...ot be able to satisfy the desired alignment > > > specification > > > of > > > // the TargetRegisterClass if the stack alignment is smaller. Use > > > the > > > // min. > > > Align = std::min(Align, StackAlign); > > > FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); > > > > > > > > > This will create unaligned load/store for a callee-saved 128-bit > > > register on the frame slot because StackAlign is 4. > > > > > > > > > Adding a check for stack realignable or putti...

...ot be able to satisfy the desired alignment > > > specification > > > of > > > // the TargetRegisterClass if the stack alignment is smaller. Use > > > the > > > // min. > > > Align = std::min(Align, StackAlign); > > > FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); > > > > > > > > > This will create unaligned load/store for a callee-saved 128-bit > > > register on the frame slot because StackAlign is 4. > > > > > > > > > Adding a check for stack realignable or p...

...f you want to change the IR, I would >> suggest using a FunctionPass instead of a MachineFunctionPass. Unless you >> need codegen data. >> >> At the MachineInstr level, to allocate local memory you can use the >> MachineFrameInfo interface. This provides methods like CreateStackObject >> to allocate a new stack slot (which will be lowered to local memory in >> PTX). The return value of these methods is an integer that represents a >> FrameIndex. You can treat this as a pointer to your allocated object. You >> will also need to emit the proper MachineIn...

...the IR, I would >>> suggest using a FunctionPass instead of a MachineFunctionPass. Unless you >>> need codegen data. >>> >>> At the MachineInstr level, to allocate local memory you can use the >>> MachineFrameInfo interface. This provides methods like CreateStackObject >>> to allocate a new stack slot (which will be lowered to local memory in >>> PTX). The return value of these methods is an integer that represents a >>> FrameIndex. You can treat this as a pointer to your allocated object. You >>> will also need to emit the...

...use the code is either expecting a > VirtualRegister or a RegisterSDNode in this location. I've checked all Unfortunately, I don't think anyone can help you until you can track down what is creating the FrameIndex. Why not set a break point in MachineFrameInfo::CreateFixedObject and CreateStackObject? Evan > > locations where I use the DAG.getCopyToReg function and none of them > pass in a frameindex. I explcitily check that I have a register before > passing in the value to Register number to CopyToReg, so this leads me > to believe that it is being generated somehow by LLVM....