search for: constantfpsdnod

I'm trying to match a ConstantFPSDNode == 0 in dag pattern for tablegen but am having some issues. So LLVM doesn't seem to accept a floating point constant literal match like: %v = call <4 x float> @foo(i32 15, float %s, float 0.0, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0) ret <4 x float> %v...

...=========================================== --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp (revision 215148) +++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp (working copy) @@ -3402,6 +3402,7 @@ } // Constant fold FP operations. + bool HasFPExceptions = TLI->hasFloatingPointExceptions(); ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); if (N1CFP) { @@ -3415,28 +3416,32 @@ switch (Opcode) { case ISD::FADD: s = V1.add(V2, APFloat::rmNearestTiesToEven); - if (s != APF...

...ectionDAG/SelectionDAG.cpp (revision 215148) >> +++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp (working copy) >> @@ -3402,6 +3402,7 @@ >> } >> >> // Constant fold FP operations. >> + bool HasFPExceptions = TLI->hasFloatingPointExceptions(); >> ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); >> ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); >> if (N1CFP) { >> @@ -3415,28 +3416,32 @@ >> switch (Opcode) { >> case ISD::FADD: >> s = V1.add(V2, APF...

Here there is the dump: SelectionDAG.cpp:81: static bool llvm::ConstantFPSDNode::isValueValidForType(llvm::EVT, const llvm::APFloat &): Assertion `VT.isFloatingPoint() && "Can only convert between FP types"' failed. 0 libLLVMSupport.so 0x00007f7405022de5 llvm::sys::PrintStackTrace(_IO_FILE*) + 37 1 libLLVMSupport.so 0x00007f74050232e3 2...

...lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -5791,7 +5791,7 @@ static bool isExactlyZeroOrOne(const TargetLowering &TLI, const SDValue &Op) { continue; } } - break; +// break; case ISD::FADD: if (ConstantFPSDNode *V0CFP = dyn_cast<ConstantFPSDNode>(V->getOperand(0))) { The single error message without CHECK-FOO is: ; CHECK: test_add_8 ^ <stdin>:125:2: note: scanning from here .cfi_endproc ^ <stdin>:127:10: note: possible intended match here .globl _test_add_1...

SelectionDAG's computeKnownBits has no case for ConstantFP, e.g. Known.ones = cast <ConstantFPSDNode>(Op)->getValueAFP ().bitcastToAPInt (); I can't easily override this in target specific code. Can anyone see an issue with submitting the patch to upstream? Suggestions for an in tree target that could trigger this would be very welcome. Cheers -------------- next part --------------...

This code lives in DAGCombiner.cpp: ------------- // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr' if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Value)) { // NOTE: If the original store is volatile, this transform must not increase // the number of stores. For example, on x86-32 an f64 can be stored in one // processor operation but an i64 (which is not legal) requires two. So the /...

/Volumes/mrs5/net/llvm/llvm/llvm/lib/Target/CellSPU/ SPUISelDAGToDAG.cpp: In function 'bool<unnamed>::isFPS16Immediate(llvm::ConstantFPSDNode*, short int&)': /Volumes/mrs5/net/llvm/llvm/llvm/lib/Target/CellSPU/ SPUISelDAGToDAG.cpp:141: warning: dereferencing type-punned pointer will break strict-aliasing rules In file included from /Volumes/mrs5/net/llvm/llvm/llvm/lib/Target/ CellSPU/SPUISelDAGToDAG.cpp:312: /Volumes/mrs5/ne...

Just ran into this as well. Did you ever open a a bug report about it? On Tue, Jun 18, 2013 at 3:43 AM, Alessio Giovanni Baroni < alessiogiovanni.baroni at gmail.com> wrote: > Here there is the dump: > > SelectionDAG.cpp:81: static bool > llvm::ConstantFPSDNode::isValueValidForType(llvm::EVT, const llvm::APFloat > &): Assertion `VT.isFloatingPoint() && "Can only convert between FP types"' > failed. > 0 libLLVMSupport.so 0x00007f7405022de5 > llvm::sys::PrintStackTrace(_IO_FILE*) + 37 > 1 libLLVMSupport.so...

...ran into this as well. Did you ever open a a bug report about it? > > > On Tue, Jun 18, 2013 at 3:43 AM, Alessio Giovanni Baroni < > alessiogiovanni.baroni at gmail.com> wrote: > >> Here there is the dump: >> >> SelectionDAG.cpp:81: static bool >> llvm::ConstantFPSDNode::isValueValidForType(llvm::EVT, const llvm::APFloat >> &): Assertion `VT.isFloatingPoint() && "Can only convert between FP types"' >> failed. >> 0 libLLVMSupport.so 0x00007f7405022de5 >> llvm::sys::PrintStackTrace(_IO_FILE*) + 37 >> 1...

Make sure you’re running LLVM with assertions enabled. You’ll get more information about what’s going wrong that way. That said, yes, this looks like a bug. Specifically, SelectionDAGLegalize::ExpandConstantFP() assumes that f32 is the smallest floating point constant type it’ll need to handle, and that MVT enum ordering reflects that. while (SVT != MVT::f32) {

Hi, if I write the following simple program: target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" define void @foo () { %1 = alloca half store half 0xH42CC, half* %1 ; 0xH42CC = 3.4 %2 = load half* %1

They looked real enough to me: /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp: In function ‘bool<unnamed>::isFPS16Immediate(llvm::ConstantFPSDNode*, short int&)’: /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp: 148: warning: dereferencing type-punned pointer will break strict- aliasing rules /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelLowering.cpp: In function ‘llvm::SDOperand LowerBUILD_VECTOR(llvm:...

...tConstant_modified.s In addition, passive nodes are omitted from scheduled during instruction scheduling such that they are free to be placed anywhere while generating the instruction sequence. Is this related with above problem of debug location ? The list of passive nodes are :- ConstantSDNode ConstantFPSDNode RegisterSDNode RegisterMaskSDNode GlobalAddressSDNode BasicBlockSDNode FrameIndexSDNode ConstantPoolSDNode JumpTableSDNode ExternalSymbolSDNode BlockAddressSDNode MDNodeSDNode Thanks Karthik -------------- next part -------------- A non-text attachment was scrubbed... Name: gdb11531.s Type: ap...

...of dev than I realised! Thanks for the link. On 19 Jan 2018 18:53, "Friedman, Eli" <efriedma at codeaurora.org> wrote: On 1/19/2018 4:01 AM, Jon Chesterfield via llvm-dev wrote: > SelectionDAG's computeKnownBits has no case for ConstantFP, e.g. > Known.ones = cast <ConstantFPSDNode>(Op)->getValueAFP ().bitcastToAPInt > (); > This was added in https://reviews.llvm.org/rL316831 . -Eli -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -------------- next par...

Specifically I would like to understand why ConstantSDNode and ConstantFPSDNode do not set the IR ordering like most other SDNode-s. These constant SD nodes also previously did not set the debugloc, but that got enabled (here: http://llvm.org/viewvc/llvm-project?view=revision&revision=237237). These constant SD nodes hard-code the order to 0. Is this intentional, or just...

...m-dev-bounces at lists.llvm.org> On Behalf Of Gautam Chakrabarti via llvm-dev Sent: Wednesday, March 28, 2018 11:58 PM To: LLVM Dev <llvm-dev at lists.llvm.org> Subject: [llvm-dev] Why do constant SD nodes not set the IROrder? Specifically I would like to understand why ConstantSDNode and ConstantFPSDNode do not set the IR ordering like most other SDNode-s. These constant SD nodes also previously did not set the debugloc, but that got enabled (here: http://llvm.org/viewvc/llvm-project?view=revision&revision=237237). These constant SD nodes hard-code the order to 0. Is this intentional, or just...

Hi Sanjay, Thanks, I saw this flag and it's definitely should be considered, but it appeared to me to be static characteristic of target platform. I'm not sure how appropriate it would be to change its value from a front-end. It says "Has", while optional flag would rather say "Uses" meaning that implementation cares about floating point exceptions. Regards, Sergey

...a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -3402,7 +3402,6 @@ SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, } // Constant fold FP operations. - bool HasFPExceptions = TLI->hasFloatingPointExceptions(); ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); if (N1CFP) { @@ -3416,30 +3415,32 @@ SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, switch (Opcode) { case ISD::FADD:...

On Dec 20, 2007, at 3:56 PM, Mike Stump wrote: > They looked real enough to me: Fixed, thanks. -Chris > > > /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp: In > function ‘bool<unnamed>::isFPS16Immediate(llvm::ConstantFPSDNode*, > short int&)’: > /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp: > 148: warning: dereferencing type-punned pointer will break strict- > aliasing rules > > > /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelLowering.cpp: In > function ‘llvm::S...