Bruno Cardoso Lopes
2007-Jul-12 00:05 UTC
[LLVMdev] backend problem with LiveInterval::removeRange
Hi all,
When compiling some programs using the Mips backend
i'm getting this assert message on lib/CodeGen/LiveInterval.cpp:227:
"Range is not entirely in interval!"
I don't know yet if it's something that is missing on the backend code
or
why
the range to be removed it outside the interval, does anyone have any clue?
A more detailed output is attached.
The program i tried to compile is :
test-suite/SingleSource/Benchmarks/Shootout/sieve.c
Cheers,
--
Bruno Cardoso Lopes
http://www.brunocardoso.org
"The Man in Black fled across the desert and the gunslinger followed"
- Childe Roland to the Dark Tower Came
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llc -debug -print-machineinstrs -soft-float -disable-fp-elim -march=mips
sieve.bc -f -o llvm_sieve.s
MERGING MOSTLY EMPTY BLOCKS - BEFORE:
bb54: ; preds = %bb49
br label %bb55
bb55: ; preds = %bb54, %cond_next
%tmp56 = load i32* %NUM ; <i32> [#uses=1]
%tmp57 = sub i32 %tmp56, 1 ; <i32> [#uses=1]
store i32 %tmp57, i32* %NUM
%tmp58 = load i32* %NUM ; <i32> [#uses=1]
%tmp59 = icmp ne i32 %tmp58, -1 ; <i1> [#uses=1]
%tmp5960 = zext i1 %tmp59 to i8 ; <i8> [#uses=1]
%toBool61 = icmp ne i8 %tmp5960, 0 ; <i1> [#uses=1]
br i1 %toBool61, label %bb, label %bb62
AFTER:
bb55: ; preds = %bb49, %cond_next
%tmp56 = load i32* %NUM ; <i32> [#uses=1]
%tmp57 = sub i32 %tmp56, 1 ; <i32> [#uses=1]
store i32 %tmp57, i32* %NUM
%tmp58 = load i32* %NUM ; <i32> [#uses=1]
%tmp59 = icmp ne i32 %tmp58, -1 ; <i1> [#uses=1]
%tmp5960 = zext i1 %tmp59 to i8 ; <i8> [#uses=1]
%toBool61 = icmp ne i8 %tmp5960, 0 ; <i1> [#uses=1]
br i1 %toBool61, label %bb, label %bb62
CGP: Found local addrmode: [Base:%argc_addr]
CGP: Found local addrmode: [Base:%argv_addr]
CGP: Found local addrmode: [Base:%argc_addr]
CGP: Found local addrmode: [Base:%argv_addr]
CGP: Found local addrmode: [4 + Base:%tmp4]
CGP: Found local addrmode: [Base:%iftmp.0]
CGP: Found local addrmode: [Base:%iftmp.0]
CGP: Found local addrmode: [Base:%iftmp.0]
CGP: Found local addrmode: [Base:%NUM]
CGP: Found local addrmode: [Base:%count]
CGP: Found local addrmode: [Base:%count]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%flags.2176 + 1*%tmp10]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%flags.2176 + 1*%tmp21]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%k]
CGP: Found local addrmode: [Base:%k]
CGP: Found local addrmode: [Base:%flags.2176 + 1*%tmp33]
CGP: Found local addrmode: [Base:%k]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%k]
CGP: Found local addrmode: [Base:%k]
CGP: Found local addrmode: [Base:%count]
CGP: Found local addrmode: [Base:%count]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%NUM]
CGP: Found local addrmode: [Base:%NUM]
CGP: Found local addrmode: [Base:%NUM]
CGP: Found local addrmode: [Base:%count]
CGP: Found local addrmode: [Base:%tmp]
CGP: Found local addrmode: [Base:%tmp]
CGP: Found local addrmode: [Base:%retval]
CGP: Found local addrmode: [Base:%retval]
CGP: Found local addrmode: [Base:%argc_addr]
CGP: Found local addrmode: [Base:%argv_addr]
CGP: Found local addrmode: [Base:%argc_addr]
CGP: Found local addrmode: [Base:%argv_addr]
CGP: Found local addrmode: [4 + Base:%tmp4]
CGP: Found local addrmode: [Base:%iftmp.0]
CGP: Found local addrmode: [Base:%iftmp.0]
CGP: Found local addrmode: [Base:%iftmp.0]
CGP: Found local addrmode: [Base:%NUM]
CGP: Found local addrmode: [Base:%count]
CGP: Found local addrmode: [Base:%count]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%flags.2176 + 1*%tmp10]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%flags.2176 + 1*%tmp21]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%k]
CGP: Found local addrmode: [Base:%k]
CGP: Found local addrmode: [Base:%flags.2176 + 1*%tmp33]
CGP: Found local addrmode: [Base:%k]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%k]
CGP: Found local addrmode: [Base:%k]
CGP: Found local addrmode: [Base:%count]
CGP: Found local addrmode: [Base:%count]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%i]
CGP: Found local addrmode: [Base:%NUM]
CGP: Found local addrmode: [Base:%NUM]
CGP: Found local addrmode: [Base:%NUM]
CGP: Found local addrmode: [Base:%count]
CGP: Found local addrmode: [Base:%tmp]
CGP: Found local addrmode: [Base:%tmp]
CGP: Found local addrmode: [Base:%retval]
CGP: Found local addrmode: [Base:%retval]
=== main
Replacing.3 0x88c94d8: i1 = xor 0x88c93c8, 0x88c9470
With: 0x88c89a8: i1 = setcc 0x88c91f8, 0x88c9260, 0x88c9118
Replacing.3 0x88c89a8: i1 = setcc 0x88c91f8, 0x88c9260, 0x88c9118
With: 0x88c8a20: i1 = setcc 0x88c9180, 0x88c94d8, 0x88c9118
Replacing.3 0x88c8a20: i1 = setcc 0x88c9180, 0x88c94d8, 0x88c9118
With: 0x88c89a8: i1 = setcc 0x88c8fc8, 0x88c9060, 0x88c9360
Lowered selection DAG:
SelectionDAG has 16 nodes:
0x88c8c00: i32 = Constant <0>
0x88c8c68: i32 = Constant <536870912>
0x88c88a0: ch = EntryToken
0x88c8c00: <multiple use>
0x88c8c00: <multiple use>
0x88c8c68: <multiple use>
0x88c8c68: <multiple use>
0x88c8d18: i32,i32,ch = formal_arguments 0x88c88a0, 0x88c8c00, 0x88c8c00,
0x88c8c68, 0x88c8c68
0x88c8d70: i32 = FrameIndex <0>
0x88c8dd8: i32 = undef
0x88c8d18: <multiple use>
0x88c8d18: <multiple use>
0x88c8d70: <multiple use>
0x88c8dd8: <multiple use>
0x88c8e30: ch = store 0x88c8d18:2, 0x88c8d18, 0x88c8d70, 0x88c8dd8
0x88c8d18: <multiple use>
0x88c8ec8: i32 = FrameIndex <1>
0x88c8dd8: <multiple use>
0x88c8f30: ch = store 0x88c8e30, 0x88c8d18:1, 0x88c8ec8, 0x88c8dd8
0x88c8d70: <multiple use>
0x88c8dd8: <multiple use>
0x88c8fc8: i32,ch = load 0x88c8f30, 0x88c8d70, 0x88c8dd8
0x88c94d8: i1 = Constant <0>
0x88c8fc8: <multiple use>
0x88c8fc8: <multiple use>
0x88c9060: i32 = Constant <2>
0x88c9360: ch = setne
0x88c89a8: i1 = setcc 0x88c8fc8, 0x88c9060, 0x88c9360
0x88c9540: ch = BasicBlock <cond_false 0x88c7db8>
0x88c95a8: ch = brcond 0x88c8fc8:1, 0x88c89a8, 0x88c9540
Legalized selection DAG:
SelectionDAG has 16 nodes:
0x88c88a0: ch = EntryToken
0x88c8d70: i32 = FrameIndex <0>
0x88c8dd8: i32 = undef
0x88c88a0: <multiple use>
0x88c88a0: <multiple use>
0x88c9470: i32 = Register #1024
0x88c93c8: i32,ch = CopyFromReg 0x88c88a0, 0x88c9470
0x88c8d70: <multiple use>
0x88c8dd8: <multiple use>
0x88c8e30: ch = store 0x88c88a0, 0x88c93c8, 0x88c8d70, 0x88c8dd8
0x88c88a0: <multiple use>
0x88c90f8: i32 = Register #1025
0x88c9160: i32,ch = CopyFromReg 0x88c88a0, 0x88c90f8
0x88c8ec8: i32 = FrameIndex <1>
0x88c8dd8: <multiple use>
0x88c8f30: ch = store 0x88c8e30, 0x88c9160, 0x88c8ec8, 0x88c8dd8
0x88c8d70: <multiple use>
0x88c8dd8: <multiple use>
0x88c8fc8: i32,ch = load 0x88c8f30, 0x88c8d70, 0x88c8dd8
0x88c8fc8: <multiple use>
0x88c8fc8: <multiple use>
0x88c9060: i32 = Constant <2>
0x88c9360: ch = setne
0x88c88f8: i32 = setcc 0x88c8fc8, 0x88c9060, 0x88c9360
0x88c9540: ch = BasicBlock <cond_false 0x88c7db8>
0x88c95a8: ch = brcond 0x88c8fc8:1, 0x88c88f8, 0x88c9540
entry: 0x88c7918, LLVM BB @0x88bf1f8, ID#0:
Successors according to CFG: 0x88c7db8 (#2) 0x88c79a8 (#1)
===== Instruction selection begins:
Selecting: 0x88c95a8: ch = brcond 0x88c8fc8:1, 0x88c88f8, 0x88c9540
=> 0x88c8970: ch = BNE 0x88c8fc8, 0x88c9060, 0x88c9540, 0x88c8fc8:1
Selecting: 0x88c9540: ch = BasicBlock <cond_false 0x88c7db8>
=> 0x88c9540: ch = BasicBlock <cond_false 0x88c7db8>
Selecting: 0x88c9060: i32 = Constant <2>
=> 0x88c9060: i32 = ADDiu 0x88c9360, 0x88c88f8
Selecting: 0x88c8fc8: i32,ch = load 0x88c8f30, 0x88c8d70, 0x88c8dd8
=> 0x88c8a98: i32,ch = LW 0x88c8a30, 0x88c89c8, 0x88c8f30
Selecting: 0x88c8f30: ch = store 0x88c8e30, 0x88c9160, 0x88c8ec8, 0x88c8dd8
=> 0x88c8b10: ch = SW 0x88c9160, 0x88c8a30, 0x88c8fc8, 0x88c8e30
Selecting: 0x88c9160: i32,ch = CopyFromReg 0x88c88a0, 0x88c90f8
=> 0x88c9160: i32,ch = CopyFromReg 0x88c88a0, 0x88c90f8
Selecting: 0x88c90f8: i32 = Register #1025
=> 0x88c90f8: i32 = Register #1025
Selecting: 0x88c8e30: ch = store 0x88c88a0, 0x88c93c8, 0x88c8d70, 0x88c8dd8
=> 0x88c8ec8: ch = SW 0x88c93c8, 0x88c8a30, 0x88c89c8, 0x88c88a0
Selecting: 0x88c93c8: i32,ch = CopyFromReg 0x88c88a0, 0x88c9470
=> 0x88c93c8: i32,ch = CopyFromReg 0x88c88a0, 0x88c9470
Selecting: 0x88c9470: i32 = Register #1024
=> 0x88c9470: i32 = Register #1024
Selecting: 0x88c88a0: ch = EntryToken
=> 0x88c88a0: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c88a0: ch = EntryToken
*** Scheduling [0]: SU(1): 0x88c9060: i32 = ADDiu 0x88c9360, 0x88c88f8
*** Scheduling [1]: SU(2): 0x88c93c8: i32,ch = CopyFromReg 0x88c88a0, 0x88c9470
*** Scheduling [2]: SU(7): 0x88c8ec8: ch = SW 0x88c93c8, 0x88c8a30, 0x88c89c8,
0x88c88a0
*** Scheduling [3]: SU(3): 0x88c9160: i32,ch = CopyFromReg 0x88c88a0, 0x88c90f8
*** Scheduling [4]: SU(6): 0x88c8b10: ch = SW 0x88c9160, 0x88c8a30, 0x88c8fc8,
0x88c8ec8
*** Scheduling [5]: SU(5): 0x88c8a98: i32,ch = LW 0x88c8a30, 0x88c89c8,
0x88c8b10
*** Scheduling [6]: SU(4): 0x88c8970: ch = BNE 0x88c8a98, 0x88c9060, 0x88c9540,
0x88c8a98:1
*** Final schedule ***
SU(0): 0x88c88a0: ch = EntryToken
SU(1): 0x88c9060: i32 = ADDiu 0x88c9360, 0x88c88f8
SU(2): 0x88c93c8: i32,ch = CopyFromReg 0x88c88a0, 0x88c9470
SU(7): 0x88c8ec8: ch = SW 0x88c93c8, 0x88c8a30, 0x88c89c8, 0x88c88a0
SU(3): 0x88c9160: i32,ch = CopyFromReg 0x88c88a0, 0x88c90f8
SU(6): 0x88c8b10: ch = SW 0x88c9160, 0x88c8a30, 0x88c8fc8, 0x88c8ec8
SU(5): 0x88c8a98: i32,ch = LW 0x88c8a30, 0x88c89c8, 0x88c8b10
SU(4): 0x88c8970: ch = BNE 0x88c8a98, 0x88c9060, 0x88c9540, 0x88c8a98:1
Selected machine code:
entry: 0x88c7918, LLVM BB @0x88bf1f8, ID#0:
%reg1024 = ADDu %ZERO, %4
%reg1025 = ADDu %ZERO, %5
%reg1026 = ADDiu %ZERO, 2
SW %reg1024, 0, <fi#0>
SW %reg1025, 0, <fi#1>
%reg1027 = LW 0, <fi#0>
BNE %reg1027, %reg1026, mbb<cond_false,0x88c7db8>
Successors according to CFG: 0x88c7db8 (#2) 0x88c79a8 (#1)
Total amount of phi nodes to update: 0
Lowered selection DAG:
SelectionDAG has 16 nodes:
0x88c8810: i32 = Constant <0>
0x88c9210: <multiple use>
0x88c8eb0: <multiple use>
0x88c87a8: ch = TokenFactor 0x88c9210:1, 0x88c8eb0:1
0x88c8810: <multiple use>
0x88c8810: <multiple use>
0x88c8810: <multiple use>
0x88c8740: i32 = GlobalAddress <i32 (i8*)* @atoi> 0
0x88c8eb0: <multiple use>
0x88c8878: i32 = Constant <536870912>
0x88c88e0: i32,ch = call 0x88c87a8, 0x88c8810, 0x88c8810, 0x88c8810,
0x88c8740, 0x88c8eb0, 0x88c8878
0x88c93d0: <multiple use>
0x88c9210: <multiple use>
0x88c90f8: i32 = Constant <4>
0x88c9160: i32 = add 0x88c9210, 0x88c90f8
0x88c8fc8: <multiple use>
0x88c8eb0: i32,ch = load 0x88c93d0, 0x88c9160, 0x88c8fc8
0x88c8fc8: i32 = undef
0x88c93d0: <multiple use>
0x88c9470: i32 = FrameIndex <1>
0x88c8fc8: <multiple use>
0x88c9210: i32,ch = load 0x88c93d0, 0x88c9470, 0x88c8fc8
0x88c93d0: ch = EntryToken
0x88c88e0: <multiple use>
0x88c88e0: <multiple use>
0x88c8938: i32 = FrameIndex <3>
0x88c8fc8: <multiple use>
0x88c89a0: ch = store 0x88c88e0:1, 0x88c88e0, 0x88c8938, 0x88c8fc8
0x88c8a38: ch = BasicBlock <cond_next 0x88c7e48>
0x88c8aa0: ch = br 0x88c89a0, 0x88c8a38
Legalized selection DAG:
SelectionDAG has 22 nodes:
0x88c8810: i32 = Constant <0>
0x88c9210: <multiple use>
0x88c8eb0: <multiple use>
0x88c87a8: ch = TokenFactor 0x88c9210:1, 0x88c8eb0:1
0x88c8810: <multiple use>
0x88ca410: ch,flag = callseq_start 0x88c87a8, 0x88c8810
0x88ca478: <multiple use>
0x88c8eb0: <multiple use>
0x88c8b08: ch,flag = CopyToReg 0x88ca410, 0x88ca478, 0x88c8eb0
0x88c8b08: <multiple use>
0x88ca1e8: i32 = TargetGlobalAddress <i32 (i8*)* @atoi> 0
0x88ca478: <multiple use>
0x88c8b08: <multiple use>
0x88c8b80: ch,flag = MipsISD::JmpLink 0x88c8b08, 0x88ca1e8, 0x88ca478,
0x88c8b08:1
0x88c8b80: <multiple use>
0x88c8810: <multiple use>
0x88c8b80: <multiple use>
0x88c8bd8: ch,flag = callseq_end 0x88c8b80, 0x88c8810, 0x88c8b80:1
0x88c8bd8: <multiple use>
0x88c8cf0: i32 = Register 2
0x88c8bd8: <multiple use>
0x88c8d58: i32,ch,flag = CopyFromReg 0x88c8bd8, 0x88c8cf0, 0x88c8bd8:1
0x88c93d0: <multiple use>
0x88c9210: <multiple use>
0x88c90f8: i32 = Constant <4>
0x88c9160: i32 = add 0x88c9210, 0x88c90f8
0x88c8fc8: <multiple use>
0x88c8eb0: i32,ch = load 0x88c93d0, 0x88c9160, 0x88c8fc8
0x88c8fc8: i32 = undef
0x88c93d0: <multiple use>
0x88c9470: i32 = FrameIndex <1>
0x88c8fc8: <multiple use>
0x88c9210: i32,ch = load 0x88c93d0, 0x88c9470, 0x88c8fc8
0x88c93d0: ch = EntryToken
0x88ca478: i32 = Register 4
0x88c8d58: <multiple use>
0x88c8d58: <multiple use>
0x88c8938: i32 = FrameIndex <3>
0x88c8fc8: <multiple use>
0x88c89a0: ch = store 0x88c8d58:1, 0x88c8d58, 0x88c8938, 0x88c8fc8
0x88c8bd8: <multiple use>
0x88c8c50: ch = TokenFactor 0x88c89a0, 0x88c8bd8
0x88c8a38: ch = BasicBlock <cond_next 0x88c7e48>
0x88c8aa0: ch = br 0x88c8c50, 0x88c8a38
cond_true: 0x88c79a8, LLVM BB @0x88be168, ID#1:
Predecessors according to CFG: 0x88c7918 (#0)
Successors according to CFG: 0x88c7e48 (#3)
===== Instruction selection begins:
Selecting: 0x88c8aa0: ch = br 0x88c8c50, 0x88c8a38
=> 0x88c8dd0: ch = J 0x88c8a38, 0x88c8c50
Selecting: 0x88c8a38: ch = BasicBlock <cond_next 0x88c7e48>
=> 0x88c8a38: ch = BasicBlock <cond_next 0x88c7e48>
Selecting: 0x88c8c50: ch = TokenFactor 0x88c89a0, 0x88c8bd8
=> 0x88c8c50: ch = TokenFactor 0x88c89a0, 0x88c8bd8
Selecting: 0x88c89a0: ch = store 0x88c8d58:1, 0x88c8d58, 0x88c8938, 0x88c8fc8
=> 0x88ca2b8: ch = SW 0x88c8d58, 0x88ca250, 0x88c8aa0, 0x88c8d58:1
Selecting: 0x88c8d58: i32,ch,flag = CopyFromReg 0x88c8bd8, 0x88c8cf0,
0x88c8bd8:1
=> 0x88c8d58: i32,ch,flag = CopyFromReg 0x88c8bd8, 0x88c8cf0, 0x88c8bd8:1
Selecting: 0x88c8bd8: ch,flag = callseq_end 0x88c8b80, 0x88c8810, 0x88c8b80:1
=> 0x88c8bd8: ch,flag = callseq_end 0x88c8b80, 0x88c8810, 0x88c8b80:1
Selecting: 0x88c8b80: ch,flag = MipsISD::JmpLink 0x88c8b08, 0x88ca1e8,
0x88ca478, 0x88c8b08:1
=> 0x88c8b80: ch,flag = MipsISD::JmpLink 0x88c8b08, 0x88ca1e8, 0x88ca478,
0x88c8b08:1
Selecting: 0x88c8b08: ch,flag = CopyToReg 0x88ca410, 0x88ca478, 0x88c8eb0
=> 0x88c8b08: ch,flag = CopyToReg 0x88ca410, 0x88ca478, 0x88c8eb0
Selecting: 0x88ca478: i32 = Register 4
=> 0x88ca478: i32 = Register 4
Selecting: 0x88ca410: ch,flag = callseq_start 0x88c87a8, 0x88c8810
=> 0x88ca410: ch,flag = callseq_start 0x88c87a8, 0x88c8810
Selecting: 0x88c87a8: ch = TokenFactor 0x88c9210:1, 0x88c8eb0:1
=> 0x88c87a8: ch = TokenFactor 0x88c9210:1, 0x88c8eb0:1
Selecting: 0x88c8eb0: i32,ch = load 0x88c93d0, 0x88c9160, 0x88c8fc8
=> 0x88c89a0: i32,ch = LW 0x88c8810, 0x88c9210, 0x88c93d0
Selecting: 0x88c9210: i32,ch = load 0x88c93d0, 0x88c9470, 0x88c8fc8
=> 0x88c8eb0: i32,ch = LW 0x88ca250, 0x88ca3e0, 0x88c93d0
Selecting: 0x88c93d0: ch = EntryToken
=> 0x88c93d0: ch = EntryToken
Selecting: 0x88c8cf0: i32 = Register 2
=> 0x88c8cf0: i32 = Register 2
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c93d0: ch = EntryToken
*** Scheduling [1]: SU(10): 0x88c8eb0: i32,ch = LW 0x88ca250, 0x88ca3e0,
0x88c93d0
*** Scheduling [2]: SU(9): 0x88c89a0: i32,ch = LW 0x88c8810, 0x88c8eb0,
0x88c93d0
*** Scheduling [3]: SU(1): 0x88c87a8: ch = TokenFactor 0x88c8eb0:1, 0x88c89a0:1
*** Scheduling [4]: SU(8): 0x88c8938: ch,flag = ADJCALLSTACKDOWN 0x88ca250,
0x88c87a8
*** Scheduling [5]: SU(2): 0x88c8b08: ch,flag = CopyToReg 0x88c8938, 0x88ca478,
0x88c89a0
*** Scheduling [6]: SU(7): 0x88ca378: ch,flag = JAL 0x88ca1e8, 0x88c8b08
*** Scheduling [7]: SU(3): 0x88c8d58: i32,ch,flag = CopyFromReg 0x88ca310,
0x88c8cf0, 0x88ca310:1
0x88ca310: ch,flag = ADJCALLSTACKUP 0x88ca250, 0x88ca378
*** Scheduling [8]: SU(6): 0x88ca2b8: ch = SW 0x88c8d58, 0x88ca250, 0x88c8aa0,
0x88c8d58:1
*** Scheduling [9]: SU(4): 0x88c8c50: ch = TokenFactor 0x88ca2b8, 0x88ca310
*** Scheduling [10]: SU(5): 0x88c8dd0: ch = J 0x88c8a38, 0x88c8c50
*** Final schedule ***
SU(0): 0x88c93d0: ch = EntryToken
SU(10): 0x88c8eb0: i32,ch = LW 0x88ca250, 0x88ca3e0, 0x88c93d0
SU(9): 0x88c89a0: i32,ch = LW 0x88c8810, 0x88c8eb0, 0x88c93d0
SU(1): 0x88c87a8: ch = TokenFactor 0x88c8eb0:1, 0x88c89a0:1
SU(8): 0x88c8938: ch,flag = ADJCALLSTACKDOWN 0x88ca250, 0x88c87a8
SU(2): 0x88c8b08: ch,flag = CopyToReg 0x88c8938, 0x88ca478, 0x88c89a0
SU(7): 0x88ca378: ch,flag = JAL 0x88ca1e8, 0x88c8b08
SU(3): 0x88c8d58: i32,ch,flag = CopyFromReg 0x88ca310, 0x88c8cf0, 0x88ca310:1
0x88ca310: ch,flag = ADJCALLSTACKUP 0x88ca250, 0x88ca378
SU(6): 0x88ca2b8: ch = SW 0x88c8d58, 0x88ca250, 0x88c8aa0, 0x88c8d58:1
SU(4): 0x88c8c50: ch = TokenFactor 0x88ca2b8, 0x88ca310
SU(5): 0x88c8dd0: ch = J 0x88c8a38, 0x88c8c50
Selected machine code:
cond_true: 0x88c79a8, LLVM BB @0x88be168, ID#1:
Predecessors according to CFG: 0x88c7918 (#0)
%reg1028 = LW 0, <fi#1>
%reg1029 = LW 4, %reg1028
ADJCALLSTACKDOWN 0, %SP<imp-def>, %SP<imp-use>
%4 = ADDu %ZERO, %reg1029
JAL <ga:atoi>
ADJCALLSTACKUP 0, %SP<imp-def>, %SP<imp-use>
%reg1030 = ADDu %ZERO, %2
SW %reg1030, 0, <fi#3>
J mbb<cond_next,0x88c7e48>
Successors according to CFG: 0x88c7e48 (#3)
Total amount of phi nodes to update: 0
Lowered selection DAG:
SelectionDAG has 5 nodes:
0x88c8eb0: ch = EntryToken
0x88c8f08: i32 = Constant <17000>
0x88c90f8: i32 = FrameIndex <3>
0x88c87a8: i32 = undef
0x88c8bf0: ch = store 0x88c8eb0, 0x88c8f08, 0x88c90f8, 0x88c87a8
Legalized selection DAG:
SelectionDAG has 5 nodes:
0x88c8eb0: ch = EntryToken
0x88c8f08: i32 = Constant <17000>
0x88c90f8: i32 = FrameIndex <3>
0x88c87a8: i32 = undef
0x88c8bf0: ch = store 0x88c8eb0, 0x88c8f08, 0x88c90f8, 0x88c87a8
cond_false: 0x88c7db8, LLVM BB @0x88be190, ID#2:
Predecessors according to CFG: 0x88c7918 (#0)
Successors according to CFG: 0x88c7e48 (#3)
===== Instruction selection begins:
Selecting: 0x88c8bf0: ch = store 0x88c8eb0, 0x88c8f08, 0x88c90f8, 0x88c87a8
=> 0x88c9298: ch = SW 0x88c8f08, 0x88c8800, 0x88c8c88, 0x88c8eb0
Selecting: 0x88c8f08: i32 = Constant <17000>
=> 0x88c8f08: i32 = ADDiu 0x88c8bf0, 0x88c90f8
Selecting: 0x88c8eb0: ch = EntryToken
=> 0x88c8eb0: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c8eb0: ch = EntryToken
*** Scheduling [0]: SU(1): 0x88c8f08: i32 = ADDiu 0x88c8bf0, 0x88c90f8
*** Scheduling [1]: SU(2): 0x88c9298: ch = SW 0x88c8f08, 0x88c8800, 0x88c8c88,
0x88c8eb0
*** Final schedule ***
SU(0): 0x88c8eb0: ch = EntryToken
SU(1): 0x88c8f08: i32 = ADDiu 0x88c8bf0, 0x88c90f8
SU(2): 0x88c9298: ch = SW 0x88c8f08, 0x88c8800, 0x88c8c88, 0x88c8eb0
Selected machine code:
cond_false: 0x88c7db8, LLVM BB @0x88be190, ID#2:
Predecessors according to CFG: 0x88c7918 (#0)
%reg1031 = ADDiu %ZERO, 17000
SW %reg1031, 0, <fi#3>
Successors according to CFG: 0x88c7e48 (#3)
Total amount of phi nodes to update: 0
Lowered selection DAG:
SelectionDAG has 11 nodes:
0x88c8bf0: ch = EntryToken
0x88c87e0: i32 = FrameIndex <3>
0x88c90f8: <multiple use>
0x88c8eb0: i32,ch = load 0x88c8bf0, 0x88c87e0, 0x88c90f8
0x88c90f8: i32 = undef
0x88c8eb0: <multiple use>
0x88c8eb0: <multiple use>
0x88c8c88: i32 = FrameIndex <5>
0x88c90f8: <multiple use>
0x88c8cf0: ch = store 0x88c8eb0:1, 0x88c8eb0, 0x88c8c88, 0x88c90f8
0x88c8d88: i32 = Constant <0>
0x88c8900: i32 = FrameIndex <8>
0x88c90f8: <multiple use>
0x88c8968: ch = store 0x88c8cf0, 0x88c8d88, 0x88c8900, 0x88c90f8
0x88c8a00: ch = BasicBlock <bb55 0x88c8550>
0x88c8a68: ch = br 0x88c8968, 0x88c8a00
Legalized selection DAG:
SelectionDAG has 11 nodes:
0x88c8bf0: ch = EntryToken
0x88c87e0: i32 = FrameIndex <3>
0x88c90f8: <multiple use>
0x88c8eb0: i32,ch = load 0x88c8bf0, 0x88c87e0, 0x88c90f8
0x88c90f8: i32 = undef
0x88c8eb0: <multiple use>
0x88c8eb0: <multiple use>
0x88c8c88: i32 = FrameIndex <5>
0x88c90f8: <multiple use>
0x88c8cf0: ch = store 0x88c8eb0:1, 0x88c8eb0, 0x88c8c88, 0x88c90f8
0x88c8d88: i32 = Constant <0>
0x88c8900: i32 = FrameIndex <8>
0x88c90f8: <multiple use>
0x88c8968: ch = store 0x88c8cf0, 0x88c8d88, 0x88c8900, 0x88c90f8
0x88c8a00: ch = BasicBlock <bb55 0x88c8550>
0x88c8a68: ch = br 0x88c8968, 0x88c8a00
cond_next: 0x88c7e48, LLVM BB @0x88be1b8, ID#3:
Predecessors according to CFG: 0x88c79a8 (#1) 0x88c7db8 (#2)
Successors according to CFG: 0x88c8550 (#15)
===== Instruction selection begins:
Selecting: 0x88c8a68: ch = br 0x88c8968, 0x88c8a00
=> 0x88c8af0: ch = J 0x88c8a00, 0x88c8968
Selecting: 0x88c8a00: ch = BasicBlock <bb55 0x88c8550>
=> 0x88c8a00: ch = BasicBlock <bb55 0x88c8550>
Selecting: 0x88c8968: ch = store 0x88c8cf0, 0x88c8d88, 0x88c8900, 0x88c90f8
=> 0x88c9150: ch = SW 0x88c8d88, 0x88c8b58, 0x88c8a68, 0x88c8cf0
Selecting: 0x88c8d88: i32 = Constant <0>
=> 0x88c8d88: i32 = ADDiu 0x88c8900, 0x88c8b58
Selecting: 0x88c8cf0: ch = store 0x88c8eb0:1, 0x88c8eb0, 0x88c8c88, 0x88c90f8
=> 0x88ca1e8: ch = SW 0x88c8eb0, 0x88c8b58, 0x88c8968, 0x88c8eb0:1
Selecting: 0x88c8eb0: i32,ch = load 0x88c8bf0, 0x88c87e0, 0x88c90f8
=> 0x88c8cf0: i32,ch = LW 0x88c8b58, 0x88c8c88, 0x88c8bf0
Selecting: 0x88c8bf0: ch = EntryToken
=> 0x88c8bf0: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c8bf0: ch = EntryToken
*** Scheduling [0]: SU(1): 0x88c8d88: i32 = ADDiu 0x88c8900, 0x88c8b58
*** Scheduling [1]: SU(5): 0x88c8cf0: i32,ch = LW 0x88c8b58, 0x88c8c88,
0x88c8bf0
*** Scheduling [2]: SU(4): 0x88ca1e8: ch = SW 0x88c8cf0, 0x88c8b58, 0x88c8968,
0x88c8cf0:1
*** Scheduling [3]: SU(3): 0x88c9150: ch = SW 0x88c8d88, 0x88c8b58, 0x88c8a68,
0x88ca1e8
*** Scheduling [4]: SU(2): 0x88c8af0: ch = J 0x88c8a00, 0x88c9150
*** Final schedule ***
SU(0): 0x88c8bf0: ch = EntryToken
SU(1): 0x88c8d88: i32 = ADDiu 0x88c8900, 0x88c8b58
SU(5): 0x88c8cf0: i32,ch = LW 0x88c8b58, 0x88c8c88, 0x88c8bf0
SU(4): 0x88ca1e8: ch = SW 0x88c8cf0, 0x88c8b58, 0x88c8968, 0x88c8cf0:1
SU(3): 0x88c9150: ch = SW 0x88c8d88, 0x88c8b58, 0x88c8a68, 0x88ca1e8
SU(2): 0x88c8af0: ch = J 0x88c8a00, 0x88c9150
Selected machine code:
cond_next: 0x88c7e48, LLVM BB @0x88be1b8, ID#3:
Predecessors according to CFG: 0x88c79a8 (#1) 0x88c7db8 (#2)
%reg1032 = ADDiu %ZERO, 0
%reg1033 = LW 0, <fi#3>
SW %reg1033, 0, <fi#5>
SW %reg1032, 0, <fi#8>
J mbb<bb55,0x88c8550>
Successors according to CFG: 0x88c8550 (#15)
Total amount of phi nodes to update: 0
Lowered selection DAG:
SelectionDAG has 10 nodes:
0x88c9060: i32 = undef
0x88ca1e8: ch = EntryToken
0x88c8f30: i32 = Constant <0>
0x88c90f8: i32 = FrameIndex <8>
0x88c9060: <multiple use>
0x88c8af0: ch = store 0x88ca1e8, 0x88c8f30, 0x88c90f8, 0x88c9060
0x88ca240: i32 = Constant <2>
0x88ca2a8: i32 = FrameIndex <6>
0x88c9060: <multiple use>
0x88c9298: ch = store 0x88c8af0, 0x88ca240, 0x88ca2a8, 0x88c9060
0x88c9330: ch = BasicBlock <bb14 0x88c8020>
0x88c8c88: ch = br 0x88c9298, 0x88c9330
Legalized selection DAG:
SelectionDAG has 10 nodes:
0x88c9060: i32 = undef
0x88ca1e8: ch = EntryToken
0x88c8f30: i32 = Constant <0>
0x88c90f8: i32 = FrameIndex <8>
0x88c9060: <multiple use>
0x88c8af0: ch = store 0x88ca1e8, 0x88c8f30, 0x88c90f8, 0x88c9060
0x88ca240: i32 = Constant <2>
0x88ca2a8: i32 = FrameIndex <6>
0x88c9060: <multiple use>
0x88c9298: ch = store 0x88c8af0, 0x88ca240, 0x88ca2a8, 0x88c9060
0x88c9330: ch = BasicBlock <bb14 0x88c8020>
0x88c8c88: ch = br 0x88c9298, 0x88c9330
bb: 0x88c7ed8, LLVM BB @0x88bf360, ID#4:
Successors according to CFG: 0x88c8020 (#6)
===== Instruction selection begins:
Selecting: 0x88c8c88: ch = br 0x88c9298, 0x88c9330
=> 0x88c8d38: ch = J 0x88c9330, 0x88c9298
Selecting: 0x88c9330: ch = BasicBlock <bb14 0x88c8020>
=> 0x88c9330: ch = BasicBlock <bb14 0x88c8020>
Selecting: 0x88c9298: ch = store 0x88c8af0, 0x88ca240, 0x88ca2a8, 0x88c9060
=> 0x88c8900: ch = SW 0x88ca240, 0x88c8da0, 0x88c8c88, 0x88c8af0
Selecting: 0x88ca240: i32 = Constant <2>
=> 0x88ca240: i32 = ADDiu 0x88ca2a8, 0x88c9298
Selecting: 0x88c8af0: ch = store 0x88ca1e8, 0x88c8f30, 0x88c90f8, 0x88c9060
=> 0x88c89c0: ch = SW 0x88c8f30, 0x88c8da0, 0x88c8958, 0x88ca1e8
Selecting: 0x88c8f30: i32 = Constant <0>
=> 0x88c8f30: i32 = ADDiu 0x88ca2a8, 0x88c8da0
Selecting: 0x88ca1e8: ch = EntryToken
=> 0x88ca1e8: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88ca1e8: ch = EntryToken
*** Scheduling [0]: SU(1): 0x88c8f30: i32 = ADDiu 0x88ca2a8, 0x88c8da0
*** Scheduling [1]: SU(5): 0x88c89c0: ch = SW 0x88c8f30, 0x88c8da0, 0x88c8958,
0x88ca1e8
*** Scheduling [2]: SU(2): 0x88ca240: i32 = ADDiu 0x88ca2a8, 0x88c9298
*** Scheduling [3]: SU(4): 0x88c8900: ch = SW 0x88ca240, 0x88c8da0, 0x88c8c88,
0x88c89c0
*** Scheduling [4]: SU(3): 0x88c8d38: ch = J 0x88c9330, 0x88c8900
*** Final schedule ***
SU(0): 0x88ca1e8: ch = EntryToken
SU(1): 0x88c8f30: i32 = ADDiu 0x88ca2a8, 0x88c8da0
SU(5): 0x88c89c0: ch = SW 0x88c8f30, 0x88c8da0, 0x88c8958, 0x88ca1e8
SU(2): 0x88ca240: i32 = ADDiu 0x88ca2a8, 0x88c9298
SU(4): 0x88c8900: ch = SW 0x88ca240, 0x88c8da0, 0x88c8c88, 0x88c89c0
SU(3): 0x88c8d38: ch = J 0x88c9330, 0x88c8900
Selected machine code:
bb: 0x88c7ed8, LLVM BB @0x88bf360, ID#4:
%reg1034 = ADDiu %ZERO, 0
SW %reg1034, 0, <fi#8>
%reg1035 = ADDiu %ZERO, 2
SW %reg1035, 0, <fi#6>
J mbb<bb14,0x88c8020>
Successors according to CFG: 0x88c8020 (#6)
Total amount of phi nodes to update: 0
Replacing.3 0x88ca250: i32 = shl 0x88ca3e0, 0x88ca1e8
With: 0x88ca3e0: i32,ch = load 0x88c8f30, 0x88c8bf0, 0x88c9130
Lowered selection DAG:
SelectionDAG has 12 nodes:
0x88ca3e0: <multiple use>
0x88c8c88: i8 = Constant <1>
0x88ca478: i32 = GlobalAddress <[8193 x i8]* @flags.2176> 0
0x88ca3e0: <multiple use>
0x88ca2b8: i32 = add 0x88ca478, 0x88ca3e0
0x88c9130: <multiple use>
0x88c8cf0: ch = store 0x88ca3e0:1, 0x88c8c88, 0x88ca2b8, 0x88c9130
0x88c8bf0: <multiple use>
0x88c9130: <multiple use>
0x88c8900: i32,ch = load 0x88c8cf0, 0x88c8bf0, 0x88c9130
0x88c8bf0: i32 = FrameIndex <6>
0x88c9130: i32 = undef
0x88c8f30: ch = EntryToken
0x88c8bf0: <multiple use>
0x88c9130: <multiple use>
0x88ca3e0: i32,ch = load 0x88c8f30, 0x88c8bf0, 0x88c9130
0x88c8900: <multiple use>
0x88c8900: <multiple use>
0x88c8998: i32 = Constant <1>
0x88c8a00: i32 = add 0x88c8900, 0x88c8998
0x88c8bf0: <multiple use>
0x88c9130: <multiple use>
0x88c9848: ch = store 0x88c8900:1, 0x88c8a00, 0x88c8bf0, 0x88c9130
Legalized selection DAG:
SelectionDAG has 14 nodes:
0x88ca3e0: <multiple use>
0x88c8998: <multiple use>
0x88c8a68: <multiple use>
0x88ca1e8: i32 = MipsISD::Lo 0x88c8a68
0x88c8a68: <multiple use>
0x88c8d88: i32 = MipsISD::Hi 0x88c8a68
0x88ca250: i32 = add 0x88ca1e8, 0x88c8d88
0x88ca3e0: <multiple use>
0x88ca2b8: i32 = add 0x88ca250, 0x88ca3e0
0x88c9130: <multiple use>
0x88c9910: ch = store 0x88ca3e0:1, 0x88c8998, 0x88ca2b8, 0x88c9130 <trunc
i8>
0x88c8bf0: <multiple use>
0x88c9130: <multiple use>
0x88c8900: i32,ch = load 0x88c9910, 0x88c8bf0, 0x88c9130
0x88c8998: i32 = Constant <1>
0x88c8a68: i32 = TargetGlobalAddress <[8193 x i8]* @flags.2176> 0
0x88c8bf0: i32 = FrameIndex <6>
0x88c9130: i32 = undef
0x88c8f30: ch = EntryToken
0x88c8bf0: <multiple use>
0x88c9130: <multiple use>
0x88ca3e0: i32,ch = load 0x88c8f30, 0x88c8bf0, 0x88c9130
0x88c8900: <multiple use>
0x88c8900: <multiple use>
0x88c8998: <multiple use>
0x88c8a00: i32 = add 0x88c8900, 0x88c8998
0x88c8bf0: <multiple use>
0x88c9130: <multiple use>
0x88c9848: ch = store 0x88c8900:1, 0x88c8a00, 0x88c8bf0, 0x88c9130
bb9: 0x88c7f90, LLVM BB @0x88bf3b8, ID#5:
Successors according to CFG: 0x88c8020 (#6)
===== Instruction selection begins:
Selecting: 0x88c9848: ch = store 0x88c8900:1, 0x88c8a00, 0x88c8bf0, 0x88c9130
=> 0x88c9540: ch = SW 0x88c8a00, 0x88c8cf0, 0x88c8c88, 0x88c8900:1
Selecting: 0x88c8a00: i32 = add 0x88c8900, 0x88c8998
=> 0x88c8a00: i32 = ADDiu 0x88c8900, 0x88c9598
Selecting: 0x88c8900: i32,ch = load 0x88c9910, 0x88c8bf0, 0x88c9130
=> 0x88c9600: i32,ch = LW 0x88c8cf0, 0x88c8c88, 0x88c9910
Selecting: 0x88c9910: ch = store 0x88ca3e0:1, 0x88c8998, 0x88ca2b8, 0x88c9130
<trunc i8>
=> 0x88c8900: ch = SB 0x88c8998, 0x88c8cf0, 0x88ca2b8, 0x88ca3e0:1
Selecting: 0x88ca2b8: i32 = add 0x88ca250, 0x88ca3e0
=> 0x88ca2b8: i32 = ADDu 0x88ca250, 0x88ca3e0
Selecting: 0x88ca3e0: i32,ch = load 0x88c8f30, 0x88c8bf0, 0x88c9130
=> 0x88c9910: i32,ch = LW 0x88c8cf0, 0x88c8c88, 0x88c8f30
Selecting: 0x88c8f30: ch = EntryToken
=> 0x88c8f30: ch = EntryToken
Selecting: 0x88ca250: i32 = add 0x88ca1e8, 0x88c8d88
=> 0x88ca250: i32 = ADDiu 0x88c8d88, 0x88c8a68
Selecting: 0x88c8d88: i32 = MipsISD::Hi 0x88c8a68
=> 0x88c8d88: i32 = LUi 0x88c8a68
Selecting: 0x88c8998: i32 = Constant <1>
=> 0x88c8998: i32 = ADDiu 0x88c8bf0, 0x88c9598
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c8f30: ch = EntryToken
*** Scheduling [0]: SU(4): 0x88c8d88: i32 = LUi 0x88c8a68
*** Scheduling [1]: SU(9): 0x88c9910: i32,ch = LW 0x88c8cf0, 0x88c8c88,
0x88c8f30
*** Scheduling [2]: SU(5): 0x88ca250: i32 = ADDiu 0x88c8d88, 0x88c8a68
*** Scheduling [3]: SU(2): 0x88c8998: i32 = ADDiu 0x88c8bf0, 0x88c9598
*** Scheduling [4]: SU(1): 0x88ca2b8: i32 = ADDu 0x88ca250, 0x88c9910
*** Scheduling [5]: SU(8): 0x88c8900: ch = SB 0x88c8998, 0x88c8cf0, 0x88ca2b8,
0x88c9910:1
*** Scheduling [6]: SU(7): 0x88c9600: i32,ch = LW 0x88c8cf0, 0x88c8c88,
0x88c8900
*** Scheduling [7]: SU(3): 0x88c8a00: i32 = ADDiu 0x88c9600, 0x88c9598
*** Scheduling [8]: SU(6): 0x88c9540: ch = SW 0x88c8a00, 0x88c8cf0, 0x88c8c88,
0x88c9600:1
*** Final schedule ***
SU(0): 0x88c8f30: ch = EntryToken
SU(4): 0x88c8d88: i32 = LUi 0x88c8a68
SU(9): 0x88c9910: i32,ch = LW 0x88c8cf0, 0x88c8c88, 0x88c8f30
SU(5): 0x88ca250: i32 = ADDiu 0x88c8d88, 0x88c8a68
SU(2): 0x88c8998: i32 = ADDiu 0x88c8bf0, 0x88c9598
SU(1): 0x88ca2b8: i32 = ADDu 0x88ca250, 0x88c9910
SU(8): 0x88c8900: ch = SB 0x88c8998, 0x88c8cf0, 0x88ca2b8, 0x88c9910:1
SU(7): 0x88c9600: i32,ch = LW 0x88c8cf0, 0x88c8c88, 0x88c8900
SU(3): 0x88c8a00: i32 = ADDiu 0x88c9600, 0x88c9598
SU(6): 0x88c9540: ch = SW 0x88c8a00, 0x88c8cf0, 0x88c8c88, 0x88c9600:1
Selected machine code:
bb9: 0x88c7f90, LLVM BB @0x88bf3b8, ID#5:
%reg1036 = LUi <ga:flags.2176>
%reg1037 = LW 0, <fi#6>
%reg1038 = ADDiu %reg1036, <ga:flags.2176>
%reg1039 = ADDiu %ZERO, 1
%reg1040 = ADDu %reg1038, %reg1037
SB %reg1039, 0, %reg1040
%reg1041 = LW 0, <fi#6>
%reg1042 = ADDiu %reg1041, 1
SW %reg1042, 0, <fi#6>
Successors according to CFG: 0x88c8020 (#6)
Total amount of phi nodes to update: 0
Replacing.3 0x88c8a20: i1 = setcc 0x88c8d68, 0x88c8900, 0x88ca290
With: 0x88c96a8: i1 = setcc 0x88c8cf0, 0x88c9640, 0x88ca290
Replacing.3 0x88c96a8: i1 = setcc 0x88c8cf0, 0x88c9640, 0x88ca290
With: 0x88c8cf0: i1 = setcc 0x88c9910, 0x88c99a8, 0x88c8c88
Replacing.3 0x88c8cf0: i1 = setcc 0x88c9910, 0x88c99a8, 0x88c8c88
With: 0x88c8a20: i1 = setcc 0x88c9910, 0x88c96a8, 0x88c8d68
Lowered selection DAG:
SelectionDAG has 10 nodes:
0x88c9640: i1 = Constant <0>
0x88c8bf0: ch = EntryToken
0x88c8ee8: i32 = FrameIndex <6>
0x88ca238: i32 = undef
0x88c9910: i32,ch = load 0x88c8bf0, 0x88c8ee8, 0x88ca238
0x88c9910: <multiple use>
0x88c9910: <multiple use>
0x88c96a8: i32 = Constant <8193>
0x88c8d68: ch = setlt
0x88c8a20: i1 = setcc 0x88c9910, 0x88c96a8, 0x88c8d68
0x88c9540: ch = BasicBlock <bb9 0x88c7f90>
0x88c95a8: ch = brcond 0x88c9910:1, 0x88c8a20, 0x88c9540
Legalized selection DAG:
SelectionDAG has 9 nodes:
0x88c8bf0: ch = EntryToken
0x88c8ee8: i32 = FrameIndex <6>
0x88ca238: i32 = undef
0x88c9910: i32,ch = load 0x88c8bf0, 0x88c8ee8, 0x88ca238
0x88c9910: <multiple use>
0x88c9910: <multiple use>
0x88c96a8: i32 = Constant <8193>
0x88c8d68: ch = setlt
0x88ca290: i32 = setcc 0x88c9910, 0x88c96a8, 0x88c8d68
0x88c9540: ch = BasicBlock <bb9 0x88c7f90>
0x88c95a8: ch = brcond 0x88c9910:1, 0x88ca290, 0x88c9540
bb14: 0x88c8020, LLVM BB @0x88beb98, ID#6:
Predecessors according to CFG: 0x88c7ed8 (#4) 0x88c7f90 (#5)
Successors according to CFG: 0x88c7f90 (#5) 0x88c80b0 (#7)
===== Instruction selection begins:
Selecting: 0x88c95a8: ch = brcond 0x88c9910:1, 0x88ca290, 0x88c9540
=> 0x88c99a8: ch = BNE 0x88c8900, 0x88c9640, 0x88c9540, 0x88c9910:1
Selecting: 0x88c9540: ch = BasicBlock <bb9 0x88c7f90>
=> 0x88c9540: ch = BasicBlock <bb9 0x88c7f90>
Selecting: 0x88c96a8: i32 = Constant <8193>
=> 0x88c96a8: i32 = ADDiu 0x88c9640, 0x88c95a8
Selecting: 0x88c9910: i32,ch = load 0x88c8bf0, 0x88c8ee8, 0x88ca238
=> 0x88c8c88: i32,ch = LW 0x88c8a20, 0x88ca290, 0x88c8bf0
Selecting: 0x88c8bf0: ch = EntryToken
=> 0x88c8bf0: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c8bf0: ch = EntryToken
*** Scheduling [0]: SU(1): 0x88c96a8: i32 = ADDiu 0x88c9640, 0x88c95a8
*** Scheduling [1]: SU(4): 0x88c8c88: i32,ch = LW 0x88c8a20, 0x88ca290,
0x88c8bf0
*** Scheduling [2]: SU(2): 0x88c8900: i32 = SLT 0x88c8c88, 0x88c96a8
*** Scheduling [3]: SU(3): 0x88c99a8: ch = BNE 0x88c8900, 0x88c9640, 0x88c9540,
0x88c8c88:1
*** Final schedule ***
SU(0): 0x88c8bf0: ch = EntryToken
SU(1): 0x88c96a8: i32 = ADDiu 0x88c9640, 0x88c95a8
SU(4): 0x88c8c88: i32,ch = LW 0x88c8a20, 0x88ca290, 0x88c8bf0
SU(2): 0x88c8900: i32 = SLT 0x88c8c88, 0x88c96a8
SU(3): 0x88c99a8: ch = BNE 0x88c8900, 0x88c9640, 0x88c9540, 0x88c8c88:1
Selected machine code:
bb14: 0x88c8020, LLVM BB @0x88beb98, ID#6:
Predecessors according to CFG: 0x88c7ed8 (#4) 0x88c7f90 (#5)
%reg1043 = ADDiu %ZERO, 8193
%reg1044 = LW 0, <fi#6>
%reg1045 = SLT %reg1044, %reg1043
BNE %reg1045, %ZERO, mbb<bb9,0x88c7f90>
Successors according to CFG: 0x88c7f90 (#5) 0x88c80b0 (#7)
Total amount of phi nodes to update: 0
Lowered selection DAG:
SelectionDAG has 7 nodes:
0x88c8bf0: ch = EntryToken
0x88ca270: i32 = Constant <2>
0x88c9970: i32 = FrameIndex <6>
0x88c8ee8: i32 = undef
0x88c9540: ch = store 0x88c8bf0, 0x88ca270, 0x88c9970, 0x88c8ee8
0x88c9640: ch = BasicBlock <bb49 0x88c84c0>
0x88c96a8: ch = br 0x88c9540, 0x88c9640
Legalized selection DAG:
SelectionDAG has 7 nodes:
0x88c8bf0: ch = EntryToken
0x88ca270: i32 = Constant <2>
0x88c9970: i32 = FrameIndex <6>
0x88c8ee8: i32 = undef
0x88c9540: ch = store 0x88c8bf0, 0x88ca270, 0x88c9970, 0x88c8ee8
0x88c9640: ch = BasicBlock <bb49 0x88c84c0>
0x88c96a8: ch = br 0x88c9540, 0x88c9640
bb19: 0x88c80b0, LLVM BB @0x88bebf0, ID#7:
Predecessors according to CFG: 0x88c8020 (#6)
Successors according to CFG: 0x88c84c0 (#14)
===== Instruction selection begins:
Selecting: 0x88c96a8: ch = br 0x88c9540, 0x88c9640
=> 0x88c8c88: ch = J 0x88c9640, 0x88c9540
Selecting: 0x88c9640: ch = BasicBlock <bb49 0x88c84c0>
=> 0x88c9640: ch = BasicBlock <bb49 0x88c84c0>
Selecting: 0x88c9540: ch = store 0x88c8bf0, 0x88ca270, 0x88c9970, 0x88c8ee8
=> 0x88c8f40: ch = SW 0x88ca270, 0x88c8cf0, 0x88c96a8, 0x88c8bf0
Selecting: 0x88ca270: i32 = Constant <2>
=> 0x88ca270: i32 = ADDiu 0x88c9970, 0x88c8d58
Selecting: 0x88c8bf0: ch = EntryToken
=> 0x88c8bf0: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c8bf0: ch = EntryToken
*** Scheduling [0]: SU(1): 0x88ca270: i32 = ADDiu 0x88c9970, 0x88c8d58
*** Scheduling [1]: SU(3): 0x88c8f40: ch = SW 0x88ca270, 0x88c8cf0, 0x88c96a8,
0x88c8bf0
*** Scheduling [2]: SU(2): 0x88c8c88: ch = J 0x88c9640, 0x88c8f40
*** Final schedule ***
SU(0): 0x88c8bf0: ch = EntryToken
SU(1): 0x88ca270: i32 = ADDiu 0x88c9970, 0x88c8d58
SU(3): 0x88c8f40: ch = SW 0x88ca270, 0x88c8cf0, 0x88c96a8, 0x88c8bf0
SU(2): 0x88c8c88: ch = J 0x88c9640, 0x88c8f40
Selected machine code:
bb19: 0x88c80b0, LLVM BB @0x88bebf0, ID#7:
Predecessors according to CFG: 0x88c8020 (#6)
%reg1046 = ADDiu %ZERO, 2
SW %reg1046, 0, <fi#6>
J mbb<bb49,0x88c84c0>
Successors according to CFG: 0x88c84c0 (#14)
Total amount of phi nodes to update: 0
Replacing.3 0x88ca6a8: i1 = xor 0x88c9f20, 0x88c9f98
With: 0x88c9c28: i1 = setcc 0x88c9eb8, 0x88c8940, 0x88c9bc0
Replacing.3 0x88c9c28: i1 = setcc 0x88c9eb8, 0x88c8940, 0x88c9bc0
With: 0x88c9ca0: i1 = setcc 0x88c9e40, 0x88ca6a8, 0x88c9bc0
Replacing.3 0x88c9ca0: i1 = setcc 0x88c9e40, 0x88ca6a8, 0x88c9bc0
With: 0x88c9c28: i1 = setcc 0x88c8d00, 0x88c8940, 0x88c9bc0
Replacing.3 0x88c96a8: i32 = shl 0x88c9540, 0x88c9640
With: 0x88c9540: i32,ch = load 0x88c9060, 0x88c8f20, 0x88ca270
Lowered selection DAG:
SelectionDAG has 14 nodes:
0x88c9060: <multiple use>
0x88c9970: i32 = GlobalAddress <[8193 x i8]* @flags.2176> 0
0x88c9540: <multiple use>
0x88c8c88: i32 = add 0x88c9970, 0x88c9540
0x88ca270: <multiple use>
0x88c8d00: i8,ch = load 0x88c9060, 0x88c8c88, 0x88ca270
0x88c9060: ch = EntryToken
0x88c9060: <multiple use>
0x88c8f20: i32 = FrameIndex <6>
0x88ca270: <multiple use>
0x88c9540: i32,ch = load 0x88c9060, 0x88c8f20, 0x88ca270
0x88ca270: i32 = undef
0x88ca6a8: i1 = Constant <0>
0x88c9540: <multiple use>
0x88c8d00: <multiple use>
0x88ca778: ch = TokenFactor 0x88c9540:1, 0x88c8d00:1
0x88c8d00: <multiple use>
0x88c8940: i8 = Constant <0>
0x88c9bc0: ch = seteq
0x88c9c28: i1 = setcc 0x88c8d00, 0x88c8940, 0x88c9bc0
0x88ca710: ch = BasicBlock <cond_next46 0x88c8430>
0x88ca7e0: ch = brcond 0x88ca778, 0x88c9c28, 0x88ca710
Legalized selection DAG:
SelectionDAG has 18 nodes:
0x88c9060: ch = EntryToken
0x88c9060: <multiple use>
0x88c8f20: i32 = FrameIndex <6>
0x88ca270: <multiple use>
0x88c9540: i32,ch = load 0x88c9060, 0x88c8f20, 0x88ca270
0x88c9b38: i32 = TargetGlobalAddress <[8193 x i8]* @flags.2176> 0
0x88c9060: <multiple use>
0x88c9b38: <multiple use>
0x88c96a8: i32 = MipsISD::Lo 0x88c9b38
0x88c9b38: <multiple use>
0x88c9640: i32 = MipsISD::Hi 0x88c9b38
0x88c9ca0: i32 = add 0x88c96a8, 0x88c9640
0x88c9540: <multiple use>
0x88c8c88: i32 = add 0x88c9ca0, 0x88c9540
0x88ca270: <multiple use>
0x88c9d08: i32,ch = load 0x88c9060, 0x88c8c88, 0x88ca270 <anyext i8>
0x88ca270: i32 = undef
0x88c9540: <multiple use>
0x88c9d08: <multiple use>
0x88ca778: ch = TokenFactor 0x88c9540:1, 0x88c9d08:1
0x88c9d08: <multiple use>
0x88c9e18: i32 = Constant <255>
0x88c9e80: i32 = and 0x88c9d08, 0x88c9e18
0x88c8a08: i32 = Constant <0>
0x88c9bc0: ch = seteq
0x88c9da0: i32 = setcc 0x88c9e80, 0x88c8a08, 0x88c9bc0
0x88ca710: ch = BasicBlock <cond_next46 0x88c8430>
0x88ca7e0: ch = brcond 0x88ca778, 0x88c9da0, 0x88ca710
Replacing.1 0x88c9d08: i32,ch = load 0x88c9060, 0x88c8c88, 0x88ca270 <anyext
i8>
With: 0x88c8d00: i32,ch = load 0x88c9060, 0x88c8c88, 0x88ca270 <zext i8>
and 1 other values
Replacing.2 0x88c9e80: i32 = and 0x88c8d00, 0x88c9e18
With: 0x88c8d00: i32,ch = load 0x88c9060, 0x88c8c88, 0x88ca270 <zext i8>
bb20: 0x88c8140, LLVM BB @0x88bec48, ID#8:
Successors according to CFG: 0x88c8430 (#13) 0x88c8218 (#9)
===== Instruction selection begins:
Selecting: 0x88ca7e0: ch = brcond 0x88ca778, 0x88c9da0, 0x88ca710
=> 0x88c9c28: ch = BEQ 0x88c8d00, 0x88c8a08, 0x88ca710, 0x88ca778
Selecting: 0x88ca710: ch = BasicBlock <cond_next46 0x88c8430>
=> 0x88ca710: ch = BasicBlock <cond_next46 0x88c8430>
Selecting: 0x88c8a08: i32 = Constant <0>
=> 0x88c8a08: i32 = ADDiu 0x88ca6a8, 0x88c8940
Selecting: 0x88ca778: ch = TokenFactor 0x88c9540:1, 0x88c8d00:1
=> 0x88ca778: ch = TokenFactor 0x88c9540:1, 0x88c8d00:1
Selecting: 0x88c8d00: i32,ch = load 0x88c9060, 0x88c8c88, 0x88ca270 <zext
i8>
=> 0x88c9ba0: i32,ch = LBu 0x88c8940, 0x88c8c88, 0x88c9060
Selecting: 0x88c8c88: i32 = add 0x88c9ca0, 0x88c9540
=> 0x88c8c88: i32 = ADDu 0x88c9ca0, 0x88c9540
Selecting: 0x88c9540: i32,ch = load 0x88c9060, 0x88c8f20, 0x88ca270
=> 0x88c8d00: i32,ch = LW 0x88c8940, 0x88c9970, 0x88c9060
Selecting: 0x88c9060: ch = EntryToken
=> 0x88c9060: ch = EntryToken
Selecting: 0x88c9ca0: i32 = add 0x88c96a8, 0x88c9640
=> 0x88c9ca0: i32 = ADDiu 0x88c9640, 0x88c9b38
Selecting: 0x88c9640: i32 = MipsISD::Hi 0x88c9b38
=> 0x88c9640: i32 = LUi 0x88c9b38
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c9060: ch = EntryToken
*** Scheduling [0]: SU(4): 0x88c9640: i32 = LUi 0x88c9b38
*** Scheduling [1]: SU(8): 0x88c8d00: i32,ch = LW 0x88c8940, 0x88c9970,
0x88c9060
*** Scheduling [2]: SU(5): 0x88c9ca0: i32 = ADDiu 0x88c9640, 0x88c9b38
*** Scheduling [3]: SU(1): 0x88c8c88: i32 = ADDu 0x88c9ca0, 0x88c8d00
*** Scheduling [4]: SU(7): 0x88c9ba0: i32,ch = LBu 0x88c8940, 0x88c8c88,
0x88c9060
*** Scheduling [5]: SU(3): 0x88c8a08: i32 = ADDiu 0x88ca6a8, 0x88c8940
*** Scheduling [6]: SU(2): 0x88ca778: ch = TokenFactor 0x88c8d00:1, 0x88c9ba0:1
*** Scheduling [7]: SU(6): 0x88c9c28: ch = BEQ 0x88c9ba0, 0x88c8a08, 0x88ca710,
0x88ca778
*** Final schedule ***
SU(0): 0x88c9060: ch = EntryToken
SU(4): 0x88c9640: i32 = LUi 0x88c9b38
SU(8): 0x88c8d00: i32,ch = LW 0x88c8940, 0x88c9970, 0x88c9060
SU(5): 0x88c9ca0: i32 = ADDiu 0x88c9640, 0x88c9b38
SU(1): 0x88c8c88: i32 = ADDu 0x88c9ca0, 0x88c8d00
SU(7): 0x88c9ba0: i32,ch = LBu 0x88c8940, 0x88c8c88, 0x88c9060
SU(3): 0x88c8a08: i32 = ADDiu 0x88ca6a8, 0x88c8940
SU(2): 0x88ca778: ch = TokenFactor 0x88c8d00:1, 0x88c9ba0:1
SU(6): 0x88c9c28: ch = BEQ 0x88c9ba0, 0x88c8a08, 0x88ca710, 0x88ca778
Selected machine code:
bb20: 0x88c8140, LLVM BB @0x88bec48, ID#8:
%reg1047 = LUi <ga:flags.2176>
%reg1048 = LW 0, <fi#6>
%reg1049 = ADDiu %reg1047, <ga:flags.2176>
%reg1050 = ADDu %reg1049, %reg1048
%reg1051 = LBu 0, %reg1050
%reg1052 = ADDiu %ZERO, 0
BEQ %reg1051, %reg1052, mbb<cond_next46,0x88c8430>
Successors according to CFG: 0x88c8430 (#13) 0x88c8218 (#9)
Total amount of phi nodes to update: 0
Replacing.1 0x88c8d00: ch = TokenFactor 0x88c9540:1, 0x88c9540:1
With: 0x88c9540: i32,ch = load 0x88c8bf0, 0x88c8c88, 0x88ca298 and 0 other
values
Lowered selection DAG:
SelectionDAG has 9 nodes:
0x88c8bf0: ch = EntryToken
0x88c8c88: i32 = FrameIndex <6>
0x88ca298: <multiple use>
0x88c9540: i32,ch = load 0x88c8bf0, 0x88c8c88, 0x88ca298
0x88ca298: i32 = undef
0x88c9540: <multiple use>
0x88c9540: <multiple use>
0x88c9540: <multiple use>
0x88c9640: i32 = add 0x88c9540, 0x88c9540
0x88c9970: i32 = FrameIndex <7>
0x88ca298: <multiple use>
0x88c9e40: ch = store 0x88c9540:1, 0x88c9640, 0x88c9970, 0x88ca298
0x88c8940: ch = BasicBlock <bb38 0x88c8310>
0x88c89a8: ch = br 0x88c9e40, 0x88c8940
Legalized selection DAG:
SelectionDAG has 9 nodes:
0x88c8bf0: ch = EntryToken
0x88c8c88: i32 = FrameIndex <6>
0x88ca298: <multiple use>
0x88c9540: i32,ch = load 0x88c8bf0, 0x88c8c88, 0x88ca298
0x88ca298: i32 = undef
0x88c9540: <multiple use>
0x88c9540: <multiple use>
0x88c9540: <multiple use>
0x88c9640: i32 = add 0x88c9540, 0x88c9540
0x88c9970: i32 = FrameIndex <7>
0x88ca298: <multiple use>
0x88c9e40: ch = store 0x88c9540:1, 0x88c9640, 0x88c9970, 0x88ca298
0x88c8940: ch = BasicBlock <bb38 0x88c8310>
0x88c89a8: ch = br 0x88c9e40, 0x88c8940
cond_true28: 0x88c8218, LLVM BB @0x88beca0, ID#9:
Predecessors according to CFG: 0x88c8140 (#8)
Successors according to CFG: 0x88c8310 (#11)
===== Instruction selection begins:
Selecting: 0x88c89a8: ch = br 0x88c9e40, 0x88c8940
=> 0x88c9b38: ch = J 0x88c8940, 0x88c9e40
Selecting: 0x88c8940: ch = BasicBlock <bb38 0x88c8310>
=> 0x88c8940: ch = BasicBlock <bb38 0x88c8310>
Selecting: 0x88c9e40: ch = store 0x88c9540:1, 0x88c9640, 0x88c9970, 0x88ca298
=> 0x88c8d68: ch = SW 0x88c9640, 0x88c9ba0, 0x88c89a8, 0x88c9540:1
Selecting: 0x88c9640: i32 = add 0x88c9540, 0x88c9540
=> 0x88c9640: i32 = ADDu 0x88c9540, 0x88c9540
Selecting: 0x88c9540: i32,ch = load 0x88c8bf0, 0x88c8c88, 0x88ca298
=> 0x88c9c08: i32,ch = LW 0x88c9ba0, 0x88c9970, 0x88c8bf0
Selecting: 0x88c8bf0: ch = EntryToken
=> 0x88c8bf0: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c8bf0: ch = EntryToken
*** Scheduling [1]: SU(4): 0x88c9c08: i32,ch = LW 0x88c9ba0, 0x88c9970,
0x88c8bf0
*** Scheduling [2]: SU(1): 0x88c9640: i32 = ADDu 0x88c9c08, 0x88c9c08
*** Scheduling [3]: SU(3): 0x88c8d68: ch = SW 0x88c9640, 0x88c9ba0, 0x88c89a8,
0x88c9c08:1
*** Scheduling [4]: SU(2): 0x88c9b38: ch = J 0x88c8940, 0x88c8d68
*** Final schedule ***
SU(0): 0x88c8bf0: ch = EntryToken
SU(4): 0x88c9c08: i32,ch = LW 0x88c9ba0, 0x88c9970, 0x88c8bf0
SU(1): 0x88c9640: i32 = ADDu 0x88c9c08, 0x88c9c08
SU(3): 0x88c8d68: ch = SW 0x88c9640, 0x88c9ba0, 0x88c89a8, 0x88c9c08:1
SU(2): 0x88c9b38: ch = J 0x88c8940, 0x88c8d68
Selected machine code:
cond_true28: 0x88c8218, LLVM BB @0x88beca0, ID#9:
Predecessors according to CFG: 0x88c8140 (#8)
%reg1053 = LW 0, <fi#6>
%reg1054 = ADDu %reg1053, %reg1053
SW %reg1054, 0, <fi#7>
J mbb<bb38,0x88c8310>
Successors according to CFG: 0x88c8310 (#11)
Total amount of phi nodes to update: 0
Replacing.3 0x88c89a8: i32 = shl 0x88c8d28, 0x88c8940
With: 0x88c8d28: i32,ch = load 0x88c9060, 0x88c9640, 0x88c9970
Lowered selection DAG:
SelectionDAG has 14 nodes:
0x88c9060: ch = EntryToken
0x88c9640: <multiple use>
0x88c9970: <multiple use>
0x88c8d28: i32,ch = load 0x88c9060, 0x88c9640, 0x88c9970
0x88c9640: i32 = FrameIndex <7>
0x88c9970: i32 = undef
0x88c8d28: <multiple use>
0x88c9ea8: i8 = Constant <0>
0x88c9540: i32 = GlobalAddress <[8193 x i8]* @flags.2176> 0
0x88c8d28: <multiple use>
0x88c9e40: i32 = add 0x88c9540, 0x88c8d28
0x88c9970: <multiple use>
0x88ca6a8: ch = store 0x88c8d28:1, 0x88c9ea8, 0x88c9e40, 0x88c9970
0x88ca6a8: <multiple use>
0x88c9640: <multiple use>
0x88c9970: <multiple use>
0x88ca740: i32,ch = load 0x88ca6a8, 0x88c9640, 0x88c9970
0x88ca6a8: <multiple use>
0x88ca7d8: i32 = FrameIndex <6>
0x88c9970: <multiple use>
0x88ca840: i32,ch = load 0x88ca6a8, 0x88ca7d8, 0x88c9970
0x88ca740: <multiple use>
0x88ca840: <multiple use>
0x88ca940: ch = TokenFactor 0x88ca740:1, 0x88ca840:1
0x88ca740: <multiple use>
0x88ca840: <multiple use>
0x88ca8d8: i32 = add 0x88ca740, 0x88ca840
0x88c9640: <multiple use>
0x88c9970: <multiple use>
0x88ca9a8: ch = store 0x88ca940, 0x88ca8d8, 0x88c9640, 0x88c9970
Legalized selection DAG:
SelectionDAG has 17 nodes:
0x88c89a8: i32 = TargetGlobalAddress <[8193 x i8]* @flags.2176> 0
0x88c9060: ch = EntryToken
0x88c9640: <multiple use>
0x88c9970: <multiple use>
0x88c8d28: i32,ch = load 0x88c9060, 0x88c9640, 0x88c9970
0x88c9640: i32 = FrameIndex <7>
0x88c9970: i32 = undef
0x88c8d28: <multiple use>
0x88c8940: i32 = Constant <0>
0x88c89a8: <multiple use>
0x88c9ba0: i32 = MipsISD::Lo 0x88c89a8
0x88c89a8: <multiple use>
0x88c9b38: i32 = MipsISD::Hi 0x88c89a8
0x88c9c08: i32 = add 0x88c9ba0, 0x88c9b38
0x88c8d28: <multiple use>
0x88c9e40: i32 = add 0x88c9c08, 0x88c8d28
0x88c9970: <multiple use>
0x88c9c70: ch = store 0x88c8d28:1, 0x88c8940, 0x88c9e40, 0x88c9970 <trunc
i8>
0x88c9c70: <multiple use>
0x88c9640: <multiple use>
0x88c9970: <multiple use>
0x88ca740: i32,ch = load 0x88c9c70, 0x88c9640, 0x88c9970
0x88c9c70: <multiple use>
0x88ca7d8: i32 = FrameIndex <6>
0x88c9970: <multiple use>
0x88ca840: i32,ch = load 0x88c9c70, 0x88ca7d8, 0x88c9970
0x88ca740: <multiple use>
0x88ca840: <multiple use>
0x88ca940: ch = TokenFactor 0x88ca740:1, 0x88ca840:1
0x88ca740: <multiple use>
0x88ca840: <multiple use>
0x88ca8d8: i32 = add 0x88ca740, 0x88ca840
0x88c9640: <multiple use>
0x88c9970: <multiple use>
0x88ca9a8: ch = store 0x88ca940, 0x88ca8d8, 0x88c9640, 0x88c9970
bb32: 0x88c8280, LLVM BB @0x88becf8, ID#10:
Successors according to CFG: 0x88c8310 (#11)
===== Instruction selection begins:
Selecting: 0x88ca9a8: ch = store 0x88ca940, 0x88ca8d8, 0x88c9640, 0x88c9970
=> 0x88c9d08: ch = SW 0x88ca8d8, 0x88c9540, 0x88ca6a8, 0x88ca940
Selecting: 0x88ca8d8: i32 = add 0x88ca740, 0x88ca840
=> 0x88ca8d8: i32 = ADDu 0x88ca740, 0x88ca840
Selecting: 0x88ca940: ch = TokenFactor 0x88ca740:1, 0x88ca840:1
=> 0x88ca940: ch = TokenFactor 0x88ca740:1, 0x88ca840:1
Selecting: 0x88ca840: i32,ch = load 0x88c9c70, 0x88ca7d8, 0x88c9970
=> 0x88c9d60: i32,ch = LW 0x88c9540, 0x88ca9a8, 0x88c9c70
Selecting: 0x88ca740: i32,ch = load 0x88c9c70, 0x88c9640, 0x88c9970
=> 0x88ca7d8: i32,ch = LW 0x88c9540, 0x88ca6a8, 0x88c9c70
Selecting: 0x88c9c70: ch = store 0x88c8d28:1, 0x88c8940, 0x88c9e40, 0x88c9970
<trunc i8>
=> 0x88c9dd8: ch = SB 0x88c8940, 0x88c9540, 0x88c9e40, 0x88c8d28:1
Selecting: 0x88c9e40: i32 = add 0x88c9c08, 0x88c8d28
=> 0x88c9e40: i32 = ADDu 0x88c9c08, 0x88c8d28
Selecting: 0x88c8d28: i32,ch = load 0x88c9060, 0x88c9640, 0x88c9970
=> 0x88ca850: i32,ch = LW 0x88c9540, 0x88ca6a8, 0x88c9060
Selecting: 0x88c9060: ch = EntryToken
=> 0x88c9060: ch = EntryToken
Selecting: 0x88c9c08: i32 = add 0x88c9ba0, 0x88c9b38
=> 0x88c9c08: i32 = ADDiu 0x88c9b38, 0x88c89a8
Selecting: 0x88c9b38: i32 = MipsISD::Hi 0x88c89a8
=> 0x88c9b38: i32 = LUi 0x88c89a8
Selecting: 0x88c8940: i32 = Constant <0>
=> 0x88c8940: i32 = ADDiu 0x88c9640, 0x88c9540
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c9060: ch = EntryToken
*** Scheduling [0]: SU(5): 0x88c9b38: i32 = LUi 0x88c89a8
*** Scheduling [1]: SU(11): 0x88ca850: i32,ch = LW 0x88c9540, 0x88ca6a8,
0x88c9060
*** Scheduling [2]: SU(6): 0x88c9c08: i32 = ADDiu 0x88c9b38, 0x88c89a8
*** Scheduling [3]: SU(4): 0x88c8940: i32 = ADDiu 0x88c9640, 0x88c9540
*** Scheduling [4]: SU(1): 0x88c9e40: i32 = ADDu 0x88c9c08, 0x88ca850
*** Scheduling [5]: SU(10): 0x88c9dd8: ch = SB 0x88c8940, 0x88c9540, 0x88c9e40,
0x88ca850:1
*** Scheduling [6]: SU(9): 0x88ca7d8: i32,ch = LW 0x88c9540, 0x88ca6a8,
0x88c9dd8
*** Scheduling [7]: SU(8): 0x88c9d60: i32,ch = LW 0x88c9540, 0x88ca9a8,
0x88c9dd8
*** Scheduling [8]: SU(3): 0x88ca940: ch = TokenFactor 0x88ca7d8:1, 0x88c9d60:1
*** Scheduling [9]: SU(2): 0x88ca8d8: i32 = ADDu 0x88ca7d8, 0x88c9d60
*** Scheduling [10]: SU(7): 0x88c9d08: ch = SW 0x88ca8d8, 0x88c9540, 0x88ca6a8,
0x88ca940
*** Final schedule ***
SU(0): 0x88c9060: ch = EntryToken
SU(5): 0x88c9b38: i32 = LUi 0x88c89a8
SU(11): 0x88ca850: i32,ch = LW 0x88c9540, 0x88ca6a8, 0x88c9060
SU(6): 0x88c9c08: i32 = ADDiu 0x88c9b38, 0x88c89a8
SU(4): 0x88c8940: i32 = ADDiu 0x88c9640, 0x88c9540
SU(1): 0x88c9e40: i32 = ADDu 0x88c9c08, 0x88ca850
SU(10): 0x88c9dd8: ch = SB 0x88c8940, 0x88c9540, 0x88c9e40, 0x88ca850:1
SU(9): 0x88ca7d8: i32,ch = LW 0x88c9540, 0x88ca6a8, 0x88c9dd8
SU(8): 0x88c9d60: i32,ch = LW 0x88c9540, 0x88ca9a8, 0x88c9dd8
SU(3): 0x88ca940: ch = TokenFactor 0x88ca7d8:1, 0x88c9d60:1
SU(2): 0x88ca8d8: i32 = ADDu 0x88ca7d8, 0x88c9d60
SU(7): 0x88c9d08: ch = SW 0x88ca8d8, 0x88c9540, 0x88ca6a8, 0x88ca940
Selected machine code:
bb32: 0x88c8280, LLVM BB @0x88becf8, ID#10:
%reg1055 = LUi <ga:flags.2176>
%reg1056 = LW 0, <fi#7>
%reg1057 = ADDiu %reg1055, <ga:flags.2176>
%reg1058 = ADDiu %ZERO, 0
%reg1059 = ADDu %reg1057, %reg1056
SB %reg1058, 0, %reg1059
%reg1060 = LW 0, <fi#7>
%reg1061 = LW 0, <fi#6>
%reg1062 = ADDu %reg1060, %reg1061
SW %reg1062, 0, <fi#7>
Successors according to CFG: 0x88c8310 (#11)
Total amount of phi nodes to update: 0
Replacing.3 0x88ca7d8: i1 = setcc 0x88c9bb0, 0x88c9d08, 0x88c9e28
With: 0x88cb218: i1 = setcc 0x88c9b38, 0x88ca950, 0x88c9e28
Replacing.3 0x88cb218: i1 = setcc 0x88c9b38, 0x88ca950, 0x88c9e28
With: 0x88c9b38: i1 = setcc 0x88ca6a8, 0x88c9540, 0x88c89a0
Replacing.3 0x88c9b38: i1 = setcc 0x88ca6a8, 0x88c9540, 0x88c89a0
With: 0x88cb218: i1 = setcc 0x88ca6a8, 0x88ca7d8, 0x88c9bb0
Lowered selection DAG:
SelectionDAG has 10 nodes:
0x88c9060: ch = EntryToken
0x88c9640: i32 = FrameIndex <7>
0x88c8bf0: i32 = undef
0x88ca6a8: i32,ch = load 0x88c9060, 0x88c9640, 0x88c8bf0
0x88ca950: i1 = Constant <0>
0x88ca6a8: <multiple use>
0x88ca6a8: <multiple use>
0x88ca7d8: i32 = Constant <8193>
0x88c9bb0: ch = setlt
0x88cb218: i1 = setcc 0x88ca6a8, 0x88ca7d8, 0x88c9bb0
0x88ca850: ch = BasicBlock <bb32 0x88c8280>
0x88ca8b8: ch = brcond 0x88ca6a8:1, 0x88cb218, 0x88ca850
Legalized selection DAG:
SelectionDAG has 9 nodes:
0x88c9060: ch = EntryToken
0x88c9640: i32 = FrameIndex <7>
0x88c8bf0: i32 = undef
0x88ca6a8: i32,ch = load 0x88c9060, 0x88c9640, 0x88c8bf0
0x88ca6a8: <multiple use>
0x88ca6a8: <multiple use>
0x88ca7d8: i32 = Constant <8193>
0x88c9bb0: ch = setlt
0x88c9b38: i32 = setcc 0x88ca6a8, 0x88ca7d8, 0x88c9bb0
0x88ca850: ch = BasicBlock <bb32 0x88c8280>
0x88ca8b8: ch = brcond 0x88ca6a8:1, 0x88c9b38, 0x88ca850
bb38: 0x88c8310, LLVM BB @0x88bed50, ID#11:
Predecessors according to CFG: 0x88c8218 (#9) 0x88c8280 (#10)
Successors according to CFG: 0x88c8280 (#10) 0x88c83a0 (#12)
===== Instruction selection begins:
Selecting: 0x88ca8b8: ch = brcond 0x88ca6a8:1, 0x88c9b38, 0x88ca850
=> 0x88c9540: ch = BNE 0x88c9d08, 0x88c9e28, 0x88ca850, 0x88ca6a8:1
Selecting: 0x88ca850: ch = BasicBlock <bb32 0x88c8280>
=> 0x88ca850: ch = BasicBlock <bb32 0x88c8280>
Selecting: 0x88ca7d8: i32 = Constant <8193>
=> 0x88ca7d8: i32 = ADDiu 0x88c9e28, 0x88ca8b8
Selecting: 0x88ca6a8: i32,ch = load 0x88c9060, 0x88c9640, 0x88c8bf0
=> 0x88c9b38: i32,ch = LW 0x88c8940, 0x88ca950, 0x88c9060
Selecting: 0x88c9060: ch = EntryToken
=> 0x88c9060: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c9060: ch = EntryToken
*** Scheduling [0]: SU(1): 0x88ca7d8: i32 = ADDiu 0x88c9e28, 0x88ca8b8
*** Scheduling [1]: SU(4): 0x88c9b38: i32,ch = LW 0x88c8940, 0x88ca950,
0x88c9060
*** Scheduling [2]: SU(2): 0x88c9d08: i32 = SLT 0x88c9b38, 0x88ca7d8
*** Scheduling [3]: SU(3): 0x88c9540: ch = BNE 0x88c9d08, 0x88c9e28, 0x88ca850,
0x88c9b38:1
*** Final schedule ***
SU(0): 0x88c9060: ch = EntryToken
SU(1): 0x88ca7d8: i32 = ADDiu 0x88c9e28, 0x88ca8b8
SU(4): 0x88c9b38: i32,ch = LW 0x88c8940, 0x88ca950, 0x88c9060
SU(2): 0x88c9d08: i32 = SLT 0x88c9b38, 0x88ca7d8
SU(3): 0x88c9540: ch = BNE 0x88c9d08, 0x88c9e28, 0x88ca850, 0x88c9b38:1
Selected machine code:
bb38: 0x88c8310, LLVM BB @0x88bed50, ID#11:
Predecessors according to CFG: 0x88c8218 (#9) 0x88c8280 (#10)
%reg1063 = ADDiu %ZERO, 8193
%reg1064 = LW 0, <fi#7>
%reg1065 = SLT %reg1064, %reg1063
BNE %reg1065, %ZERO, mbb<bb32,0x88c8280>
Successors according to CFG: 0x88c8280 (#10) 0x88c83a0 (#12)
Total amount of phi nodes to update: 0
Lowered selection DAG:
SelectionDAG has 7 nodes:
0x88c8940: i32 = FrameIndex <8>
0x88c9970: i32 = undef
0x88c9540: ch = EntryToken
0x88c8940: <multiple use>
0x88c9970: <multiple use>
0x88ca6a8: i32,ch = load 0x88c9540, 0x88c8940, 0x88c9970
0x88ca6a8: <multiple use>
0x88ca6a8: <multiple use>
0x88ca950: i32 = Constant <1>
0x88c9b38: i32 = add 0x88ca6a8, 0x88ca950
0x88c8940: <multiple use>
0x88c9970: <multiple use>
0x88c9ba0: ch = store 0x88ca6a8:1, 0x88c9b38, 0x88c8940, 0x88c9970
Legalized selection DAG:
SelectionDAG has 7 nodes:
0x88c8940: i32 = FrameIndex <8>
0x88c9970: i32 = undef
0x88c9540: ch = EntryToken
0x88c8940: <multiple use>
0x88c9970: <multiple use>
0x88ca6a8: i32,ch = load 0x88c9540, 0x88c8940, 0x88c9970
0x88ca6a8: <multiple use>
0x88ca6a8: <multiple use>
0x88ca950: i32 = Constant <1>
0x88c9b38: i32 = add 0x88ca6a8, 0x88ca950
0x88c8940: <multiple use>
0x88c9970: <multiple use>
0x88c9ba0: ch = store 0x88ca6a8:1, 0x88c9b38, 0x88c8940, 0x88c9970
bb43: 0x88c83a0, LLVM BB @0x88beda8, ID#12:
Predecessors according to CFG: 0x88c8310 (#11)
Successors according to CFG: 0x88c8430 (#13)
===== Instruction selection begins:
Selecting: 0x88c9ba0: ch = store 0x88ca6a8:1, 0x88c9b38, 0x88c8940, 0x88c9970
=> 0x88ca8a8: ch = SW 0x88c9b38, 0x88ca840, 0x88ca7d8, 0x88ca6a8:1
Selecting: 0x88c9b38: i32 = add 0x88ca6a8, 0x88ca950
=> 0x88c9b38: i32 = ADDiu 0x88ca6a8, 0x88c9ba0
Selecting: 0x88ca6a8: i32,ch = load 0x88c9540, 0x88c8940, 0x88c9970
=> 0x88c9d08: i32,ch = LW 0x88ca840, 0x88ca7d8, 0x88c9540
Selecting: 0x88c9540: ch = EntryToken
=> 0x88c9540: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c9540: ch = EntryToken
*** Scheduling [1]: SU(3): 0x88c9d08: i32,ch = LW 0x88ca840, 0x88ca7d8,
0x88c9540
*** Scheduling [2]: SU(1): 0x88c9b38: i32 = ADDiu 0x88c9d08, 0x88c9ba0
*** Scheduling [3]: SU(2): 0x88ca8a8: ch = SW 0x88c9b38, 0x88ca840, 0x88ca7d8,
0x88c9d08:1
*** Final schedule ***
SU(0): 0x88c9540: ch = EntryToken
SU(3): 0x88c9d08: i32,ch = LW 0x88ca840, 0x88ca7d8, 0x88c9540
SU(1): 0x88c9b38: i32 = ADDiu 0x88c9d08, 0x88c9ba0
SU(2): 0x88ca8a8: ch = SW 0x88c9b38, 0x88ca840, 0x88ca7d8, 0x88c9d08:1
Selected machine code:
bb43: 0x88c83a0, LLVM BB @0x88beda8, ID#12:
Predecessors according to CFG: 0x88c8310 (#11)
%reg1066 = LW 0, <fi#8>
%reg1067 = ADDiu %reg1066, 1
SW %reg1067, 0, <fi#8>
Successors according to CFG: 0x88c8430 (#13)
Total amount of phi nodes to update: 0
Lowered selection DAG:
SelectionDAG has 7 nodes:
0x88c9060: ch = EntryToken
0x88ca6a8: <multiple use>
0x88ca988: <multiple use>
0x88c9b38: i32,ch = load 0x88c9060, 0x88ca6a8, 0x88ca988
0x88ca6a8: i32 = FrameIndex <6>
0x88ca988: i32 = undef
0x88c9b38: <multiple use>
0x88c9b38: <multiple use>
0x88c9bd0: i32 = Constant <1>
0x88ca7d8: i32 = add 0x88c9b38, 0x88c9bd0
0x88ca6a8: <multiple use>
0x88ca988: <multiple use>
0x88ca840: ch = store 0x88c9b38:1, 0x88ca7d8, 0x88ca6a8, 0x88ca988
Legalized selection DAG:
SelectionDAG has 7 nodes:
0x88c9060: ch = EntryToken
0x88ca6a8: <multiple use>
0x88ca988: <multiple use>
0x88c9b38: i32,ch = load 0x88c9060, 0x88ca6a8, 0x88ca988
0x88ca6a8: i32 = FrameIndex <6>
0x88ca988: i32 = undef
0x88c9b38: <multiple use>
0x88c9b38: <multiple use>
0x88c9bd0: i32 = Constant <1>
0x88ca7d8: i32 = add 0x88c9b38, 0x88c9bd0
0x88ca6a8: <multiple use>
0x88ca988: <multiple use>
0x88ca840: ch = store 0x88c9b38:1, 0x88ca7d8, 0x88ca6a8, 0x88ca988
cond_next46: 0x88c8430, LLVM BB @0x88bee00, ID#13:
Predecessors according to CFG: 0x88c8140 (#8) 0x88c83a0 (#12)
Successors according to CFG: 0x88c84c0 (#14)
===== Instruction selection begins:
Selecting: 0x88ca840: ch = store 0x88c9b38:1, 0x88ca7d8, 0x88ca6a8, 0x88ca988
=> 0x88c9dd8: ch = SW 0x88ca7d8, 0x88c9d70, 0x88c9d08, 0x88c9b38:1
Selecting: 0x88ca7d8: i32 = add 0x88c9b38, 0x88c9bd0
=> 0x88ca7d8: i32 = ADDiu 0x88c9b38, 0x88ca840
Selecting: 0x88c9b38: i32,ch = load 0x88c9060, 0x88ca6a8, 0x88ca988
=> 0x88cb218: i32,ch = LW 0x88c9d70, 0x88c9d08, 0x88c9060
Selecting: 0x88c9060: ch = EntryToken
=> 0x88c9060: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c9060: ch = EntryToken
*** Scheduling [1]: SU(3): 0x88cb218: i32,ch = LW 0x88c9d70, 0x88c9d08,
0x88c9060
*** Scheduling [2]: SU(1): 0x88ca7d8: i32 = ADDiu 0x88cb218, 0x88ca840
*** Scheduling [3]: SU(2): 0x88c9dd8: ch = SW 0x88ca7d8, 0x88c9d70, 0x88c9d08,
0x88cb218:1
*** Final schedule ***
SU(0): 0x88c9060: ch = EntryToken
SU(3): 0x88cb218: i32,ch = LW 0x88c9d70, 0x88c9d08, 0x88c9060
SU(1): 0x88ca7d8: i32 = ADDiu 0x88cb218, 0x88ca840
SU(2): 0x88c9dd8: ch = SW 0x88ca7d8, 0x88c9d70, 0x88c9d08, 0x88cb218:1
Selected machine code:
cond_next46: 0x88c8430, LLVM BB @0x88bee00, ID#13:
Predecessors according to CFG: 0x88c8140 (#8) 0x88c83a0 (#12)
%reg1068 = LW 0, <fi#6>
%reg1069 = ADDiu %reg1068, 1
SW %reg1069, 0, <fi#6>
Successors according to CFG: 0x88c84c0 (#14)
Total amount of phi nodes to update: 0
Replacing.3 0x88cac40: i1 = setcc 0x88caa50, 0x88caab8, 0x88cabd8
With: 0x88cae20: i1 = setcc 0x88c9dd8, 0x88cadb8, 0x88cabd8
Replacing.3 0x88cae20: i1 = setcc 0x88c9dd8, 0x88cadb8, 0x88cabd8
With: 0x88c9dd8: i1 = setcc 0x88ca7d8, 0x88c9d08, 0x88c9d70
Replacing.3 0x88c9dd8: i1 = setcc 0x88ca7d8, 0x88c9d08, 0x88c9d70
With: 0x88cae20: i1 = setcc 0x88ca7d8, 0x88caa50, 0x88cac40
Lowered selection DAG:
SelectionDAG has 10 nodes:
0x88c9540: ch = EntryToken
0x88ca6a8: i32 = FrameIndex <6>
0x88c9b38: i32 = undef
0x88ca7d8: i32,ch = load 0x88c9540, 0x88ca6a8, 0x88c9b38
0x88cadb8: i1 = Constant <0>
0x88ca7d8: <multiple use>
0x88ca7d8: <multiple use>
0x88caa50: i32 = Constant <8193>
0x88cac40: ch = setlt
0x88cae20: i1 = setcc 0x88ca7d8, 0x88caa50, 0x88cac40
0x88cacb8: ch = BasicBlock <bb20 0x88c8140>
0x88cad20: ch = brcond 0x88ca7d8:1, 0x88cae20, 0x88cacb8
Legalized selection DAG:
SelectionDAG has 9 nodes:
0x88c9540: ch = EntryToken
0x88ca6a8: i32 = FrameIndex <6>
0x88c9b38: i32 = undef
0x88ca7d8: i32,ch = load 0x88c9540, 0x88ca6a8, 0x88c9b38
0x88ca7d8: <multiple use>
0x88ca7d8: <multiple use>
0x88caa50: i32 = Constant <8193>
0x88cac40: ch = setlt
0x88c9d08: i32 = setcc 0x88ca7d8, 0x88caa50, 0x88cac40
0x88cacb8: ch = BasicBlock <bb20 0x88c8140>
0x88cad20: ch = brcond 0x88ca7d8:1, 0x88c9d08, 0x88cacb8
bb49: 0x88c84c0, LLVM BB @0x88bee58, ID#14:
Predecessors according to CFG: 0x88c80b0 (#7) 0x88c8430 (#13)
Successors according to CFG: 0x88c8140 (#8) 0x88c8550 (#15)
===== Instruction selection begins:
Selecting: 0x88cad20: ch = brcond 0x88ca7d8:1, 0x88c9d08, 0x88cacb8
=> 0x88c9d80: ch = BNE 0x88caab8, 0x88cabd8, 0x88cacb8, 0x88ca7d8:1
Selecting: 0x88cacb8: ch = BasicBlock <bb20 0x88c8140>
=> 0x88cacb8: ch = BasicBlock <bb20 0x88c8140>
Selecting: 0x88caa50: i32 = Constant <8193>
=> 0x88caa50: i32 = ADDiu 0x88cabd8, 0x88cac40
Selecting: 0x88ca7d8: i32,ch = load 0x88c9540, 0x88ca6a8, 0x88c9b38
=> 0x88c9dd8: i32,ch = LW 0x88c9d08, 0x88cad20, 0x88c9540
Selecting: 0x88c9540: ch = EntryToken
=> 0x88c9540: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c9540: ch = EntryToken
*** Scheduling [0]: SU(1): 0x88caa50: i32 = ADDiu 0x88cabd8, 0x88cac40
*** Scheduling [1]: SU(4): 0x88c9dd8: i32,ch = LW 0x88c9d08, 0x88cad20,
0x88c9540
*** Scheduling [2]: SU(2): 0x88caab8: i32 = SLT 0x88c9dd8, 0x88caa50
*** Scheduling [3]: SU(3): 0x88c9d80: ch = BNE 0x88caab8, 0x88cabd8, 0x88cacb8,
0x88c9dd8:1
*** Final schedule ***
SU(0): 0x88c9540: ch = EntryToken
SU(1): 0x88caa50: i32 = ADDiu 0x88cabd8, 0x88cac40
SU(4): 0x88c9dd8: i32,ch = LW 0x88c9d08, 0x88cad20, 0x88c9540
SU(2): 0x88caab8: i32 = SLT 0x88c9dd8, 0x88caa50
SU(3): 0x88c9d80: ch = BNE 0x88caab8, 0x88cabd8, 0x88cacb8, 0x88c9dd8:1
Selected machine code:
bb49: 0x88c84c0, LLVM BB @0x88bee58, ID#14:
Predecessors according to CFG: 0x88c80b0 (#7) 0x88c8430 (#13)
%reg1070 = ADDiu %ZERO, 8193
%reg1071 = LW 0, <fi#6>
%reg1072 = SLT %reg1071, %reg1070
BNE %reg1072, %ZERO, mbb<bb20,0x88c8140>
Successors according to CFG: 0x88c8140 (#8) 0x88c8550 (#15)
Total amount of phi nodes to update: 0
Replacing.3 0x88cb4c8: i1 = setcc 0x88cb3f8, 0x88cb460, 0x88cb318
With: 0x88caab8: i1 = setcc 0x88cb380, 0x88caa50, 0x88cb318
Replacing.3 0x88caab8: i1 = setcc 0x88cb380, 0x88caa50, 0x88cb318
With: 0x88cb380: i1 = setcc 0x88cb218, 0x88cb2b0, 0x88cb318
Replacing.1 0x88cb218: i32,ch = load 0x88caf20, 0x88c9d08, 0x88c9d70
With: 0x88caeb8: i32 = sub 0x88cadb8, 0x88cae50 and 1 other values
Replacing.3 0x88caeb8: i32 = sub 0x88cadb8, 0x88cae50
With: 0x88cb218: i32 = add 0x88cadb8, 0x88cb2b0
Replacing.3 0x88cb380: i1 = setcc 0x88cb218, 0x88cb2b0, 0x88cb318
With: 0x88cb3f8: i1 = setcc 0x88cadb8, 0x88caeb8, 0x88cb318
Lowered selection DAG:
SelectionDAG has 13 nodes:
0x88c9d08: i32 = FrameIndex <5>
0x88c9d70: i32 = undef
0x88caa50: i1 = Constant <0>
0x88c9060: ch = EntryToken
0x88c9d08: <multiple use>
0x88c9d70: <multiple use>
0x88cadb8: i32,ch = load 0x88c9060, 0x88c9d08, 0x88c9d70
0x88cadb8: <multiple use>
0x88cadb8: <multiple use>
0x88cb2b0: i32 = Constant <4294967295>
0x88cb218: i32 = add 0x88cadb8, 0x88cb2b0
0x88c9d08: <multiple use>
0x88c9d70: <multiple use>
0x88caf20: ch = store 0x88cadb8:1, 0x88cb218, 0x88c9d08, 0x88c9d70
0x88cadb8: <multiple use>
0x88caeb8: i32 = Constant <0>
0x88cb318: ch = setne
0x88cb3f8: i1 = setcc 0x88cadb8, 0x88caeb8, 0x88cb318
0x88c9dc8: ch = BasicBlock <bb 0x88c7ed8>
0x88cb608: ch = brcond 0x88caf20, 0x88cb3f8, 0x88c9dc8
Legalized selection DAG:
SelectionDAG has 12 nodes:
0x88c9d08: i32 = FrameIndex <5>
0x88c9d70: i32 = undef
0x88c9060: ch = EntryToken
0x88c9d08: <multiple use>
0x88c9d70: <multiple use>
0x88cadb8: i32,ch = load 0x88c9060, 0x88c9d08, 0x88c9d70
0x88cadb8: <multiple use>
0x88cadb8: <multiple use>
0x88cb2b0: i32 = Constant <4294967295>
0x88cb218: i32 = add 0x88cadb8, 0x88cb2b0
0x88c9d08: <multiple use>
0x88c9d70: <multiple use>
0x88caf20: ch = store 0x88cadb8:1, 0x88cb218, 0x88c9d08, 0x88c9d70
0x88cadb8: <multiple use>
0x88caeb8: i32 = Constant <0>
0x88cb318: ch = setne
0x88cb380: i32 = setcc 0x88cadb8, 0x88caeb8, 0x88cb318
0x88c9dc8: ch = BasicBlock <bb 0x88c7ed8>
0x88cb608: ch = brcond 0x88caf20, 0x88cb380, 0x88c9dc8
bb55: 0x88c8550, LLVM BB @0x88bef08, ID#15:
Predecessors according to CFG: 0x88c7e48 (#3) 0x88c84c0 (#14)
Successors according to CFG: 0x88c7ed8 (#4) 0x88c85e0 (#16)
===== Instruction selection begins:
Selecting: 0x88cb608: ch = brcond 0x88caf20, 0x88cb380, 0x88c9dc8
=> 0x88cae50: ch = BNE 0x88cadb8, 0x88caeb8, 0x88c9dc8, 0x88caf20
Selecting: 0x88c9dc8: ch = BasicBlock <bb 0x88c7ed8>
=> 0x88c9dc8: ch = BasicBlock <bb 0x88c7ed8>
Selecting: 0x88caeb8: i32 = Constant <0>
=> 0x88caeb8: i32 = ADDiu 0x88cb318, 0x88cb380
Selecting: 0x88caf20: ch = store 0x88cadb8:1, 0x88cb218, 0x88c9d08, 0x88c9d70
=> 0x88cb450: ch = SW 0x88cb218, 0x88cb380, 0x88cb3e8, 0x88cadb8:1
Selecting: 0x88cb218: i32 = add 0x88cadb8, 0x88cb2b0
=> 0x88cb218: i32 = ADDiu 0x88cadb8, 0x88caf20
Selecting: 0x88cadb8: i32,ch = load 0x88c9060, 0x88c9d08, 0x88c9d70
=> 0x88cb4a8: i32,ch = LW 0x88cb380, 0x88cb3e8, 0x88c9060
Selecting: 0x88c9060: ch = EntryToken
=> 0x88c9060: ch = EntryToken
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c9060: ch = EntryToken
*** Scheduling [0]: SU(2): 0x88caeb8: i32 = ADDiu 0x88cb318, 0x88cb380
*** Scheduling [1]: SU(5): 0x88cb4a8: i32,ch = LW 0x88cb380, 0x88cb3e8,
0x88c9060
*** Scheduling [2]: SU(1): 0x88cb218: i32 = ADDiu 0x88cb4a8, 0x88caf20
*** Scheduling [3]: SU(4): 0x88cb450: ch = SW 0x88cb218, 0x88cb380, 0x88cb3e8,
0x88cb4a8:1
*** Scheduling [4]: SU(3): 0x88cae50: ch = BNE 0x88cb4a8, 0x88caeb8, 0x88c9dc8,
0x88cb450
*** Final schedule ***
SU(0): 0x88c9060: ch = EntryToken
SU(2): 0x88caeb8: i32 = ADDiu 0x88cb318, 0x88cb380
SU(5): 0x88cb4a8: i32,ch = LW 0x88cb380, 0x88cb3e8, 0x88c9060
SU(1): 0x88cb218: i32 = ADDiu 0x88cb4a8, 0x88caf20
SU(4): 0x88cb450: ch = SW 0x88cb218, 0x88cb380, 0x88cb3e8, 0x88cb4a8:1
SU(3): 0x88cae50: ch = BNE 0x88cb4a8, 0x88caeb8, 0x88c9dc8, 0x88cb450
Selected machine code:
bb55: 0x88c8550, LLVM BB @0x88bef08, ID#15:
Predecessors according to CFG: 0x88c7e48 (#3) 0x88c84c0 (#14)
%reg1073 = ADDiu %ZERO, 0
%reg1074 = LW 0, <fi#5>
%reg1075 = ADDiu %reg1074, 4294967295
SW %reg1075, 0, <fi#5>
BNE %reg1074, %reg1073, mbb<bb,0x88c7ed8>
Successors according to CFG: 0x88c7ed8 (#4) 0x88c85e0 (#16)
Total amount of phi nodes to update: 0
Replacing.1 0x88cb468: i32,ch = load 0x88cb3d0, 0x88cb368, 0x88cad20
With: 0x88cae40: i32 = Constant <0> and 1 other values
Lowered selection DAG:
SelectionDAG has 14 nodes:
0x88c9540: ch = EntryToken
0x88cacb8: i32 = FrameIndex <8>
0x88cad20: <multiple use>
0x88c9d08: i32,ch = load 0x88c9540, 0x88cacb8, 0x88cad20
0x88cad20: i32 = undef
0x88cae40: i32 = Constant <0>
0x88caf10: i32 = Constant <536870912>
0x88c9d08: <multiple use>
0x88cae40: <multiple use>
0x88caea8: i32 = Constant <1>
0x88cae40: <multiple use>
0x88c9da0: i32 = GlobalAddress <i32 (i8*, ...)* @printf> 0
0x88cb218: i32 = GlobalAddress <[11 x i8]* @.str> 0
0x88caf10: <multiple use>
0x88c9d08: <multiple use>
0x88caf10: <multiple use>
0x88caf78: i32,ch = call 0x88c9d08:1, 0x88cae40, 0x88caea8, 0x88cae40,
0x88c9da0, 0x88cb218, 0x88caf10, 0x88c9d08, 0x88caf10
0x88cae40: <multiple use>
0x88cb368: i32 = FrameIndex <4>
0x88cad20: <multiple use>
0x88cb3d0: ch = store 0x88caf78:1, 0x88cae40, 0x88cb368, 0x88cad20
0x88cae40: <multiple use>
0x88caa50: i32 = FrameIndex <2>
0x88cad20: <multiple use>
0x88caab8: ch = store 0x88cb3d0, 0x88cae40, 0x88caa50, 0x88cad20
Legalized selection DAG:
SelectionDAG has 23 nodes:
0x88c9540: ch = EntryToken
0x88cacb8: i32 = FrameIndex <8>
0x88cad20: <multiple use>
0x88c9d08: i32,ch = load 0x88c9540, 0x88cacb8, 0x88cad20
0x88cad20: i32 = undef
0x88cae40: i32 = Constant <0>
0x88cc488: i32 = TargetGlobalAddress <[11 x i8]* @.str> 0
0x88cc718: i32 = Register 4
0x88c9d08: <multiple use>
0x88cae40: <multiple use>
0x88cc6b0: ch,flag = callseq_start 0x88c9d08:1, 0x88cae40
0x88cc718: <multiple use>
0x88cc488: <multiple use>
0x88cc558: i32 = MipsISD::Lo 0x88cc488
0x88cc488: <multiple use>
0x88cc4f0: i32 = MipsISD::Hi 0x88cc488
0x88cc5c0: i32 = add 0x88cc558, 0x88cc4f0
0x88cc780: ch,flag = CopyToReg 0x88cc6b0, 0x88cc718, 0x88cc5c0
0x88cc7f8: i32 = Register 5
0x88cc780: <multiple use>
0x88cc7f8: <multiple use>
0x88c9d08: <multiple use>
0x88cc780: <multiple use>
0x88cc860: ch,flag = CopyToReg 0x88cc780, 0x88cc7f8, 0x88c9d08, 0x88cc780:1
0x88cc860: <multiple use>
0x88cb468: i32 = TargetGlobalAddress <i32 (i8*, ...)* @printf> 0
0x88cc718: <multiple use>
0x88cc7f8: <multiple use>
0x88cc860: <multiple use>
0x88cc8b8: ch,flag = MipsISD::JmpLink 0x88cc860, 0x88cb468, 0x88cc718,
0x88cc7f8, 0x88cc860:1
0x88cc8b8: <multiple use>
0x88cae40: <multiple use>
0x88cc8b8: <multiple use>
0x88cc910: ch,flag = callseq_end 0x88cc8b8, 0x88cae40, 0x88cc8b8:1
0x88cc910: <multiple use>
0x88cca10: i32 = Register 2
0x88cc910: <multiple use>
0x88cca78: i32,ch,flag = CopyFromReg 0x88cc910, 0x88cca10, 0x88cc910:1
0x88cae40: <multiple use>
0x88cb368: i32 = FrameIndex <4>
0x88cad20: <multiple use>
0x88cb3d0: ch = store 0x88cca78:1, 0x88cae40, 0x88cb368, 0x88cad20
0x88cae40: <multiple use>
0x88caa50: i32 = FrameIndex <2>
0x88cad20: <multiple use>
0x88caab8: ch = store 0x88cb3d0, 0x88cae40, 0x88caa50, 0x88cad20
bb62: 0x88c85e0, LLVM BB @0x88bfd98, ID#16:
Predecessors according to CFG: 0x88c8550 (#15)
Successors according to CFG: 0x88c81d0 (#17)
===== Instruction selection begins:
Selecting: 0x88caab8: ch = store 0x88cb3d0, 0x88cae40, 0x88caa50, 0x88cad20
=> 0x88c9da0: ch = SW 0x88cae40, 0x88cc988, 0x88cc628, 0x88cb3d0
Selecting: 0x88cb3d0: ch = store 0x88cca78:1, 0x88cae40, 0x88cb368, 0x88cad20
=> 0x88cabd8: ch = SW 0x88cae40, 0x88cc988, 0x88cab70, 0x88cca78:1
Selecting: 0x88cca78: i32,ch,flag = CopyFromReg 0x88cc910, 0x88cca10,
0x88cc910:1
=> 0x88cca78: i32,ch,flag = CopyFromReg 0x88cc910, 0x88cca10, 0x88cc910:1
Selecting: 0x88cc910: ch,flag = callseq_end 0x88cc8b8, 0x88cae40, 0x88cc8b8:1
=> 0x88cc910: ch,flag = callseq_end 0x88cc8b8, 0x88cae40, 0x88cc8b8:1
Selecting: 0x88cc8b8: ch,flag = MipsISD::JmpLink 0x88cc860, 0x88cb468,
0x88cc718, 0x88cc7f8, 0x88cc860:1
=> 0x88cc8b8: ch,flag = MipsISD::JmpLink 0x88cc860, 0x88cb468, 0x88cc718,
0x88cc7f8, 0x88cc860:1
Selecting: 0x88cc860: ch,flag = CopyToReg 0x88cc780, 0x88cc7f8, 0x88c9d08,
0x88cc780:1
=> 0x88cc860: ch,flag = CopyToReg 0x88cc780, 0x88cc7f8, 0x88c9d08,
0x88cc780:1
Selecting: 0x88cc780: ch,flag = CopyToReg 0x88cc6b0, 0x88cc718, 0x88cc5c0
=> 0x88cc780: ch,flag = CopyToReg 0x88cc6b0, 0x88cc718, 0x88cc5c0
Selecting: 0x88cc5c0: i32 = add 0x88cc558, 0x88cc4f0
=> 0x88cc5c0: i32 = ADDiu 0x88cc4f0, 0x88cc488
Selecting: 0x88cc4f0: i32 = MipsISD::Hi 0x88cc488
=> 0x88cc4f0: i32 = LUi 0x88cc488
Selecting: 0x88cc718: i32 = Register 4
=> 0x88cc718: i32 = Register 4
Selecting: 0x88cc6b0: ch,flag = callseq_start 0x88c9d08:1, 0x88cae40
=> 0x88cc6b0: ch,flag = callseq_start 0x88c9d08:1, 0x88cae40
Selecting: 0x88cae40: i32 = Constant <0>
=> 0x88cae40: i32 = ADDiu 0x88cc690, 0x88cc988
Selecting: 0x88c9d08: i32,ch = load 0x88c9540, 0x88cacb8, 0x88cad20
=> 0x88cb3b0: i32,ch = LW 0x88cc988, 0x88cb348, 0x88c9540
Selecting: 0x88c9540: ch = EntryToken
=> 0x88c9540: ch = EntryToken
Selecting: 0x88cc7f8: i32 = Register 5
=> 0x88cc7f8: i32 = Register 5
Selecting: 0x88cca10: i32 = Register 2
=> 0x88cca10: i32 = Register 2
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c9540: ch = EntryToken
*** Scheduling [0]: SU(2): 0x88cc4f0: i32 = LUi 0x88cc488
*** Scheduling [1]: SU(10): 0x88cb3b0: i32,ch = LW 0x88cc988, 0x88cb348,
0x88c9540
*** Scheduling [2]: SU(9): 0x88caab8: ch,flag = ADJCALLSTACKDOWN 0x88cc988,
0x88cb3b0:1
*** Scheduling [3]: SU(3): 0x88cc5c0: i32 = ADDiu 0x88cc4f0, 0x88cc488
*** Scheduling [4]: SU(4): 0x88cc860: ch,flag = CopyToReg 0x88cc780, 0x88cc7f8,
0x88cb3b0, 0x88cc780:1
0x88cc780: ch,flag = CopyToReg 0x88caab8, 0x88cc718, 0x88cc5c0
*** Scheduling [5]: SU(8): 0x88cc910: ch,flag = JAL 0x88cb468, 0x88cc860
*** Scheduling [6]: SU(5): 0x88cca78: i32,ch,flag = CopyFromReg 0x88caa50,
0x88cca10, 0x88caa50:1
0x88caa50: ch,flag = ADJCALLSTACKUP 0x88cc988, 0x88cc910
*** Scheduling [7]: SU(1): 0x88cae40: i32 = ADDiu 0x88cc690, 0x88cc988
*** Scheduling [8]: SU(7): 0x88cabd8: ch = SW 0x88cae40, 0x88cc988, 0x88cab70,
0x88cca78:1
*** Scheduling [9]: SU(6): 0x88c9da0: ch = SW 0x88cae40, 0x88cc988, 0x88cc628,
0x88cabd8
*** Final schedule ***
SU(0): 0x88c9540: ch = EntryToken
SU(2): 0x88cc4f0: i32 = LUi 0x88cc488
SU(10): 0x88cb3b0: i32,ch = LW 0x88cc988, 0x88cb348, 0x88c9540
SU(9): 0x88caab8: ch,flag = ADJCALLSTACKDOWN 0x88cc988, 0x88cb3b0:1
SU(3): 0x88cc5c0: i32 = ADDiu 0x88cc4f0, 0x88cc488
SU(4): 0x88cc860: ch,flag = CopyToReg 0x88cc780, 0x88cc7f8, 0x88cb3b0,
0x88cc780:1
0x88cc780: ch,flag = CopyToReg 0x88caab8, 0x88cc718, 0x88cc5c0
SU(8): 0x88cc910: ch,flag = JAL 0x88cb468, 0x88cc860
SU(5): 0x88cca78: i32,ch,flag = CopyFromReg 0x88caa50, 0x88cca10, 0x88caa50:1
0x88caa50: ch,flag = ADJCALLSTACKUP 0x88cc988, 0x88cc910
SU(1): 0x88cae40: i32 = ADDiu 0x88cc690, 0x88cc988
SU(7): 0x88cabd8: ch = SW 0x88cae40, 0x88cc988, 0x88cab70, 0x88cca78:1
SU(6): 0x88c9da0: ch = SW 0x88cae40, 0x88cc988, 0x88cc628, 0x88cabd8
Selected machine code:
bb62: 0x88c85e0, LLVM BB @0x88bfd98, ID#16:
Predecessors according to CFG: 0x88c8550 (#15)
%reg1076 = LUi <ga:.str>
%reg1077 = LW 0, <fi#8>
ADJCALLSTACKDOWN 0, %SP<imp-def>, %SP<imp-use>
%reg1078 = ADDiu %reg1076, <ga:.str>
%4 = ADDu %ZERO, %reg1078
%5 = ADDu %ZERO, %reg1077
JAL <ga:printf>
ADJCALLSTACKUP 0, %SP<imp-def>, %SP<imp-use>
%reg1079 = ADDu %ZERO, %2
%reg1080 = ADDiu %ZERO, 0
SW %reg1080, 0, <fi#4>
SW %reg1080, 0, <fi#2>
Successors according to CFG: 0x88c81d0 (#17)
Total amount of phi nodes to update: 0
Lowered selection DAG:
SelectionDAG has 6 nodes:
0x88c9060: ch = EntryToken
0x88cae40: i32 = FrameIndex <2>
0x88c9da0: i32 = undef
0x88cab70: i32,ch = load 0x88c9060, 0x88cae40, 0x88c9da0
0x88cab70: <multiple use>
0x88cab70: <multiple use>
0x88cacb8: i32 = Constant <0>
0x88cad20: ch = ret 0x88cab70:1, 0x88cab70, 0x88cacb8
Legalized selection DAG:
SelectionDAG has 8 nodes:
0x88c9060: ch = EntryToken
0x88cae40: i32 = FrameIndex <2>
0x88c9da0: i32 = undef
0x88cab70: i32,ch = load 0x88c9060, 0x88cae40, 0x88c9da0
0x88cab70: <multiple use>
0x88cba10: i32 = Register 2
0x88cab70: <multiple use>
0x88cba78: ch,flag = CopyToReg 0x88cab70:1, 0x88cba10, 0x88cab70
0x88cba78: <multiple use>
0x88cb348: i32 = Register RA
0x88cba78: <multiple use>
0x88cb3b0: ch = MipsISD::Ret 0x88cba78, 0x88cb348, 0x88cba78:1
return: 0x88c81d0, LLVM BB @0x88bfdf0, ID#17:
Predecessors according to CFG: 0x88c85e0 (#16)
===== Instruction selection begins:
Selecting: 0x88cb3b0: ch = MipsISD::Ret 0x88cba78, 0x88cb348, 0x88cba78:1
=> 0x88caa50: ch = RET 0x88cb348, 0x88cba78, 0x88cba78:1
Selecting: 0x88cba78: ch,flag = CopyToReg 0x88cab70:1, 0x88cba10, 0x88cab70
=> 0x88cba78: ch,flag = CopyToReg 0x88cab70:1, 0x88cba10, 0x88cab70
Selecting: 0x88cab70: i32,ch = load 0x88c9060, 0x88cae40, 0x88c9da0
=> 0x88cad20: i32,ch = LW 0x88cacb8, 0x88caae8, 0x88c9060
Selecting: 0x88c9060: ch = EntryToken
=> 0x88c9060: ch = EntryToken
Selecting: 0x88cba10: i32 = Register 2
=> 0x88cba10: i32 = Register 2
Selecting: 0x88cb348: i32 = Register RA
=> 0x88cb348: i32 = Register RA
===== Instruction selection ends:
********** List Scheduling **********
*** Scheduling [0]: SU(0): 0x88c9060: ch = EntryToken
*** Scheduling [1]: SU(2): 0x88cad20: i32,ch = LW 0x88cacb8, 0x88caae8,
0x88c9060
*** Scheduling [2]: SU(1): 0x88caa50: ch = RET 0x88cb348, 0x88cba78, 0x88cba78:1
0x88cba78: ch,flag = CopyToReg 0x88cad20:1, 0x88cba10, 0x88cad20
*** Final schedule ***
SU(0): 0x88c9060: ch = EntryToken
SU(2): 0x88cad20: i32,ch = LW 0x88cacb8, 0x88caae8, 0x88c9060
SU(1): 0x88caa50: ch = RET 0x88cb348, 0x88cba78, 0x88cba78:1
0x88cba78: ch,flag = CopyToReg 0x88cad20:1, 0x88cba10, 0x88cad20
Selected machine code:
return: 0x88c81d0, LLVM BB @0x88bfdf0, ID#17:
Predecessors according to CFG: 0x88c85e0 (#16)
%reg1081 = LW 0, <fi#2>
%2 = ADDu %ZERO, %reg1081
RET %RA
Total amount of phi nodes to update: 0
# Machine code for main():
<fi #-2>: size is 4 bytes, alignment is 1 byte, fixed at location
[SP-12]
<fi #-1>: size is 4 bytes, alignment is 1 byte, fixed at location
[SP-12]
<fi #0>: size is 4 bytes, alignment is 4 bytes,
<fi #1>: size is 4 bytes, alignment is 4 bytes,
<fi #2>: size is 4 bytes, alignment is 4 bytes,
<fi #3>: size is 4 bytes, alignment is 4 bytes,
<fi #4>: size is 4 bytes, alignment is 4 bytes,
<fi #5>: size is 4 bytes, alignment is 4 bytes,
<fi #6>: size is 4 bytes, alignment is 4 bytes,
<fi #7>: size is 4 bytes, alignment is 4 bytes,
<fi #8>: size is 4 bytes, alignment is 4 bytes,
Live Ins: 4 in VR#1024 5 in VR#1025
Live Outs: 2
entry: 0x88c7918, LLVM BB @0x88bf1f8, ID#0:
Live Ins: %4 %5
%reg1024 = ADDu %ZERO, %4
%reg1025 = ADDu %ZERO, %5
%reg1026 = ADDiu %ZERO, 2
SW %reg1024, 0, <fi#0>
SW %reg1025, 0, <fi#1>
%reg1027 = LW 0, <fi#0>
BNE %reg1027, %reg1026, mbb<cond_false,0x88c7db8>
Successors according to CFG: 0x88c7db8 (#2) 0x88c79a8 (#1)
cond_true: 0x88c79a8, LLVM BB @0x88be168, ID#1:
Predecessors according to CFG: 0x88c7918 (#0)
%reg1028 = LW 0, <fi#1>
%reg1029 = LW 4, %reg1028
ADJCALLSTACKDOWN 0, %SP<imp-def>, %SP<imp-use>
%4 = ADDu %ZERO, %reg1029
JAL <ga:atoi>
ADJCALLSTACKUP 0, %SP<imp-def>, %SP<imp-use>
%reg1030 = ADDu %ZERO, %2
SW %reg1030, 0, <fi#3>
J mbb<cond_next,0x88c7e48>
Successors according to CFG: 0x88c7e48 (#3)
cond_false: 0x88c7db8, LLVM BB @0x88be190, ID#2:
Predecessors according to CFG: 0x88c7918 (#0)
%reg1031 = ADDiu %ZERO, 17000
SW %reg1031, 0, <fi#3>
Successors according to CFG: 0x88c7e48 (#3)
cond_next: 0x88c7e48, LLVM BB @0x88be1b8, ID#3:
Predecessors according to CFG: 0x88c79a8 (#1) 0x88c7db8 (#2)
%reg1032 = ADDiu %ZERO, 0
%reg1033 = LW 0, <fi#3>
SW %reg1033, 0, <fi#5>
SW %reg1032, 0, <fi#8>
J mbb<bb55,0x88c8550>
Successors according to CFG: 0x88c8550 (#15)
bb: 0x88c7ed8, LLVM BB @0x88bf360, ID#4:
Predecessors according to CFG: 0x88c8550 (#15)
%reg1034 = ADDiu %ZERO, 0
SW %reg1034, 0, <fi#8>
%reg1035 = ADDiu %ZERO, 2
SW %reg1035, 0, <fi#6>
J mbb<bb14,0x88c8020>
Successors according to CFG: 0x88c8020 (#6)
bb9: 0x88c7f90, LLVM BB @0x88bf3b8, ID#5:
Predecessors according to CFG: 0x88c8020 (#6)
%reg1036 = LUi <ga:flags.2176>
%reg1037 = LW 0, <fi#6>
%reg1038 = ADDiu %reg1036, <ga:flags.2176>
%reg1039 = ADDiu %ZERO, 1
%reg1040 = ADDu %reg1038, %reg1037
SB %reg1039, 0, %reg1040
%reg1041 = LW 0, <fi#6>
%reg1042 = ADDiu %reg1041, 1
SW %reg1042, 0, <fi#6>
Successors according to CFG: 0x88c8020 (#6)
bb14: 0x88c8020, LLVM BB @0x88beb98, ID#6:
Predecessors according to CFG: 0x88c7ed8 (#4) 0x88c7f90 (#5)
%reg1043 = ADDiu %ZERO, 8193
%reg1044 = LW 0, <fi#6>
%reg1045 = SLT %reg1044, %reg1043
BNE %reg1045, %ZERO, mbb<bb9,0x88c7f90>
Successors according to CFG: 0x88c7f90 (#5) 0x88c80b0 (#7)
bb19: 0x88c80b0, LLVM BB @0x88bebf0, ID#7:
Predecessors according to CFG: 0x88c8020 (#6)
%reg1046 = ADDiu %ZERO, 2
SW %reg1046, 0, <fi#6>
J mbb<bb49,0x88c84c0>
Successors according to CFG: 0x88c84c0 (#14)
bb20: 0x88c8140, LLVM BB @0x88bec48, ID#8:
Predecessors according to CFG: 0x88c84c0 (#14)
%reg1047 = LUi <ga:flags.2176>
%reg1048 = LW 0, <fi#6>
%reg1049 = ADDiu %reg1047, <ga:flags.2176>
%reg1050 = ADDu %reg1049, %reg1048
%reg1051 = LBu 0, %reg1050
%reg1052 = ADDiu %ZERO, 0
BEQ %reg1051, %reg1052, mbb<cond_next46,0x88c8430>
Successors according to CFG: 0x88c8430 (#13) 0x88c8218 (#9)
cond_true28: 0x88c8218, LLVM BB @0x88beca0, ID#9:
Predecessors according to CFG: 0x88c8140 (#8)
%reg1053 = LW 0, <fi#6>
%reg1054 = ADDu %reg1053, %reg1053
SW %reg1054, 0, <fi#7>
J mbb<bb38,0x88c8310>
Successors according to CFG: 0x88c8310 (#11)
bb32: 0x88c8280, LLVM BB @0x88becf8, ID#10:
Predecessors according to CFG: 0x88c8310 (#11)
%reg1055 = LUi <ga:flags.2176>
%reg1056 = LW 0, <fi#7>
%reg1057 = ADDiu %reg1055, <ga:flags.2176>
%reg1058 = ADDiu %ZERO, 0
%reg1059 = ADDu %reg1057, %reg1056
SB %reg1058, 0, %reg1059
%reg1060 = LW 0, <fi#7>
%reg1061 = LW 0, <fi#6>
%reg1062 = ADDu %reg1060, %reg1061
SW %reg1062, 0, <fi#7>
Successors according to CFG: 0x88c8310 (#11)
bb38: 0x88c8310, LLVM BB @0x88bed50, ID#11:
Predecessors according to CFG: 0x88c8218 (#9) 0x88c8280 (#10)
%reg1063 = ADDiu %ZERO, 8193
%reg1064 = LW 0, <fi#7>
%reg1065 = SLT %reg1064, %reg1063
BNE %reg1065, %ZERO, mbb<bb32,0x88c8280>
Successors according to CFG: 0x88c8280 (#10) 0x88c83a0 (#12)
bb43: 0x88c83a0, LLVM BB @0x88beda8, ID#12:
Predecessors according to CFG: 0x88c8310 (#11)
%reg1066 = LW 0, <fi#8>
%reg1067 = ADDiu %reg1066, 1
SW %reg1067, 0, <fi#8>
Successors according to CFG: 0x88c8430 (#13)
cond_next46: 0x88c8430, LLVM BB @0x88bee00, ID#13:
Predecessors according to CFG: 0x88c8140 (#8) 0x88c83a0 (#12)
%reg1068 = LW 0, <fi#6>
%reg1069 = ADDiu %reg1068, 1
SW %reg1069, 0, <fi#6>
Successors according to CFG: 0x88c84c0 (#14)
bb49: 0x88c84c0, LLVM BB @0x88bee58, ID#14:
Predecessors according to CFG: 0x88c80b0 (#7) 0x88c8430 (#13)
%reg1070 = ADDiu %ZERO, 8193
%reg1071 = LW 0, <fi#6>
%reg1072 = SLT %reg1071, %reg1070
BNE %reg1072, %ZERO, mbb<bb20,0x88c8140>
Successors according to CFG: 0x88c8140 (#8) 0x88c8550 (#15)
bb55: 0x88c8550, LLVM BB @0x88bef08, ID#15:
Predecessors according to CFG: 0x88c7e48 (#3) 0x88c84c0 (#14)
%reg1073 = ADDiu %ZERO, 0
%reg1074 = LW 0, <fi#5>
%reg1075 = ADDiu %reg1074, 4294967295
SW %reg1075, 0, <fi#5>
BNE %reg1074, %reg1073, mbb<bb,0x88c7ed8>
Successors according to CFG: 0x88c7ed8 (#4) 0x88c85e0 (#16)
bb62: 0x88c85e0, LLVM BB @0x88bfd98, ID#16:
Predecessors according to CFG: 0x88c8550 (#15)
%reg1076 = LUi <ga:.str>
%reg1077 = LW 0, <fi#8>
ADJCALLSTACKDOWN 0, %SP<imp-def>, %SP<imp-use>
%reg1078 = ADDiu %reg1076, <ga:.str>
%4 = ADDu %ZERO, %reg1078
%5 = ADDu %ZERO, %reg1077
JAL <ga:printf>
ADJCALLSTACKUP 0, %SP<imp-def>, %SP<imp-use>
%reg1079 = ADDu %ZERO, %2
%reg1080 = ADDiu %ZERO, 0
SW %reg1080, 0, <fi#4>
SW %reg1080, 0, <fi#2>
Successors according to CFG: 0x88c81d0 (#17)
return: 0x88c81d0, LLVM BB @0x88bfdf0, ID#17:
Predecessors according to CFG: 0x88c85e0 (#16)
%reg1081 = LW 0, <fi#2>
%2 = ADDu %ZERO, %reg1081
RET %RA
# End machine code for main().
Machine Function
********** REWRITING TWO-ADDR INSTRS **********
********** Function: main
********** COMPUTING LIVE INTERVALS **********
********** Function: main
entry:
livein register: 4 killed +[0,2:0)
livein register: 5 killed +[0,6:0)
0 %reg1024 = ADDu %ZERO, %4<kill>
ADDu %reg1024<d> %mreg(32) %mreg(1)
register: %reg1024 +[2,14:0)
4 %reg1025 = ADDu %ZERO, %5<kill>
ADDu %reg1025<d> %mreg(32) %mreg(2)
register: %reg1025 +[6,18:0)
8 %reg1026 = ADDiu %ZERO, 2
ADDiu %reg1026<d> %mreg(32) 2
register: %reg1026 +[10,26:0)
12 SW %reg1024<kill>, 0, <fi#0>
SW %reg1024 0 <fi#0>
16 SW %reg1025<kill>, 0, <fi#1>
SW %reg1025 0 <fi#1>
20 %reg1027 = LW 0, <fi#0>
LW %reg1027<d> 0 <fi#0>
register: %reg1027 +[22,26:0)
24 BNE %reg1027<kill>, %reg1026<kill>,
mbb<cond_false,0x88c7db8>
BNE %reg1027 %reg1026 <mbb:cond_false at 0x88c7db8>
cond_true:
28 %reg1028 = LW 0, <fi#1>
LW %reg1028<d> 0 <fi#1>
register: %reg1028 +[30,34:0)
32 %reg1029 = LW 4, %reg1028<kill>
LW %reg1029<d> 4 %reg1028
register: %reg1029 +[34,42:0)
36 ADJCALLSTACKDOWN 0, %SP<imp-def>, %SP<imp-use>
ADJCALLSTACKDOWN 0 %mreg(19)<d> %mreg(19)
40 %4<dead> = ADDu %ZERO, %reg1029<kill>
ADDu %mreg(1)<d> %mreg(32) %reg1029
register: 4 dead +[42,43:1)
44 JAL <ga:atoi>
JAL <ga:atoi>
48 ADJCALLSTACKUP 0, %SP<imp-def>, %SP<imp-use>
ADJCALLSTACKUP 0 %mreg(19)<d> %mreg(19)
52 %reg1030 = ADDu %ZERO, %2<kill>
ADDu %reg1030<d> %mreg(32) %mreg(30)
register: %reg1030 +[54,58:0)
56 SW %reg1030<kill>, 0, <fi#3>
SW %reg1030 0 <fi#3>
60 J mbb<cond_next,0x88c7e48>
J <mbb:cond_next at 0x88c7e48>
cond_false:
64 %reg1031 = ADDiu %ZERO, 17000
ADDiu %reg1031<d> %mreg(32) 17000
register: %reg1031 +[66,70:0)
68 SW %reg1031<kill>, 0, <fi#3>
SW %reg1031 0 <fi#3>
cond_next:
72 %reg1032 = ADDiu %ZERO, 0
ADDiu %reg1032<d> %mreg(32) 0
register: %reg1032 +[74,86:0)
76 %reg1033 = LW 0, <fi#3>
LW %reg1033<d> 0 <fi#3>
register: %reg1033 +[78,82:0)
80 SW %reg1033<kill>, 0, <fi#5>
SW %reg1033 0 <fi#5>
84 SW %reg1032<kill>, 0, <fi#8>
SW %reg1032 0 <fi#8>
88 J mbb<bb55,0x88c8550>
J <mbb:bb55 at 0x88c8550>
bb:
92 %reg1034 = ADDiu %ZERO, 0
ADDiu %reg1034<d> %mreg(32) 0
register: %reg1034 +[94,98:0)
96 SW %reg1034<kill>, 0, <fi#8>
SW %reg1034 0 <fi#8>
100 %reg1035 = ADDiu %ZERO, 2
ADDiu %reg1035<d> %mreg(32) 2
register: %reg1035 +[102,106:0)
104 SW %reg1035<kill>, 0, <fi#6>
SW %reg1035 0 <fi#6>
108 J mbb<bb14,0x88c8020>
J <mbb:bb14 at 0x88c8020>
bb9:
112 %reg1036 = LUi <ga:flags.2176>
LUi %reg1036<d> <ga:flags.2176>
register: %reg1036 +[114,122:0)
116 %reg1037 = LW 0, <fi#6>
LW %reg1037<d> 0 <fi#6>
register: %reg1037 +[118,130:0)
120 %reg1038 = ADDiu %reg1036<kill>, <ga:flags.2176>
ADDiu %reg1038<d> %reg1036 <ga:flags.2176>
register: %reg1038 +[122,130:0)
124 %reg1039 = ADDiu %ZERO, 1
ADDiu %reg1039<d> %mreg(32) 1
register: %reg1039 +[126,134:0)
128 %reg1040 = ADDu %reg1038<kill>, %reg1037<kill>
ADDu %reg1040<d> %reg1038 %reg1037
register: %reg1040 +[130,134:0)
132 SB %reg1039<kill>, 0, %reg1040<kill>
SB %reg1039 0 %reg1040
136 %reg1041 = LW 0, <fi#6>
LW %reg1041<d> 0 <fi#6>
register: %reg1041 +[138,142:0)
140 %reg1042 = ADDiu %reg1041<kill>, 1
ADDiu %reg1042<d> %reg1041 1
register: %reg1042 +[142,146:0)
144 SW %reg1042<kill>, 0, <fi#6>
SW %reg1042 0 <fi#6>
bb14:
148 %reg1043 = ADDiu %ZERO, 8193
ADDiu %reg1043<d> %mreg(32) 8193
register: %reg1043 +[150,158:0)
152 %reg1044 = LW 0, <fi#6>
LW %reg1044<d> 0 <fi#6>
register: %reg1044 +[154,158:0)
156 %reg1045 = SLT %reg1044<kill>, %reg1043<kill>
SLT %reg1045<d> %reg1044 %reg1043
register: %reg1045 +[158,162:0)
160 BNE %reg1045<kill>, %ZERO, mbb<bb9,0x88c7f90>
BNE %reg1045 %mreg(32) <mbb:bb9 at 0x88c7f90>
bb19:
164 %reg1046 = ADDiu %ZERO, 2
ADDiu %reg1046<d> %mreg(32) 2
register: %reg1046 +[166,170:0)
168 SW %reg1046<kill>, 0, <fi#6>
SW %reg1046 0 <fi#6>
172 J mbb<bb49,0x88c84c0>
J <mbb:bb49 at 0x88c84c0>
bb20:
176 %reg1047 = LUi <ga:flags.2176>
LUi %reg1047<d> <ga:flags.2176>
register: %reg1047 +[178,186:0)
180 %reg1048 = LW 0, <fi#6>
LW %reg1048<d> 0 <fi#6>
register: %reg1048 +[182,190:0)
184 %reg1049 = ADDiu %reg1047<kill>, <ga:flags.2176>
ADDiu %reg1049<d> %reg1047 <ga:flags.2176>
register: %reg1049 +[186,190:0)
188 %reg1050 = ADDu %reg1049<kill>, %reg1048<kill>
ADDu %reg1050<d> %reg1049 %reg1048
register: %reg1050 +[190,194:0)
192 %reg1051 = LBu 0, %reg1050<kill>
LBu %reg1051<d> 0 %reg1050
register: %reg1051 +[194,202:0)
196 %reg1052 = ADDiu %ZERO, 0
ADDiu %reg1052<d> %mreg(32) 0
register: %reg1052 +[198,202:0)
200 BEQ %reg1051<kill>, %reg1052<kill>,
mbb<cond_next46,0x88c8430>
BEQ %reg1051 %reg1052 <mbb:cond_next46 at 0x88c8430>
cond_true28:
204 %reg1053 = LW 0, <fi#6>
LW %reg1053<d> 0 <fi#6>
register: %reg1053 +[206,210:0)
208 %reg1054 = ADDu %reg1053<kill>, %reg1053
ADDu %reg1054<d> %reg1053 %reg1053
register: %reg1054 +[210,214:0)
212 SW %reg1054<kill>, 0, <fi#7>
SW %reg1054 0 <fi#7>
216 J mbb<bb38,0x88c8310>
J <mbb:bb38 at 0x88c8310>
bb32:
220 %reg1055 = LUi <ga:flags.2176>
LUi %reg1055<d> <ga:flags.2176>
register: %reg1055 +[222,230:0)
224 %reg1056 = LW 0, <fi#7>
LW %reg1056<d> 0 <fi#7>
register: %reg1056 +[226,238:0)
228 %reg1057 = ADDiu %reg1055<kill>, <ga:flags.2176>
ADDiu %reg1057<d> %reg1055 <ga:flags.2176>
register: %reg1057 +[230,238:0)
232 %reg1058 = ADDiu %ZERO, 0
ADDiu %reg1058<d> %mreg(32) 0
register: %reg1058 +[234,242:0)
236 %reg1059 = ADDu %reg1057<kill>, %reg1056<kill>
ADDu %reg1059<d> %reg1057 %reg1056
register: %reg1059 +[238,242:0)
240 SB %reg1058<kill>, 0, %reg1059<kill>
SB %reg1058 0 %reg1059
244 %reg1060 = LW 0, <fi#7>
LW %reg1060<d> 0 <fi#7>
register: %reg1060 +[246,254:0)
248 %reg1061 = LW 0, <fi#6>
LW %reg1061<d> 0 <fi#6>
register: %reg1061 +[250,254:0)
252 %reg1062 = ADDu %reg1060<kill>, %reg1061<kill>
ADDu %reg1062<d> %reg1060 %reg1061
register: %reg1062 +[254,258:0)
256 SW %reg1062<kill>, 0, <fi#7>
SW %reg1062 0 <fi#7>
bb38:
260 %reg1063 = ADDiu %ZERO, 8193
ADDiu %reg1063<d> %mreg(32) 8193
register: %reg1063 +[262,270:0)
264 %reg1064 = LW 0, <fi#7>
LW %reg1064<d> 0 <fi#7>
register: %reg1064 +[266,270:0)
268 %reg1065 = SLT %reg1064<kill>, %reg1063<kill>
SLT %reg1065<d> %reg1064 %reg1063
register: %reg1065 +[270,274:0)
272 BNE %reg1065<kill>, %ZERO, mbb<bb32,0x88c8280>
BNE %reg1065 %mreg(32) <mbb:bb32 at 0x88c8280>
bb43:
276 %reg1066 = LW 0, <fi#8>
LW %reg1066<d> 0 <fi#8>
register: %reg1066 +[278,282:0)
280 %reg1067 = ADDiu %reg1066<kill>, 1
ADDiu %reg1067<d> %reg1066 1
register: %reg1067 +[282,286:0)
284 SW %reg1067<kill>, 0, <fi#8>
SW %reg1067 0 <fi#8>
cond_next46:
288 %reg1068 = LW 0, <fi#6>
LW %reg1068<d> 0 <fi#6>
register: %reg1068 +[290,294:0)
292 %reg1069 = ADDiu %reg1068<kill>, 1
ADDiu %reg1069<d> %reg1068 1
register: %reg1069 +[294,298:0)
296 SW %reg1069<kill>, 0, <fi#6>
SW %reg1069 0 <fi#6>
bb49:
300 %reg1070 = ADDiu %ZERO, 8193
ADDiu %reg1070<d> %mreg(32) 8193
register: %reg1070 +[302,310:0)
304 %reg1071 = LW 0, <fi#6>
LW %reg1071<d> 0 <fi#6>
register: %reg1071 +[306,310:0)
308 %reg1072 = SLT %reg1071<kill>, %reg1070<kill>
SLT %reg1072<d> %reg1071 %reg1070
register: %reg1072 +[310,314:0)
312 BNE %reg1072<kill>, %ZERO, mbb<bb20,0x88c8140>
BNE %reg1072 %mreg(32) <mbb:bb20 at 0x88c8140>
bb55:
316 %reg1073 = ADDiu %ZERO, 0
ADDiu %reg1073<d> %mreg(32) 0
register: %reg1073 +[318,334:0)
320 %reg1074 = LW 0, <fi#5>
LW %reg1074<d> 0 <fi#5>
register: %reg1074 +[322,334:0)
324 %reg1075 = ADDiu %reg1074, 4294967295
ADDiu %reg1075<d> %reg1074 -1
register: %reg1075 +[326,330:0)
328 SW %reg1075<kill>, 0, <fi#5>
SW %reg1075 0 <fi#5>
332 BNE %reg1074<kill>, %reg1073<kill>, mbb<bb,0x88c7ed8>
BNE %reg1074 %reg1073 <mbb:bb at 0x88c7ed8>
bb62:
336 %reg1076 = LUi <ga:.str>
LUi %reg1076<d> <ga:.str>
register: %reg1076 +[338,350:0)
340 %reg1077 = LW 0, <fi#8>
LW %reg1077<d> 0 <fi#8>
register: %reg1077 +[342,358:0)
344 ADJCALLSTACKDOWN 0, %SP<imp-def>, %SP<imp-use>
ADJCALLSTACKDOWN 0 %mreg(19)<d> %mreg(19)
348 %reg1078 = ADDiu %reg1076<kill>, <ga:.str>
ADDiu %reg1078<d> %reg1076 <ga:.str>
register: %reg1078 +[350,354:0)
352 %4<dead> = ADDu %ZERO, %reg1078<kill>
ADDu %mreg(1)<d> %mreg(32) %reg1078
register: 4 dead +[354,355:2)
356 %5<dead> = ADDu %ZERO, %reg1077<kill>
ADDu %mreg(2)<d> %mreg(32) %reg1077
register: 5 dead +[358,359:1)
360 JAL <ga:printf>
JAL <ga:printf>
364 ADJCALLSTACKUP 0, %SP<imp-def>, %SP<imp-use>
ADJCALLSTACKUP 0 %mreg(19)<d> %mreg(19)
368 %reg1079<dead> = ADDu %ZERO, %2<kill>
ADDu %reg1079<d> %mreg(32) %mreg(30)
register: %reg1079 +[370,371:0)
372 %reg1080 = ADDiu %ZERO, 0
ADDiu %reg1080<d> %mreg(32) 0
register: %reg1080 +[374,382:0)
376 SW %reg1080, 0, <fi#4>
SW %reg1080 0 <fi#4>
380 SW %reg1080<kill>, 0, <fi#2>
SW %reg1080 0 <fi#2>
return:
384 %reg1081 = LW 0, <fi#2>
LW %reg1081<d> 0 <fi#2>
register: %reg1081 +[386,390:0)
388 %2 = ADDu %ZERO, %reg1081<kill>
ADDu %mreg(30)<d> %mreg(32) %reg1081
register: 2 killed +[390,394:0)
392 RET %RA, %2<imp-use,kill>
RET %mreg(10) %mreg(30)
********** INTERVALS **********
4,inf = [0,2:0)[42,43:1)[354,355:2) 0@? 1 at 42 2 at 354
5,inf = [0,6:0)[358,359:1) 0@? 1 at 358
2,inf = [390,394:0) 0 at 390
%reg1024,0 = [2,14:0) 0 at 2
%reg1025,0 = [6,18:0) 0 at 6
%reg1026,0 = [10,26:0) 0@?
%reg1027,0 = [22,26:0) 0@?
%reg1028,0 = [30,34:0) 0@?
%reg1029,0 = [34,42:0) 0@?
%reg1030,0 = [54,58:0) 0 at 54
%reg1031,0 = [66,70:0) 0@?
%reg1032,0 = [74,86:0) 0 at 74
%reg1033,0 = [78,82:0) 0@?
%reg1034,0 = [94,98:0) 0 at 94
%reg1035,0 = [102,106:0) 0@?
%reg1036,0 = [114,122:0) 0@?
%reg1037,0 = [118,130:0) 0@?
%reg1038,0 = [122,130:0) 0@?
%reg1039,0 = [126,134:0) 0@?
%reg1040,0 = [130,134:0) 0@?
%reg1041,0 = [138,142:0) 0@?
%reg1042,0 = [142,146:0) 0@?
%reg1043,0 = [150,158:0) 0@?
%reg1044,0 = [154,158:0) 0@?
%reg1045,0 = [158,162:0) 0@?
%reg1046,0 = [166,170:0) 0@?
%reg1047,0 = [178,186:0) 0@?
%reg1048,0 = [182,190:0) 0@?
%reg1049,0 = [186,190:0) 0@?
%reg1050,0 = [190,194:0) 0@?
%reg1051,0 = [194,202:0) 0@?
%reg1052,0 = [198,202:0) 0 at 198
%reg1053,0 = [206,210:0) 0@?
%reg1054,0 = [210,214:0) 0@?
%reg1055,0 = [222,230:0) 0@?
%reg1056,0 = [226,238:0) 0@?
%reg1057,0 = [230,238:0) 0@?
%reg1058,0 = [234,242:0) 0 at 234
%reg1059,0 = [238,242:0) 0@?
%reg1060,0 = [246,254:0) 0@?
%reg1061,0 = [250,254:0) 0@?
%reg1062,0 = [254,258:0) 0@?
%reg1063,0 = [262,270:0) 0@?
%reg1064,0 = [266,270:0) 0@?
%reg1065,0 = [270,274:0) 0@?
%reg1066,0 = [278,282:0) 0@?
%reg1067,0 = [282,286:0) 0@?
%reg1068,0 = [290,294:0) 0@?
%reg1069,0 = [294,298:0) 0@?
%reg1070,0 = [302,310:0) 0@?
%reg1071,0 = [306,310:0) 0@?
%reg1072,0 = [310,314:0) 0@?
%reg1073,0 = [318,334:0) 0 at 318
%reg1074,0 = [322,334:0) 0@?
%reg1075,0 = [326,330:0) 0@?
%reg1076,0 = [338,350:0) 0@?
%reg1077,0 = [342,358:0) 0@?
%reg1078,0 = [350,354:0) 0@?
%reg1079,0 = [370,371:0) 0 at 370
%reg1080,0 = [374,382:0) 0 at 374
%reg1081,0 = [386,390:0) 0@?
********** INTERVALS **********
4,inf = [0,2:0)[42,43:1)[354,355:2) 0@? 1 at 42 2 at 354
5,inf = [0,6:0)[358,359:1) 0@? 1 at 358
2,inf = [390,394:0) 0 at 390
%reg1024,0 = [2,14:0) 0 at 2
%reg1025,0 = [6,18:0) 0 at 6
%reg1026,0 = [10,26:0) 0@?
%reg1027,0 = [22,26:0) 0@?
%reg1028,0 = [30,34:0) 0@?
%reg1029,0 = [34,42:0) 0@?
%reg1030,0 = [54,58:0) 0 at 54
%reg1031,0 = [66,70:0) 0@?
%reg1032,0 = [74,86:0) 0 at 74
%reg1033,0 = [78,82:0) 0@?
%reg1034,0 = [94,98:0) 0 at 94
%reg1035,0 = [102,106:0) 0@?
%reg1036,0 = [114,122:0) 0@?
%reg1037,0 = [118,130:0) 0@?
%reg1038,0 = [122,130:0) 0@?
%reg1039,0 = [126,134:0) 0@?
%reg1040,0 = [130,134:0) 0@?
%reg1041,0 = [138,142:0) 0@?
%reg1042,0 = [142,146:0) 0@?
%reg1043,0 = [150,158:0) 0@?
%reg1044,0 = [154,158:0) 0@?
%reg1045,0 = [158,162:0) 0@?
%reg1046,0 = [166,170:0) 0@?
%reg1047,0 = [178,186:0) 0@?
%reg1048,0 = [182,190:0) 0@?
%reg1049,0 = [186,190:0) 0@?
%reg1050,0 = [190,194:0) 0@?
%reg1051,0 = [194,202:0) 0@?
%reg1052,0 = [198,202:0) 0 at 198
%reg1053,0 = [206,210:0) 0@?
%reg1054,0 = [210,214:0) 0@?
%reg1055,0 = [222,230:0) 0@?
%reg1056,0 = [226,238:0) 0@?
%reg1057,0 = [230,238:0) 0@?
%reg1058,0 = [234,242:0) 0 at 234
%reg1059,0 = [238,242:0) 0@?
%reg1060,0 = [246,254:0) 0@?
%reg1061,0 = [250,254:0) 0@?
%reg1062,0 = [254,258:0) 0@?
%reg1063,0 = [262,270:0) 0@?
%reg1064,0 = [266,270:0) 0@?
%reg1065,0 = [270,274:0) 0@?
%reg1066,0 = [278,282:0) 0@?
%reg1067,0 = [282,286:0) 0@?
%reg1068,0 = [290,294:0) 0@?
%reg1069,0 = [294,298:0) 0@?
%reg1070,0 = [302,310:0) 0@?
%reg1071,0 = [306,310:0) 0@?
%reg1072,0 = [310,314:0) 0@?
%reg1073,0 = [318,334:0) 0 at 318
%reg1074,0 = [322,334:0) 0@?
%reg1075,0 = [326,330:0) 0@?
%reg1076,0 = [338,350:0) 0@?
%reg1077,0 = [342,358:0) 0@?
%reg1078,0 = [350,354:0) 0@?
%reg1079,0 = [370,371:0) 0 at 370
%reg1080,0 = [374,382:0) 0 at 374
%reg1081,0 = [386,390:0) 0@?
********** MACHINEINSTRS **********
entry:
0 %reg1024 = ADDu %ZERO, %4<kill>
ADDu %reg1024<d> %mreg(32) %mreg(1)
4 %reg1025 = ADDu %ZERO, %5<kill>
ADDu %reg1025<d> %mreg(32) %mreg(2)
8 %reg1026 = ADDiu %ZERO, 2
ADDiu %reg1026<d> %mreg(32) 2
12 SW %reg1024<kill>, 0, <fi#0>
SW %reg1024 0 <fi#0>
16 SW %reg1025<kill>, 0, <fi#1>
SW %reg1025 0 <fi#1>
20 %reg1027 = LW 0, <fi#0>
LW %reg1027<d> 0 <fi#0>
24 BNE %reg1027<kill>, %reg1026<kill>,
mbb<cond_false,0x88c7db8>
BNE %reg1027 %reg1026 <mbb:cond_false at 0x88c7db8>
cond_true:
28 %reg1028 = LW 0, <fi#1>
LW %reg1028<d> 0 <fi#1>
32 %reg1029 = LW 4, %reg1028<kill>
LW %reg1029<d> 4 %reg1028
36 ADJCALLSTACKDOWN 0, %SP<imp-def>, %SP<imp-use>
ADJCALLSTACKDOWN 0 %mreg(19)<d> %mreg(19)
40 %4<dead> = ADDu %ZERO, %reg1029<kill>
ADDu %mreg(1)<d> %mreg(32) %reg1029
44 JAL <ga:atoi>
JAL <ga:atoi>
48 ADJCALLSTACKUP 0, %SP<imp-def>, %SP<imp-use>
ADJCALLSTACKUP 0 %mreg(19)<d> %mreg(19)
52 %reg1030 = ADDu %ZERO, %2<kill>
ADDu %reg1030<d> %mreg(32) %mreg(30)
56 SW %reg1030<kill>, 0, <fi#3>
SW %reg1030 0 <fi#3>
60 J mbb<cond_next,0x88c7e48>
J <mbb:cond_next at 0x88c7e48>
cond_false:
64 %reg1031 = ADDiu %ZERO, 17000
ADDiu %reg1031<d> %mreg(32) 17000
68 SW %reg1031<kill>, 0, <fi#3>
SW %reg1031 0 <fi#3>
cond_next:
72 %reg1032 = ADDiu %ZERO, 0
ADDiu %reg1032<d> %mreg(32) 0
76 %reg1033 = LW 0, <fi#3>
LW %reg1033<d> 0 <fi#3>
80 SW %reg1033<kill>, 0, <fi#5>
SW %reg1033 0 <fi#5>
84 SW %reg1032<kill>, 0, <fi#8>
SW %reg1032 0 <fi#8>
88 J mbb<bb55,0x88c8550>
J <mbb:bb55 at 0x88c8550>
bb:
92 %reg1034 = ADDiu %ZERO, 0
ADDiu %reg1034<d> %mreg(32) 0
96 SW %reg1034<kill>, 0, <fi#8>
SW %reg1034 0 <fi#8>
100 %reg1035 = ADDiu %ZERO, 2
ADDiu %reg1035<d> %mreg(32) 2
104 SW %reg1035<kill>, 0, <fi#6>
SW %reg1035 0 <fi#6>
108 J mbb<bb14,0x88c8020>
J <mbb:bb14 at 0x88c8020>
bb9:
112 %reg1036 = LUi <ga:flags.2176>
LUi %reg1036<d> <ga:flags.2176>
116 %reg1037 = LW 0, <fi#6>
LW %reg1037<d> 0 <fi#6>
120 %reg1038 = ADDiu %reg1036<kill>, <ga:flags.2176>
ADDiu %reg1038<d> %reg1036 <ga:flags.2176>
124 %reg1039 = ADDiu %ZERO, 1
ADDiu %reg1039<d> %mreg(32) 1
128 %reg1040 = ADDu %reg1038<kill>, %reg1037<kill>
ADDu %reg1040<d> %reg1038 %reg1037
132 SB %reg1039<kill>, 0, %reg1040<kill>
SB %reg1039 0 %reg1040
136 %reg1041 = LW 0, <fi#6>
LW %reg1041<d> 0 <fi#6>
140 %reg1042 = ADDiu %reg1041<kill>, 1
ADDiu %reg1042<d> %reg1041 1
144 SW %reg1042<kill>, 0, <fi#6>
SW %reg1042 0 <fi#6>
bb14:
148 %reg1043 = ADDiu %ZERO, 8193
ADDiu %reg1043<d> %mreg(32) 8193
152 %reg1044 = LW 0, <fi#6>
LW %reg1044<d> 0 <fi#6>
156 %reg1045 = SLT %reg1044<kill>, %reg1043<kill>
SLT %reg1045<d> %reg1044 %reg1043
160 BNE %reg1045<kill>, %ZERO, mbb<bb9,0x88c7f90>
BNE %reg1045 %mreg(32) <mbb:bb9 at 0x88c7f90>
bb19:
164 %reg1046 = ADDiu %ZERO, 2
ADDiu %reg1046<d> %mreg(32) 2
168 SW %reg1046<kill>, 0, <fi#6>
SW %reg1046 0 <fi#6>
172 J mbb<bb49,0x88c84c0>
J <mbb:bb49 at 0x88c84c0>
bb20:
176 %reg1047 = LUi <ga:flags.2176>
LUi %reg1047<d> <ga:flags.2176>
180 %reg1048 = LW 0, <fi#6>
LW %reg1048<d> 0 <fi#6>
184 %reg1049 = ADDiu %reg1047<kill>, <ga:flags.2176>
ADDiu %reg1049<d> %reg1047 <ga:flags.2176>
188 %reg1050 = ADDu %reg1049<kill>, %reg1048<kill>
ADDu %reg1050<d> %reg1049 %reg1048
192 %reg1051 = LBu 0, %reg1050<kill>
LBu %reg1051<d> 0 %reg1050
196 %reg1052 = ADDiu %ZERO, 0
ADDiu %reg1052<d> %mreg(32) 0
200 BEQ %reg1051<kill>, %reg1052<kill>,
mbb<cond_next46,0x88c8430>
BEQ %reg1051 %reg1052 <mbb:cond_next46 at 0x88c8430>
cond_true28:
204 %reg1053 = LW 0, <fi#6>
LW %reg1053<d> 0 <fi#6>
208 %reg1054 = ADDu %reg1053<kill>, %reg1053
ADDu %reg1054<d> %reg1053 %reg1053
212 SW %reg1054<kill>, 0, <fi#7>
SW %reg1054 0 <fi#7>
216 J mbb<bb38,0x88c8310>
J <mbb:bb38 at 0x88c8310>
bb32:
220 %reg1055 = LUi <ga:flags.2176>
LUi %reg1055<d> <ga:flags.2176>
224 %reg1056 = LW 0, <fi#7>
LW %reg1056<d> 0 <fi#7>
228 %reg1057 = ADDiu %reg1055<kill>, <ga:flags.2176>
ADDiu %reg1057<d> %reg1055 <ga:flags.2176>
232 %reg1058 = ADDiu %ZERO, 0
ADDiu %reg1058<d> %mreg(32) 0
236 %reg1059 = ADDu %reg1057<kill>, %reg1056<kill>
ADDu %reg1059<d> %reg1057 %reg1056
240 SB %reg1058<kill>, 0, %reg1059<kill>
SB %reg1058 0 %reg1059
244 %reg1060 = LW 0, <fi#7>
LW %reg1060<d> 0 <fi#7>
248 %reg1061 = LW 0, <fi#6>
LW %reg1061<d> 0 <fi#6>
252 %reg1062 = ADDu %reg1060<kill>, %reg1061<kill>
ADDu %reg1062<d> %reg1060 %reg1061
256 SW %reg1062<kill>, 0, <fi#7>
SW %reg1062 0 <fi#7>
bb38:
260 %reg1063 = ADDiu %ZERO, 8193
ADDiu %reg1063<d> %mreg(32) 8193
264 %reg1064 = LW 0, <fi#7>
LW %reg1064<d> 0 <fi#7>
268 %reg1065 = SLT %reg1064<kill>, %reg1063<kill>
SLT %reg1065<d> %reg1064 %reg1063
272 BNE %reg1065<kill>, %ZERO, mbb<bb32,0x88c8280>
BNE %reg1065 %mreg(32) <mbb:bb32 at 0x88c8280>
bb43:
276 %reg1066 = LW 0, <fi#8>
LW %reg1066<d> 0 <fi#8>
280 %reg1067 = ADDiu %reg1066<kill>, 1
ADDiu %reg1067<d> %reg1066 1
284 SW %reg1067<kill>, 0, <fi#8>
SW %reg1067 0 <fi#8>
cond_next46:
288 %reg1068 = LW 0, <fi#6>
LW %reg1068<d> 0 <fi#6>
292 %reg1069 = ADDiu %reg1068<kill>, 1
ADDiu %reg1069<d> %reg1068 1
296 SW %reg1069<kill>, 0, <fi#6>
SW %reg1069 0 <fi#6>
bb49:
300 %reg1070 = ADDiu %ZERO, 8193
ADDiu %reg1070<d> %mreg(32) 8193
304 %reg1071 = LW 0, <fi#6>
LW %reg1071<d> 0 <fi#6>
308 %reg1072 = SLT %reg1071<kill>, %reg1070<kill>
SLT %reg1072<d> %reg1071 %reg1070
312 BNE %reg1072<kill>, %ZERO, mbb<bb20,0x88c8140>
BNE %reg1072 %mreg(32) <mbb:bb20 at 0x88c8140>
bb55:
316 %reg1073 = ADDiu %ZERO, 0
ADDiu %reg1073<d> %mreg(32) 0
320 %reg1074 = LW 0, <fi#5>
LW %reg1074<d> 0 <fi#5>
324 %reg1075 = ADDiu %reg1074, 4294967295
ADDiu %reg1075<d> %reg1074 -1
328 SW %reg1075<kill>, 0, <fi#5>
SW %reg1075 0 <fi#5>
332 BNE %reg1074<kill>, %reg1073<kill>, mbb<bb,0x88c7ed8>
BNE %reg1074 %reg1073 <mbb:bb at 0x88c7ed8>
bb62:
336 %reg1076 = LUi <ga:.str>
LUi %reg1076<d> <ga:.str>
340 %reg1077 = LW 0, <fi#8>
LW %reg1077<d> 0 <fi#8>
344 ADJCALLSTACKDOWN 0, %SP<imp-def>, %SP<imp-use>
ADJCALLSTACKDOWN 0 %mreg(19)<d> %mreg(19)
348 %reg1078 = ADDiu %reg1076<kill>, <ga:.str>
ADDiu %reg1078<d> %reg1076 <ga:.str>
352 %4<dead> = ADDu %ZERO, %reg1078<kill>
ADDu %mreg(1)<d> %mreg(32) %reg1078
356 %5<dead> = ADDu %ZERO, %reg1077<kill>
ADDu %mreg(2)<d> %mreg(32) %reg1077
360 JAL <ga:printf>
JAL <ga:printf>
364 ADJCALLSTACKUP 0, %SP<imp-def>, %SP<imp-use>
ADJCALLSTACKUP 0 %mreg(19)<d> %mreg(19)
368 %reg1079<dead> = ADDu %ZERO, %2<kill>
ADDu %reg1079<d> %mreg(32) %mreg(30)
372 %reg1080 = ADDiu %ZERO, 0
ADDiu %reg1080<d> %mreg(32) 0
376 SW %reg1080, 0, <fi#4>
SW %reg1080 0 <fi#4>
380 SW %reg1080<kill>, 0, <fi#2>
SW %reg1080 0 <fi#2>
return:
384 %reg1081 = LW 0, <fi#2>
LW %reg1081<d> 0 <fi#2>
388 %2 = ADDu %ZERO, %reg1081<kill>
ADDu %mreg(30)<d> %mreg(32) %reg1081
392 RET %RA, %2<imp-use,kill>
RET %mreg(10) %mreg(30)
********** SIMPLE REGISTER COALESCING **********
********** Function: main
********** JOINING INTERVALS ***********
bb32:
bb38:
bb9:
bb14:
bb20:
cond_true28:
bb43:
cond_next46:
bb49:
bb:
bb19:
bb55:
entry:
cond_true:
cond_false:
cond_next:
bb62:
return:
bb32:
232 %reg1058 = ADDiu %ZERO, 0
ADDiu %reg1058<d> %mreg(32) 0
Src reg is unallocatable physreg.
bb38:
bb9:
bb14:
bb20:
196 %reg1052 = ADDiu %ZERO, 0
ADDiu %reg1052<d> %mreg(32) 0
Src reg is unallocatable physreg.
cond_true28:
bb43:
cond_next46:
bb49:
bb:
92 %reg1034 = ADDiu %ZERO, 0
ADDiu %reg1034<d> %mreg(32) 0
Src reg is unallocatable physreg.
bb19:
bb55:
316 %reg1073 = ADDiu %ZERO, 0
ADDiu %reg1073<d> %mreg(32) 0
Src reg is unallocatable physreg.
entry:
0 %reg1024 = ADDu %ZERO, %4<kill>
ADDu %reg1024<d> %mreg(32) %mreg(1)
Inspecting 4,inf = [0,2:0)[42,43:1)[354,355:2) 0@? 1 at 42 2 at 354 and
%reg1024,0 = [2,14:0) 0 at 2:
Joined. Result = 4,inf = [0,14:0)[42,43:1)[354,355:2) 0@? 1 at 42 2 at 354
4 %reg1025 = ADDu %ZERO, %5<kill>
ADDu %reg1025<d> %mreg(32) %mreg(2)
Inspecting 5,inf = [0,6:0)[358,359:1) 0@? 1 at 358 and %reg1025,0 = [6,18:0)
0 at 6:
Joined. Result = 5,inf = [0,18:0)[358,359:1) 0@? 1 at 358
cond_true:
40 %4<dead> = ADDu %ZERO, %reg1029<kill>
ADDu %mreg(1)<d> %mreg(32) %reg1029
Inspecting %reg1029,0 = [34,42:0) 0@? and 4,inf =
[0,14:0)[42,43:1)[354,355:2) 0@? 1 at 42 2 at 354:
Joined. Result = 4,inf = [0,14:0)[34,43:1)[354,355:2) 0@? 1@? 2 at 354
52 %reg1030 = ADDu %ZERO, %2<kill>
ADDu %reg1030<d> %mreg(32) %mreg(30)
Inspecting 2,inf = [390,394:0) 0 at 390 and %reg1030,0 = [54,58:0) 0 at 54:
Joined. Result = 2,inf = [54,58:0)[390,394:0) 0 at 390
cond_false:
cond_next:
72 %reg1032 = ADDiu %ZERO, 0
ADDiu %reg1032<d> %mreg(32) 0
Src reg is unallocatable physreg.
bb62:
352 %4<dead> = ADDu %ZERO, %reg1078<kill>
ADDu %mreg(1)<d> %mreg(32) %reg1078
Inspecting %reg1078,0 = [350,354:0) 0@? and 4,inf =
[0,14:0)[34,43:1)[354,355:2) 0@? 1@? 2 at 354:
Joined. Result = 4,inf = [0,14:0)[34,43:1)[350,355:2) 0@? 1@? 2@?
356 %5<dead> = ADDu %ZERO, %reg1077<kill>
ADDu %mreg(2)<d> %mreg(32) %reg1077
Inspecting %reg1077,0 = [342,358:0) 0@? and 5,inf = [0,18:0)[358,359:1) 0@?
1 at 358:
Joined. Result = 5,inf = [0,18:0)[342,359:1) 0@? 1@?
368 %reg1079<dead> = ADDu %ZERO, %2<kill>
ADDu %reg1079<d> %mreg(32) %mreg(30)
Inspecting 2,inf = [54,58:0)[390,394:0) 0 at 390 and %reg1079,0 = [370,371:0)
0 at 370: llc: /home/projects/llvm/svn/lib/CodeGen/LiveInterval.cpp:227: void
llvm::LiveInterval::removeRange(unsigned int, unsigned int): Assertion
`I->contains(Start) && I->contains(End-1) && "Range
is not entirely in interval!"' failed.
llc((anonymous namespace)::PrintStackTrace()+0x1a)[0x87cb046]
llc((anonymous namespace)::SignalHandler(int)+0x110)[0x87cb30a]
[0xb7ef2420]
/lib/libc.so.6(abort+0x109)[0xb7c88e19]
/lib/libc.so.6(__assert_fail+0xfc)[0xb7c80ecc]
llc(llvm::LiveInterval::removeRange(unsigned int, unsigned int)+0xdd)[0x865de03]
llc(llvm::SimpleRegisterCoalescing::JoinCopy(llvm::MachineInstr*, unsigned int,
unsigned int, bool)+0x8cb)[0x863ede9]
llc(llvm::SimpleRegisterCoalescing::CopyCoalesceInMBB(llvm::MachineBasicBlock*,
std::vector<llvm::SimpleRegisterCoalescing::CopyRec,
std::allocator<llvm::SimpleRegisterCoalescing::CopyRec> >*,
bool)+0x132)[0x863f24c]
llc(llvm::SimpleRegisterCoalescing::joinIntervals()+0x3de)[0x863f69c]
llc(llvm::SimpleRegisterCoalescing::runOnMachineFunction(llvm::MachineFunction&)+0x239)[0x863fc65]
llc(llvm::MachineFunctionPass::runOnFunction(llvm::Function&)+0x28)[0x83c9540]
llc(llvm::FPPassManager::runOnFunction(llvm::Function&)+0x13a)[0x8764e7c]
llc(llvm::FunctionPassManagerImpl::run(llvm::Function&)+0x6e)[0x87650fe]
llc(llvm::FunctionPassManager::run(llvm::Function&)+0x88)[0x876524c]
llc(main+0x996)[0x8382906]
/lib/libc.so.6(__libc_start_main+0xd8)[0xb7c74878]
llc[0x83810a1]
It's either invalid code generated by the earlier passes or a bug in the live interval analysis pass. It's impossible to tell without more information or a reduced test case. Can you bugpoint it? Evan On Jul 11, 2007, at 5:05 PM, Bruno Cardoso Lopes wrote:> Hi all, > > When compiling some programs using the Mips backend > i'm getting this assert message on lib/CodeGen/LiveInterval.cpp:227: > "Range is not entirely in interval!" > > I don't know yet if it's something that is missing on the backend > code or why > the range to be removed it outside the interval, does anyone have > any clue? > A more detailed output is attached. > > The program i tried to compile is : > test-suite/SingleSource/Benchmarks/Shootout/sieve.c > > Cheers, > > -- > Bruno Cardoso Lopes > http://www.brunocardoso.org > > "The Man in Black fled across the desert and the gunslinger followed" > - Childe Roland to the Dark Tower Came > <sieve_compile.txt> > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20070711/61cd421a/attachment.html>