search for: cisc

...om: asterisk-users-bounces at lists.digium.com > [mailto:asterisk-users-bounces at lists.digium.com] On Behalf Of Peder > Sent: Monday, March 15, 2010 6:54 PM > To: 'Asterisk Users Mailing List - Non-Commercial Discussion' > Subject: Re: [asterisk-users] Asterisk to be used with Ciscs media > gateways > > exten=07028XXXXXX,1,Dial(SIP/${EXTEN}@PCCW-KPN) > > You aren't sending an outbound DID with just SIP/PCCW-KPN. > > -----Original Message----- > From: asterisk-users-bounces at lists.digium.com > [mailto:asterisk-users-bounces at lists.digium.c...

...ail carefully otherwise please disregard. ----- As you are most likely aware, the CRTC has undertaken the roll of regulating VoIP services in Canada and is currently conducting hearings with the goal of putting in place regulatory requirements for all VoIP providers. Specifically, the CRTC's CISC VoIP 911 working group ( http://www.crtc.gc.ca/cisc/eng/cisf3e4_20.htm ) is very actively looking at what regulations to put in place in order to implement E911 services for VoIP. The recommendations of this committee will have direct impact on your business. Currently this working group is is lar...

...---- IPC$ nobody nobody 4654 win2k1 ..... ------------8<--------------- Do you have an other idea? Thank you Markus "John H Terpstra" <jht@samba.org> schrieb im Newsbeitrag news:<20030402162023$4954@gated-at.bofh.it>... > On Wed, 2 Apr 2003, Markus PISTAUER (CISC) wrote: > > > Dear Eric, > > > > thanks for your answer. I have non of the items you defined in the global > > section. There is also no error in the log file. So I'm realy at the end of > > my "know-how" (if any ...) > > > > My global sec...

...ettings: ------------------------- I'm using Samba 2.2.5 (release 160), win2k prof with SP3 or no SP, classic authentication on the PDC. Linux Kernel is 2.4.19 (Build 174). I have also tried 2.2.8 with same failure. Any help would be VERY appreciated. Thanks Markus Pistauer mailto:m.pistauer@cisc.at

Hi all, Was wondering what is the real benefit of say translating from LLVM's RISC-type instruction set to the x86 which is a more CISC type of design? Especially after emitting said RISC stream from a much higher-level language like say C or C++? I always thought that to efficiently translate logic, as much as possible information has to be retained down the translation chain? Would that not make the opposite case when first human...

...ervices networks to IP-based emergency networks (so called next generation 9-1-1 networks) in Canada no sooner than 36 months after the deployment of i2. ESWG further recommends that the Commission order eight specific tasks with sequential milestones to assist with the orderly deployment of i2: 1. CISC should be ordered to deliver within 6 months a preferred PSAP funding model for VoIP E9-1-1 addressing regional/provincial variances and practices to produce a common national standard. 2. CISC should be ordered to deliver a comprehensive architecture for the implementation of VoIP E9-1-1 to delive...

...ervices networks to IP-based emergency networks (so called next generation 9-1-1 networks) in Canada no sooner than 36 months after the deployment of i2. ESWG further recommends that the Commission order eight specific tasks with sequential milestones to assist with the orderly deployment of i2: 1. CISC should be ordered to deliver within 6 months a preferred PSAP funding model for VoIP E9-1-1 addressing regional/provincial variances and practices to produce a common national standard. 2. CISC should be ordered to deliver a comprehensive architecture for the implementation of VoIP E9-1-1 to delive...

...17.6.0: Tue May 8 15:22:16 PDT 2018; root:xnu-4570.61.1~1/RELEASE_X86_64 x86_64 $ sysctl machdep.cpu.brand_string machdep.cpu.brand_string: Intel(R) Core(TM) i5-2415M CPU @ 2.30GHz $ /usr/bin/openssl speed rsa [...] LibreSSL 2.2.7 built on: date not available options:bn(64,64) rc4(ptr,int) des(idx,cisc,16,int) aes(partial) blowfish(idx) compiler: information not available rsa 512 bits 0.000964s 0.000059s 1037.3 16987.1 rsa 1024 bits 0.006052s 0.000271s 165.2 3687.3 rsa 2048 bits 0.040528s 0.001145s 24.7 873.6 rsa 4096 bits 0.278889s 0.004272s 3.6 234.1 $ libressl-2.2.7/ap...

...ervices networks to IP-based emergency networks (so called next generation 9-1-1 networks) in Canada no sooner than 36 months after the deployment of i2. ESWG further recommends that the Commission order eight specific tasks with sequential milestones to assist with the orderly deployment of i2: 1. CISC should be ordered to deliver within 6 months a preferred PSAP funding model for VoIP E9-1-1 addressing regional/provincial variances and practices to produce a common national standard. 2. CISC should be ordered to deliver a comprehensive architecture for the implementation of VoIP E9-1-1 to delive...

Hey gang, I'm looking at escaping from a Nortel Meridian CISC system to Asterisk/Digium/SIP phones. I'm currently in the testing and proof of concept phase. I'm going to need a SIP phone and don't want to re-purchase and have "orphans" around. We currently run Nortel 7310 phones and they work great. I'm sort of overwhelmed by all...

...s the features you need (is this possible?), and .......... you get the idea... > POTS FXO/FXS? Nope. Kinda like saying - I need a 7206VXR to support 3 home internet users..... would be very cool... (I bet there is someone on this list that comes close...) (JT - speak up...) > What other Cisco routers can act as SIP gateways today? Are Cisco's green? Anything with an FXO port and a suitable IOS load... (The correct answer to this question cannot be reasonable expressed on a mail list, it is more like a SQL query, except Cisco does not make a Sales SQL database, preferring instead t...

I'm trying to figure out how to map more complex CISC instructions now. For example on the 68000, you have things like -- add.w (a0)+,(a1)+ So that equates to: temp1 = load a0 add 2, a0 temp2 = load a1 temp1 = add temp1, temp2 store temp1, a1 add 2, a1 How do I express that in a form for LLVM? I see things like pre_store and post_store, but I can...

Hmm, I'm getting nowhere pretty fast. It seems 68000 with its CISC nature is quite complex to implement for a novice. I can see how to implement simple stuff, like -- move dn, dn move dn, (an) As that just turns into stores, sets, etc. But how would you represent things like indexed access? move dn, (an,dn) move dn, offset(an) Can I only really define very si...

...tores directly into the instructions that reference them? When a register is spilled, the register allocator first tries foldMemoryOperand on all instructions using the register. If successful, the target creates an instruction that accesses the stack slot directly (as is possible on x86 and other CISC architectures). If it fails, the register allocator creates a new tiny live range around the existing instruction, and uses storeRegToStackSlot and readRegFromStackSlot to spill and reload that new register around the instruction. /jakob

...-accurate" simulator or the real hardware. Due to the poor performance of cycle-accurate simulators in terms of accuracy, I am not considering currently. Among the real hardware, X86 is a favorable choice due to wide availability for me to experiment with different configurations. However, its CISCity scares me too. Is it possible to choose a small subset of X86 ISA, without scary addressing modes and emitting only those instructions from LLVM. Will generally available hardware profiling tools work fine in such a case. Is there any info available for any such subset has been defined and used...

...essor architecture as part of 2009's Google Summer of Code program. TPA processor is a new architecture that offers the possibility of high instruction-level parallelism with energy efficiency. TPA architecture partitions the work between the compiler and the hardware differently from RISC and CISC architectures. TPA architecture has three different features that require new complier support. First, the compiler is responsible for partitioning the program into a sequence of structured blocks, which logically execute atomically. Secondly, the compiler should encode instruction dependences expl...

...e treated as (addmm address, address). Here is an alternative you can take into consideration: defining new node (like addmm, similiar with movmm) to specify matching patterns for isel. Regards. 2012/12/2 Joseph Pusdesris <joe at pusdesris.com>: > I am writing a target for an odd cisc-like architecture which has no support > for keeping most values in registers. As such, memory-memory operations are > needed, but for isel to generate a memory-memory the pattern must be of the > form (store (op (load) (load))). > > Let's use a simple example to show how this c...

In the past 24 hours multiple persons have contacted me regarding the use of elliptic curve cryptography in tinc 1.1 in light of the suspicion that the NSA might have weakened algorithms and/or elliptic curves published by NIST. The new protocol in tinc 1.1 (SPTPS) uses ECDH and ECDSA to do session key exchange and authentication, in such a way that it has the perfect forward secrecy (PFS)

In the past 24 hours multiple persons have contacted me regarding the use of elliptic curve cryptography in tinc 1.1 in light of the suspicion that the NSA might have weakened algorithms and/or elliptic curves published by NIST. The new protocol in tinc 1.1 (SPTPS) uses ECDH and ECDSA to do session key exchange and authentication, in such a way that it has the perfect forward secrecy (PFS)

I am writing a target for an odd cisc-like architecture which has no support for keeping most values in registers. As such, memory-memory operations are needed, but for isel to generate a memory-memory the pattern must be of the form (store (op (load) (load))). Let's use a simple example to show how this can be problematic: %0...