Displaying 20 results from an estimated 200 matches for "asic".
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2012 Jul 03
3
bge problems in RELENG_9, bge0: watchdog timeout -- resetting
...model=0x22 rev=0x0 at phyno=2
brgphy2 pnpinfo oui=0x1be9 model=0x22 rev=0x0 at phyno=3
brgphy3 pnpinfo oui=0x1be9 model=0x22 rev=0x0 at phyno=4
# grep bge /var/run/dmesg.boot
bge0: <Broadcom unknown BCM5719, ASIC rev. 0x5719001> mem
0xf6bf0000-0xf6bfffff,
0xf6be0000-0xf6beffff,0xf6bd0000-0xf6bdffff irq 32 at device 0.0 on pci3
bge0: CHIP ID 0x05719001; ASIC REV 0x5719; CHIP REV 0x57190; PCI-E
miibus0: <MII bus> on bge0
bge0...
2009 Mar 16
1
bge0: EEPROM read timed
Hi.
I got this on today's RELENG_6 with Broadcom BCM5722 A0, ASIC rev. 0xa200.
>From dmesg (bge related):
bge0: <Broadcom BCM5722 A0, ASIC rev. 0xa200> mem
0xe8400000-0xe840ffff irq 16 at device 0.0 on pci2
bge0: firmware handshake timed out, found 0x4b657654
bge0: firmware handshake timed out, found 0x4b657654
bge0: EEPROM read timed out
bge0: failed...
2013 Jun 01
0
Asic-technologies.com
Asic-technologies.com
We make ASIC Bitcoin Mining Gear using the ASIC chips Sourced from Taiwan.
3.1 -3.3 GHash/sec 4 Board (has 32 chips) - 15 BTC
9.3-9.9 GHash/sec 12 Board (has 96 chips) - 30 BTC
Each module board uses about 39 Watts of power.
Mining board's supplied (No case) power supply , On-b...
2013 Jun 01
0
Asic-technologies.com
Asic-technologies.com
We make ASIC Bitcoin Mining Gear using the ASIC chips Sourced from Taiwan.
3.1 -3.3 GHash/sec 4 Board (has 32 chips) - 15 BTC
9.3-9.9 GHash/sec 12 Board (has 96 chips) - 30 BTC
Each module board uses about 39 Watts of power.
Mining board's supplied (No case) power supply , On-b...
2013 Jan 25
2
bge numbering
Hi,
this server, a Dell R720 has 4 bge on board,
Broadcom NetXtreme Gigabit Ethernet, ASIC rev. 0x5720000
bge0: APE FW version: NCSI v1.1.7.0
bge0: CHIP ID 0x05720000; ASIC REV 0x5720; CHIP REV 0x57200; PCI-E
miibus0: <MII bus> on bge0
...
I have connected the ethernet to port labeled 0, but it appears
as bge2, how can this be corrected?
thanks,
danny
2014 Aug 20
1
Symlink outside the share path
...th> is a symlink outside the share
path*
I have a server that is both an NFS and a Samba server. It is running RHEL
5.10 and Samba 3.0.33 (native RHEL packages). I recently patched from 5.2
to 5.10 and this also updated Samba to the current release.
My smb.conf file has me exporting /datavol/asic.as \\myserver\asic.
This works just fine for all users on Windows for files/subdirs in that
/datavol/asic path.
The problem comes when they try to get to files that are softlinked to
/globalscratch2 from /datavol/asic directories.
I have tried this both with and without exporting /globalscratch2...
2003 Jun 04
3
bge drivers does not work for 3COM 3C996-SX / 3C996B-T
I'm experiencing similar problems with a 3C996-T under 4.8-REL.
In particular, connecting a 4.8-REL machine to a 5.1-REL machine leads
to some interesting situations: I can do simple pings across the link,
but ssh fails, and heavy pings crash the 4.8 machine. Similarly
changing the interface configuration with ifconfig tends to crash the
4.8 machine (mtu, link0, up/down, etc). The
2005 Apr 15
0
Older 3ware controller, was: Serial ATA hardware raid.
...u seem to know what you're talking about,
Seems v. Knows is a whole new ballgame.
But I have been deploying SCSI on Linux since 1993 (Advansys, now owned by LSI, was the first vendor to formally support Linux),
SCSI RAID on Linux since 1997 (large ICP-Vortex),
through 3Ware's original FPGA ASIC designs in the AccelATA and Escalade 5000 series in 1999+.
For a more "concept-level" dissertation on:
- Software RAID via OS LDM/LVM
- Fake/Free RAID (FRAID) "dumb cards"
- Buffering Microcontroller+DRAM intelligent cards
- Non-blocking ASIC+SRAM intelligent cards
see my artic...
2000 Aug 15
1
Ogg Vorbis Framing
...egment?
In the case of bandwidth limited transmission, where important data is at the front of a page
and pages are truncated, distributed lacing values would make better use of the bits
received, as unused lacing values would not be transmitted.
CRC POSITIONING
It is also inconvenient (from an ASIC view) having the CRC at the front of the page, as
it is necessary to buffer the entire page during encoding, then insert the CRC
at the start of the packet. Could the CRC be moved to the rear of the packet?
In the case of bandwidth limited transmission, the CRC would be lost, but it is useless
in...
2014 Aug 20
0
SOLVED Symlink outside the share path
...athy:
>>> >>
>>> >> Thanks for the reply, John. I already do have follow symlinks = yes
>>> set
>>> >>> in
>>> >>> my smb.conf file but it doesn't appear to be honoring it outside the
>>> >>> /datavol/asic filesystem.
>>> >>>
>>> >>> Kathy
>>> >>>
>>> >>>
>>> >>> On Tue, Aug 19, 2014 at 5:50 PM, Taylor, Jonn <
>>> jonnt at taylortelephone.com>
>>> >>> wrote:
>>> >>...
2005 Aug 22
2
64 bit hardware and filesystem size limit
We recently bought a 32-bit Xeon system with a 12-port 3Ware RAID card
and a dozen 500GB drives. We wanted to create 4TB drive arrays;
however, we soon discovered that there is about a 2.2TB drive array size
limit on 32-bit hardware. Does that sound correct?
Would replacing the 32-bit mobo/cpu with a 64-bit mobo/cpu allow us to
use drive arrays larger than 2.2TB?
Thanks.
2012 Jul 13
2
stable/9 panic Bad tailq NEXT(0xffffffff80e52660->tqh_last) != NULL
...pci0:2:0:1
map[20]: type Prefetchable Memory, range 64, base 0xd50f0000,
size 16, enabled
pcib1: allocated prefetch range (0xd50f0000-0xd50fffff) for rid 20 of
pci0:2:0:1
pcib1: matched entry for 2.0.INTB
pcib1: slot 0 INTB hardwired to IRQ 36
bge0: <Broadcom NetXtreme Gigabit Ethernet, ASIC rev. 0x5720000> mem
0xd50a0000-0xd50affff,0xd50b0000-0xd50bffff,0xd50c0000-0xd50cffff irq 34
at device 0.0 on pci2
bge0: APE FW version: NCSI v1.0.80.0
bge0: attempting to allocate 1 MSI vectors (8 supported)
msi: routing MSI IRQ 264 to local APIC 0 vector 59
bge0: using IRQ 264 for MSI
bge0: CH...
2006 Jan 26
3
Samba daemons hang trying to lock locking.tdb
...mbd
#11 0x0096c5c0 in main () from /usr/sbin/smbd
(gdb)
The number of smbd daemons stalled increases in time.
I'm using FC4 with last updates installed and samba 3.0.21a.
Maybe is a kernel related problem with file locking?
Thanx in advance!
--
Fermin Molina Ibarz
T?cnic sistemes - ASIC
Universitat de Lleida
Tel: +34 973 702151
GPG: 0x060F857A
2014 Jun 02
3
[RFC PATCH v1.2 08/16] drm/radeon: use common fence implementation for fences
...t; + atomic_dec(&rdev->irq.ring_int[i]);
> + }
> +
> + spin_lock_irqsave(&rdev->irq.lock, irqflags);
> + radeon_irq_set(rdev);
> + spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
> +}
> +
> /**
> * radeon_gpu_reset - reset the asic
> *
> @@ -1582,6 +1631,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)
>
> int i, r;
> int resched;
> + uint32_t sw_mask;
>
> down_write(&rdev->exclusive_lock);
>
> @@ -1595,6 +1645,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)...
2014 May 19
2
[RFC PATCH v1 08/16] drm/radeon: use common fence implementation for fences
Am 19.05.2014 15:35, schrieb Maarten Lankhorst:
> op 19-05-14 14:30, Christian K?nig schreef:
>> Am 19.05.2014 12:10, schrieb Maarten Lankhorst:
>>> op 19-05-14 10:27, Christian K?nig schreef:
>>>> Am 19.05.2014 10:00, schrieb Maarten Lankhorst:
>>>> [SNIP]
>>>> The problem here is that the whole approach collides with the way
>>>>
2005 May 10
9
Hardware RAID Controller
Hi Everyone,
Has anyone had any experience of using the Promise FastTrak SX4000 or
SuperTrak SX6000 IDE RAID Controllers under Centos (if it matters I'm
using version 4). I've seen it listed on linuxcompatible.org as working
but would prefer to find out any first-hand experince before I buy.
I'm looking to build a new mini server based on Mini-ITX and have found
a great 1U case
2014 Jul 09
2
[PATCH 09/17] drm/radeon: use common fence implementation for fences
...ontinue;
> +
> + atomic_dec(&rdev->irq.ring_int[i]);
> + }
> +
> + spin_lock_irqsave(&rdev->irq.lock, irqflags);
> + radeon_irq_set(rdev);
> + spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
> +}
> +
> /**
> * radeon_gpu_reset - reset the asic
> *
> @@ -1624,6 +1673,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)
>
> int i, r;
> int resched;
> + uint32_t sw_mask;
>
> down_write(&rdev->exclusive_lock);
>
> @@ -1637,6 +1687,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)
> ra...
2014 Jun 02
0
[RFC PATCH v1.2 08/16] drm/radeon: use common fence implementation for fences
...GS; ++i) {
+ if (!(mask & (1 << i)))
+ continue;
+
+ atomic_dec(&rdev->irq.ring_int[i]);
+ }
+
+ spin_lock_irqsave(&rdev->irq.lock, irqflags);
+ radeon_irq_set(rdev);
+ spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
+}
+
/**
* radeon_gpu_reset - reset the asic
*
@@ -1582,6 +1631,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)
int i, r;
int resched;
+ uint32_t sw_mask;
down_write(&rdev->exclusive_lock);
@@ -1595,6 +1645,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)
radeon_save_bios_scratch_regs(rdev);
/* blo...
2009 Mar 25
8
ITSP's no longer supporting IAX?
After a variety of connectivity problems, my itsp (Unlimitel.ca) blamed the
problem on the IAX protocol. They told me that as of Asterisk 1.4 the IAX
protocol went downhill and many carriers (like VoicePulse) are discontinuing
support for IAX.
Is this correct? We are all heading for SIP?
Thanks,
MD
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2002 Jun 03
2
Help with 2.2.4 binary build
...#39; redefined
include/smb_macros.h:48: warning: this is the location of the previous
definition
Should I be concerned with the warning messages? What do I need to do
to get rid of "unrecognized option `-KPIC'"?
Any pointers will be appreciated!
Desmond
--
JNI Corporation - ASIC Development
45365 Northport Loop West. Fremont, CA 94538-6417
Tel: (510) 360-4751 Fax: (510) 252-0123