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...da/lib64/libcudart.so" \ -DBUILD_SHARED_LIBS:BOOL=ON \ ../llvm \ |& tee log.cmake cmake --build . |& tee log.cmake-build Unfortunately I get the following errors. Is it necessary to change my configuration to avoid the errors? ... [ 66%] Building CXX object tools/clang/lib/Basic/CMakeFiles/clangBasic.dir/TargetInfo.cpp.o [ 66%] Building CXX object tools/clang/lib/Basic/CMakeFiles/clangBasic.dir/Targets.cpp.o /export2/src/llvm-trunk/llvm/tools/clang/lib/Basic/Targets.cpp:5133:23: error: 'AK_ARMV4T' is not a member of 'llvm::ARM' unsigned ArchKind = llv...

Thank you for your reply! > Every MachineBasicBlock has a list of successors; you can access it with > the successors() accessor. That's what you should be using for any CFG > analysis. I am aware of these methods of class MachineBasicBlock, which allows one to access a MachineBasicBlock's successors and predecessors in the CF...

Here is a current listing of the parameters that can be changed by SWAT in each of the 3 pages. A "no" means it does not appear in that page. "BASIC" means it shows in the basic view. "ADVANCED" means it only shows in the advanced view (unless its value is non default, in which case it shows in the basic view as well). Do people think this is the right settings for each of the parameters? Do we need to move any of the "ADVA...

...[#uses=1]Instruction does not dominate all uses! > > > Any idea, what is wrong with this? > Not to be snarky, but the problem is that the definition of b.1 does not dominate the use of b.1 in the add instruction. This may be due to two reasons: 1) The instructions are in the same basic block, but they're in the wrong order. The definition of b.1 follows the use of it in the add instruction. If this is the case, you simply need to make sure your transform orders the instructions correctly within the basic block. 2) The instructions are in different basic blocks. The def...

Hello All, I have some data tied to the basic blocks in a function, and after inlining that function, I'd like to recover that data in the inlined version. Is there some way to match up the inlined version of the function with the original basic blocks? Thanks, Jeremy -------------- next part -------------- An HTML attachment was scrubbe...

Hi, I am trying to get the memory address of each basic block. So far I am trying to add the label into each basic block, actually I need add the label at front of each basic block and then I can use command 'nm' to find the memory address for each basic block. That's the way I got. I don't know if there is another way to do it. Thanks....

I'm running 'make check' to run the testsuite, and I did it this way so the ssh-basic test would run: # export rsync_enable_ssh_tests=yes # make check I did set up ssh so this would run, and here's what I get for output: POSIXLY_CORRECT=1 TOOLDIR=`pwd` rsync_bin=`pwd`/rsync srcdir="." ./runtests.sh ============================================================ ./r...

On the pervious mail, I am trying to add label for each basic basic because I think I could get address by using nm if nm can show the address of each label, but it seems not . so do you guys have some idea how to get address for each basic block? Thanks. >I am trying to get the memory address of each basic block. So far I am trying to add the label &gt...

Hi, I am trying to write a small pass. In my pass, I have inserted some instruction and used that in another. But, during OPT it is showing "Instruction does not dominate all uses" like following - %b.1 = bitcast i32 4 to i32 ; <i32> [#uses=8] %11 = add i32 %a.1, %b.1 ; <i32> [#uses=1]Instruction does not dominate all uses! Any

We would also like to clarify on the misconceptions around CFI Instructions: There are two things that need to be clarified here: 1) Extra CFI FDE entries for basic blocks does not mean more dynamic instructions are executed. In fact, they do not increase at all. Krys talked about this earlier. 2) We do deduplication of common static CFI instructions in the FDE and move it to the CIE . Hence, moving to a new basic block does not mean a completely new set of...

Hi all, LLVM optimization pass gives an error "Terminator found in the middle of a basic block!" since basic block IR may have multiple "ret" instructions. It seems LLVM does not accept multiple return in a basic block by default. Is there a specific optimization or pass that I can enable to remove unreachable codes in basic blocks? Best, Aaron -------------- next par...

Hi, I have been trying to move some instructions between basic blocks , After looking at the API , I found llvm::Instruction::clone() but there is no result value for this. For example- source Basic block : continuation: ; preds = %else, %then %iftmp = phi i32 [ 5, %then ], [ 9, %else ] store i32 %iftmp, i32*...

Dear llvm-dev-list, I have created my own custom section to be added at the end into a binary upon compilation which contains address of all basic blocks. As the final address of the basic block is not known until link time, I collect the MCSymbol* Symbol Values per BB in a temp array and at the in the custom section and emit it (emitSymbolValue) into my section within EmitEndOfAsmFile() I have found people looking at slightly different uses...

Thank you for this reply. If so, is there any way to merge basic blocks into a single one? Thanks, Seung J. Lee ---- Original message ---- >Date: Fri, 29 Jun 2007 22:27:38 +0200 >From: Basile STARYNKEVITCH <basile at starynkevitch.net> >Subject: Re: [LLVMdev] LLVM assembly without basic block >To: LLVM Developers Mailing List <llvmdev...

I am working on a target which has some structural hazards. To detect these hazards, I implemented a sub-class of PostRAHazardRecognizer. PostRAHazardRecognizer resets the hazard state on a basic block basis. So, how to detect hazards that may occur between the end of a basic block and the beginning of another basic block ? Thanks ! -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110210/3f17c651/...

...ng to manipulate > > LLVM > > > > code generation, given none of those options are actually used for Propeller > > > > workflows? > > > > > > > > Where do you suggest labelling and section options should exist? We > > > > looked at basic block sections to be similar to function sections in > > > > terms of option handling? > > > > > > Generating bitcode with/without propeller doesn't actually affect the > > generated bitcode, right? So you could say that Propeller is enabled with "-Wl,-...

...se options are actually > used for Propeller > >> > > > > > workflows? > >> > > > > > > >> > > > > > Where do you suggest labelling and section options should > exist? We > >> > > > > > looked at basic block sections to be similar to function > sections in > >> > > > > > terms of option handling? > >> > > > > > >> > > > > Generating bitcode with/without propeller doesn't actually > affect the > >> > > >...

...DR; Our relaxation pass is similar to what LLVM’s MCAssembler does but with a caveat for efficiency. Our experimental results show it is efficient and convergence is guaranteed. Our relaxation pass is very similar to what MCAssembler does as it needs to solve the same problem, which is laying out basic blocks and optimizing branch instruction sizes based on jump offset. The optimal algorithm to do this is quadratic and it involves computating of section offsets multiple times. Our relaxation pass has a caveat for efficiency. Our relaxation pass recomputes section offsets only after all the secti...

Qiuyu, The dynamic optimization project (an internal research project in our group) uses some way to map LLVM basic blocks to native code addresses. If this is what you want, perhaps you can ask Brian Gaeke (gaeke at uiuc.edu) to give you some information about how that is done. --Vikram http://www.cs.uiuc.edu/~vadve http://llvm.cs.uiuc.edu/ On Aug 19, 2004, at 5:11 PM, Misha Brukman wrote: > On Thu, A...

...; code generation, given none of those options are actually used > for Propeller > > > > > > workflows? > > > > > > > > > > > > Where do you suggest labelling and section options should > exist? We > > > > > > looked at basic block sections to be similar to function > sections in > > > > > > terms of option handling? > > > > > > > > > > Generating bitcode with/without propeller doesn't actually affect > the > > > > generated bitcode, right? So you co...