search for: arrayidx16

Displaying 13 results from an estimated 13 matches for "arrayidx16".

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2016 Oct 04
2
Incompatible type assertion from llvm-tblgen
...=12] 0x2385990: i64 = Constant<3> [ID=2] 0x2385dd0: i64 = shl 0x2385bb0, 0x2385990 [ORD=3] [ID=13] 0x2385ee0: i64 = add 0x2386650, 0x2385dd0 [ORD=3] [ID=14] 0x2385880: <multiple use> *0x2386540*: i32,ch = load 0x2356e90, 0x2385ee0, 0x2385880<LD4[%arrayidx16(addrspace=4)](align=8)(tbaa=<0x2335188>)> [ORD=4] [ID=15] 0x2386320: ch,glue = CopyToReg 0x2356e90, 0x2386210, 0x2386540 [ORD=6] 0x2386210: <multiple use> 0x2386320: <multiple use> 0x2386320: <multiple use> 0x2386430: ch = RET 0x2386210, 0x2386320, 0x238...
2016 Sep 28
2
Incompatible type assertion from llvm-tblgen
...at in order to match this DAG: 0x30d29c0: i64 = Constant<3> 0x30d2e00: i64 = shl 0x30d2be0, 0x30d29c0 [ORD=3] 0x30d2f10: i64 = add 0x30d2cf0, 0x30d2e00 [ORD=3] 0x30d28b0: <multiple use> 0x30d3570: i32,ch = load 0x30a3ec0, 0x30d2f10, 0x30d28b0<LD4[%arrayidx16(addrspace=4)](align=8)(tbaa=<0x3082188>)> [ORD=4] And map it to a load.idx instruction with the following semantics: load.idx r1,r2,r3,SIZE r1 <- mem[r2 + (r3 << sizeof(operand))] That somehow the pattern matching dag fragment would need to be something like I had in ADD...
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...%add9, %6 > %arrayidx12 = getelementptr inbounds i32* %a, i32 7 %7 = load i32* > %arrayidx12, align 4, !tbaa !1 %add13 = add nsw i32 %add11, %7 > %arrayidx14 = getelementptr inbounds i32* %a, i32 8 %8 = load i32* > %arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8 > %arrayidx16 = getelementptr inbounds i32* %a, i32 9 %9 = load i32* > %arrayidx16, align 4, !tbaa !1 %add17 = add nsw i32 %add15, %9 > %arrayidx18 = getelementptr inbounds i32* %a, i32 10 %10 = load i32* > %arrayidx18, align 4, !tbaa !1 %add19 = add nsw i32 %add17, %10 > %arrayidx20 = getelement...
2014 Sep 19
3
[LLVMdev] [Vectorization] Mis match in code generated
...= add nsw i32 %add9, %6 %arrayidx12 = getelementptr inbounds i32* %a, i32 7 %7 = load i32* %arrayidx12, align 4, !tbaa !1 %add13 = add nsw i32 %add11, %7 %arrayidx14 = getelementptr inbounds i32* %a, i32 8 %8 = load i32* %arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8 %arrayidx16 = getelementptr inbounds i32* %a, i32 9 %9 = load i32* %arrayidx16, align 4, !tbaa !1 %add17 = add nsw i32 %add15, %9 %arrayidx18 = getelementptr inbounds i32* %a, i32 10 %10 = load i32* %arrayidx18, align 4, !tbaa !1 %add19 = add nsw i32 %add17, %10 %arrayidx20 = getelementptr inbounds...
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...!1 %add11 = add nsw i32 %add9, %6 %arrayidx12 = getelementptr inbounds i32* %a, i32 7 %7 = load i32* %arrayidx12, align 4, !tbaa !1 %add13 = add nsw i32 %add11, %7 %arrayidx14 = getelementptr inbounds i32* %a, i32 8 %8 = load i32* %arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8 %arrayidx16 = getelementptr inbounds i32* %a, i32 9 %9 = load i32* %arrayidx16, align 4, !tbaa !1 %add17 = add nsw i32 %add15, %9 %arrayidx18 = getelementptr inbounds i32* %a, i32 10 %10 = load i32* %arrayidx18, align 4, !tbaa !1 %add19 = add nsw i32 %add17, %10 %arrayidx20 = getelementptr inbounds i32* %a...
2014 Nov 10
2
[LLVMdev] [Vectorization] Mis match in code generated
...gt; %7 = load i32* %arrayidx12, align 4, !tbaa !1 > > > %add13 = add nsw i32 %add11, %7 > > > %arrayidx14 = getelementptr inbounds i32* %a, i32 8 > > > %8 = load i32* %arrayidx14, align 4, !tbaa !1 > > > %add15 = add nsw i32 %add13, %8 > > > %arrayidx16 = getelementptr inbounds i32* %a, i32 9 > > > %9 = load i32* %arrayidx16, align 4, !tbaa !1 > > > %add17 = add nsw i32 %add15, %9 > > > %arrayidx18 = getelementptr inbounds i32* %a, i32 10 > > > %10 = load i32* %arrayidx18, align 4, !tbaa !1 > > &gt...
2016 Jul 11
2
extra loads in nested for-loop
...nly %a, [8 x double]* nocapture readonly %b) #0 { entry: %arrayidx8 = getelementptr inbounds [8 x double]* %c, i64 0, i64 0 %arrayidx12 = getelementptr inbounds [8 x double]* %a, i64 0, i64 0 %0 = load double* %arrayidx8, align 8, !tbaa !1 %1 = load double* %arrayidx12, align 8, !tbaa !1 %arrayidx16 = getelementptr inbounds [8 x double]* %b, i64 0, i64 0 %2 = load double* %arrayidx16, align 8, !tbaa !1 %mul = fmul double %1, %2 %add = fadd double %0, %mul store double %add, double* %arrayidx8, align 8, !tbaa !1 %arrayidx8.1 = getelementptr inbounds [8 x double]* %c, i64 0, i64 1 %3...
2017 May 21
4
Handling native i16 types in clang and opt
Hello. My target architecture supports natively 16 bit integers (i16). Whenever I write in C programs using only short types, clang compiles the program to LLVM and converts the i16 data to i32 to perform arithmetic operations and then truncates the results to i16. Then, the InstructionCombining (INSTCOMBINE or IC) pass removes these conversions back and forth from i16, except for
2016 Sep 26
2
Incompatible type assertion from llvm-tblgen
But don't the defs for ADDR_RR and ADDR_RI also contain dags? def ADDR_RR : Addr< 2, "SelectAddrRegReg", (ops GPRC:$base, GPRC:$offsetreg) >; def ADDR_RI : Addr< 2, "SelectAddrRegImm", (ops GPRC:$base, i64imm:$offsetimm) >; Do I need to create some other intermediate node type for a shifted address? Phil On
2012 Jan 17
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
Hi, On Fri, Dec 30, 2011 at 3:09 AM, Tobias Grosser <tobias at grosser.es> wrote: > As it seems my intuition is wrong, I am very eager to see and understand > an example where a search limit of 4000 is really needed. > To make the ball roll again, I attached a testcase that can be tuned to understand the impact on compile time for different sizes of a basic block. One can also
2011 Dec 30
3
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On 12/29/2011 06:32 PM, Hal Finkel wrote: > On Thu, 2011-12-29 at 15:00 +0100, Tobias Grosser wrote: >> On 12/14/2011 01:25 AM, Hal Finkel wrote: >> One thing that I would still like to have is a test case where >> bb-vectorize-search-limit is needed to avoid exponential compile time >> growth and another test case that is not optimized, if >>
2012 Jan 24
4
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
...%for.body ] %arrayidx11 = getelementptr inbounds [100 x i32]* %B, i64 0, i64 %indvars.iv %8 = load i32* %arrayidx11, align 4, !tbaa !0 %arrayidx13 = getelementptr inbounds [100 x i32]* %C, i64 0, i64 %indvars.iv %9 = load i32* %arrayidx13, align 4, !tbaa !0 %add14 = add nsw i32 %9, %8 %arrayidx16 = getelementptr inbounds [100 x i32]* %A, i64 0, i64 %indvars.iv %mul21 = mul nsw i32 %add14, %9 %sub = sub nsw i32 %add14, %mul21 %mul41 = mul nsw i32 %add14, %sub %sub48 = sub nsw i32 %add14, %mul41 %mul62 = mul nsw i32 %add14, %sub48 %sub69 = sub nsw i32 %add14, %mul62 %mul83 = mul...
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
...= bitcast [13 x i16]* %bi.i.i.i.i to i8* %arraydecay.i.i.i.i = getelementptr inbounds [13 x i16]* %ai.i.i.i.i, i32 0, i32 0 %arraydecay8.i.i.i.i = getelementptr inbounds [13 x i16]* %bi.i.i.i.i, i32 0, i32 0 %arrayidx14.i.i.i.i = getelementptr inbounds [13 x i16]* %ai.i.i.i.i, i32 0, i32 1 %arrayidx16.i.i.i.i = getelementptr inbounds [13 x i16]* %bi.i.i.i.i, i32 0, i32 1 %incdec.ptr.1.i151.i.i.i.i = getelementptr inbounds [13 x i16]* %bi.i.i.i.i, i32 0, i32 2 %incdec.ptr.2.i153.i.i.i.i = getelementptr inbounds [13 x i16]* %bi.i.i.i.i, i32 0, i32 3 %incdec.ptr.3.i155.i.i.i.i = getelementptr...