Displaying 20 results from an estimated 65 matches for "arrayidx1".
Did you mean:
arrayidx
2015 Apr 16
3
[LLVMdev] double* to <2 x double>*
Does anyone know how to instrument *double* to <2 x doulbe>**, e.g., 2.2
--> <2.2, 2.2>?
For example, I want to change the following IR code
%arrayidx1 = getelementptr inbounds [100 x double]* @main.B, i32 0, i32
%i.021
%1 = load double* %arrayidx1, align 4, !tbaa !0
to:
%arrayidx1 = getelementptr inbounds [100 x double]* @main.B, i32 0, i32
%i.021
%1 = bitcast double* %arrayidx1 to <2 x double>*
%2 = load <2 x double>* %1, align 4...
2014 Oct 17
2
[LLVMdev] opt -O2 leads to incorrect operation (possibly a bug in the DSE)
Hi all,
Consider the following example:
define void @fn(i8* %buf) #0 {
entry:
%arrayidx = getelementptr i8* %buf, i64 18
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %arrayidx, i8* %buf, i64
18, i32 1, i1 false)
%arrayidx1 = getelementptr i8* %buf, i64 18
store i8 1, i8* %arrayidx1, align 1
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %buf, i8* %arrayidx, i64
18, i32 1, i1 false)
ret void
}
I ran opt -O2 ex.ll -S, and got:
define void @fn(i8* nocapture %buf) #0 {
entry:
%arrayidx = getelementptr i8* %buf,...
2017 May 05
2
load instruction to gather intrinsics
Hi All,
Can I change a vector load to gather intrinsic? If so, how can I do it? For
example, I want to change the following IR code
%1 = load <2 x i64>* %arrayidx1, align 8
to
%1 = call <2 x i64> @llvm.masked.gather.v2i64(<2 x i64*> %arrayidx1,
i32 8, <2 x i1> <i1 true, i1 true>, <2 x i64> undef)
Basically, I am not sure how to get two consecutive addresses started from
arrayidx1. Thanks for your time and help in advance.
Be...
2016 Mar 16
3
RFC: A change in InstCombine canonical form
...--------
entry:
%max_value = alloca float, align 4
%1 = load float, float* %input, align 4, !tbaa !1
store float %1, float* %max_value, align 4, !tbaa !1
for.body:
%call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float*
dereferenceable(4) %max_value, float* dereferenceable(4) %arrayidx1)
%3 = load float, float* %call, align 4, !tbaa !1
store float %3, float* %max_value, align 4, !tbaa !1
-------------------- After Canonicalization (contains call to
std::max):--------------------
entry:
%max_value = alloca float, align 4
%1 = bitcast float* %input to i32*
%2 = load i32...
2019 Aug 08
2
Suboptimal code generated by clang+llc in quite a common scenario (?)
...is:
; Function Attrs: nofree norecurse nounwind optsize uwtable
define i32 @tst(i8 signext %i, i8 signext %j, i8 signext %k) local_unnamed_addr #1 {
entry:
%0 = load i8*, i8** @scscx, align 8, !tbaa !11
store i8 %i, i8* %0, align 1, !tbaa !13
%1 = load i8*, i8** @scscx, align 8, !tbaa !11
%arrayidx1 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %j, i8* %arrayidx1, align 1, !tbaa !13
%2 = load i8*, i8** @scscx, align 8, !tbaa !11
%arrayidx2 = getelementptr inbounds i8, i8* %2, i64 2
store i8 %k, i8* %arrayidx2, align 1, !tbaa !13
ret i32 0
}
According to that, the variable ‘scs...
2016 Mar 16
2
RFC: A change in InstCombine canonical form
...= alloca float, align 4
> %1 = load float, float* %input, align 4, !tbaa !1
> store float %1, float* %max_value, align 4, !tbaa !1
>
> for.body:
> %call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float*
> dereferenceable(4) %max_value, float* dereferenceable(4) %arrayidx1)
> %3 = load float, float* %call, align 4, !tbaa !1
> store float %3, float* %max_value, align 4, !tbaa !1
>
> -------------------- After Canonicalization (contains call to
> std::max):--------------------
>
> entry:
> %max_value = alloca float, align 4
> %1 = bi...
2013 Nov 11
2
[LLVMdev] What's the Alias Analysis does clang use ?
...print-alias-sets myalias.bc -o myalias.opt.bc
-stats -debug-only=licm
LICM hoisting to entry: %1 = load float** %v0.addr, align 8
LICM hoisting to entry: %arrayidx = getelementptr inbounds float* %0, i64
1
LICM hoisting to entry: %3 = load float** %v1.addr, align 8
LICM hoisting to entry: %arrayidx1 = getelementptr inbounds float* %1,
i64 1
LICM hoisting to entry: %5 = load float** %v2.addr, align 8
LICM hoisting to entry: %arrayidx2 = getelementptr inbounds float* %2,
i64 1
LICM hoisting to entry: %12 = load float** %t.addr, align 8
Alias Set Tracker: 10 alias sets for 13 pointer values...
2017 Sep 13
2
RFC phantom memory intrinsic
...fine <4 x double> @vsht_d4_fold(double* %ptr, i64 %i) local_unnamed_addr #0 {
entry:
%arrayidx = getelementptr inbounds double, double* %ptr, i64 %i
%0 = load double, double* %arrayidx, align 8
%vecinit = insertelement <4 x double> undef, double %0, i32 0
%add = add i64 %i, 1
%arrayidx1 = getelementptr inbounds double, double* %ptr, i64 %add
%1 = load double, double* %arrayidx1, align 8
%vecinit2 = insertelement <4 x double> %vecinit, double %1, i32 1
%add3 = add i64 %i, 2
%arrayidx4 = getelementptr inbounds double, double* %ptr, i64 %add3
%2 = load double, double*...
2017 Sep 12
3
RFC phantom memory intrinsic
...LP part.
Also, there might be different approaches in describing deleted memory
operations, for example, for my case: phantom_load(llvm_anyptr_ty,
llvm_i64_ty). First parameter describes pointer and second parameter
offset from pointer this loaded was deleted, for example. This two
operations:
%arrayidx1 = getelementptr inbounds double, double* %ptr, i64 1
%ld1 = load double, double* %arrayidx1
could be represented in the IR with this one: "void phantom_load(%ptr,
1)" after removal. But, the approach that is already implemented in
both reviews looks better to me since we don't need...
2016 Oct 31
1
[PATCH] D26127: [MemorySSA] Repair AccessList invariants after insertion of new MemoryUseOrDef.
...Memset will convert the
> sequences of stores to %P into a memset:
>
> define void @foo(i64* nocapture %P, i64* %Q) {
> entry:
> %0 = bitcast i64* %P to i16*
> %arrayidx = getelementptr inbounds i16, i16* %0, i64 1
> %1 = bitcast i16* %arrayidx to i32*
> %arrayidx1 = getelementptr inbounds i16, i16* %0, i64 3
> ; 1 = MemoryDef(liveOnEntry)
> store i16 0, i16* %0, align 2
> ; 2 = MemoryDef(1)
> store i32 0, i32* %1, align 4
> ; 3 = MemoryDef(2)
> store i16 0, i16* %arrayidx1, align 2
> ; 4 = MemoryDef(3)
> store...
2013 Nov 12
0
[LLVMdev] What's the Alias Analysis does clang use ?
...ias.bc -o myalias.opt.bc
> -stats -debug-only=licm
> LICM hoisting to entry: %1 = load float** %v0.addr, align 8
> LICM hoisting to entry: %arrayidx = getelementptr inbounds float* %0,
> i64 1
> LICM hoisting to entry: %3 = load float** %v1.addr, align 8
> LICM hoisting to entry: %arrayidx1 = getelementptr inbounds float*
> %1, i64 1
> LICM hoisting to entry: %5 = load float** %v2.addr, align 8
> LICM hoisting to entry: %arrayidx2 = getelementptr inbounds float*
> %2, i64 1
> LICM hoisting to entry: %12 = load float** %t.addr, align 8
> Alias Set Tracker: 10 alias se...
2017 Sep 13
2
RFC phantom memory intrinsic
...local_unnamed_addr #0 {
>> entry:
>> %arrayidx = getelementptr inbounds double, double* %ptr, i64 %i
>> %0 = load double, double* %arrayidx, align 8
>> %vecinit = insertelement <4 x double> undef, double %0, i32 0
>> %add = add i64 %i, 1
>> %arrayidx1 = getelementptr inbounds double, double* %ptr, i64 %add
>> %1 = load double, double* %arrayidx1, align 8
>> %vecinit2 = insertelement <4 x double> %vecinit, double %1, i32 1
>> %add3 = add i64 %i, 2
>> %arrayidx4 = getelementptr inbounds double, double* %pt...
2016 Mar 16
3
RFC: A change in InstCombine canonical form
...float, float* %input, align 4, !tbaa !1
>>> store float %1, float* %max_value, align 4, !tbaa !1
>>>
>>> for.body:
>>> %call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float*
>>> dereferenceable(4) %max_value, float* dereferenceable(4) %arrayidx1)
>>> %3 = load float, float* %call, align 4, !tbaa !1
>>> store float %3, float* %max_value, align 4, !tbaa !1
>>>
>>> -------------------- After Canonicalization (contains call to
>>> std::max):--------------------
>>>
>>> entry:...
2012 Mar 01
3
[LLVMdev] Aliasing bug or feature?
...ture or a bug :)
Here is somewhat more info:
Before lowering begins:
*** IR Dump After Remove sign extends ***
define void @test() nounwind {
entry:
store i8 0, i8* @s, align 1, !tbaa !0
%0 = load i8** @p, align 4, !tbaa !2
%1 = load i8* %0, align 1, !tbaa !0
%conv = zext i8 %1 to i32
%arrayidx1 = getelementptr inbounds i8* %0, i32 1
%2 = load i8* %arrayidx1, align 1, !tbaa !0
%conv2 = zext i8 %2 to i32
%3 = load i8** @q, align 4, !tbaa !2 <<< Can this load be bypassed by the
store below?
%4 = load i8* %3, align 1, !tbaa !0
%conv5 = zext i8 %4 to i32
%add = add i32 %co...
2016 Mar 22
0
RFC: A change in InstCombine canonical form
...t, align 4, !tbaa !1
>>>> store float %1, float* %max_value, align 4, !tbaa !1
>>>>
>>>> for.body:
>>>> %call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float*
>>>> dereferenceable(4) %max_value, float* dereferenceable(4) %arrayidx1)
>>>> %3 = load float, float* %call, align 4, !tbaa !1
>>>> store float %3, float* %max_value, align 4, !tbaa !1
>>>>
>>>> -------------------- After Canonicalization (contains call to
>>>> std::max):--------------------
>>>&...
2017 Sep 26
0
RFC phantom memory intrinsic
...>> entry:
>>> %arrayidx = getelementptr inbounds double, double* %ptr, i64 %i
>>> %0 = load double, double* %arrayidx, align 8
>>> %vecinit = insertelement <4 x double> undef, double %0, i32 0
>>> %add = add i64 %i, 1
>>> %arrayidx1 = getelementptr inbounds double, double* %ptr, i64 %add
>>> %1 = load double, double* %arrayidx1, align 8
>>> %vecinit2 = insertelement <4 x double> %vecinit, double %1, i32 1
>>> %add3 = add i64 %i, 2
>>> %arrayidx4 = getelementptr inbounds...
2012 Mar 01
0
[LLVMdev] Aliasing bug or feature?
...o:
>
> Before lowering begins:
> *** IR Dump After Remove sign extends ***
> define void @test() nounwind {
> entry:
> store i8 0, i8* @s, align 1, !tbaa !0
> %0 = load i8** @p, align 4, !tbaa !2
> %1 = load i8* %0, align 1, !tbaa !0
> %conv = zext i8 %1 to i32
> %arrayidx1 = getelementptr inbounds i8* %0, i32 1
> %2 = load i8* %arrayidx1, align 1, !tbaa !0
> %conv2 = zext i8 %2 to i32
> %3 = load i8** @q, align 4, !tbaa !2 <<< Can this load be bypassed by the
> store below?
> %4 = load i8* %3, align 1, !tbaa !0
> %conv5 = zext i8 %4 to...
2016 Jan 11
4
Some llvm questions (for tgsi backend)
...ocapture readonly %vals, i32 addrspace(1)* nocapture %buf) #0 {
entry:
%call = tail call i32 @_Z13get_global_idj(i32 0) #2
%arrayidx = getelementptr inbounds i32, i32 addrspace(1)* %vals, i32 %call
%0 = load i32, i32 addrspace(1)* %arrayidx, align 4, !tbaa !7
%mul = shl i32 %call, 5
%arrayidx1 = getelementptr inbounds i32, i32 addrspace(1)* %buf, i32 %mul
%1 = load i32, i32 addrspace(1)* %arrayidx1, align 4, !tbaa !7
%sub = sub i32 %1, %0
store i32 %sub, i32 addrspace(1)* %arrayidx1, align 4, !tbaa !7
ret void
}
declare i32 @_Z13get_global_idj(i32) #1
attributes #0 = { noun...
2016 Mar 22
2
RFC: A change in InstCombine canonical form
...align 4
>> %1 = load float, float* %input, align 4, !tbaa !1
>> store float %1, float* %max_value, align 4, !tbaa !1
>>
>> for.body:
>> %call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float* dereferenceable(4) %max_value, float* dereferenceable(4) %arrayidx1)
>> %3 = load float, float* %call, align 4, !tbaa !1
>> store float %3, float* %max_value, align 4, !tbaa !1
>>
>> -------------------- After Canonicalization (contains call to std::max):--------------------
>>
>> entry:
>> %max_value = alloca fl...
2017 Sep 26
2
RFC phantom memory intrinsic
...>>> %arrayidx = getelementptr inbounds double, double* %ptr, i64 %i
>>>> %0 = load double, double* %arrayidx, align 8
>>>> %vecinit = insertelement <4 x double> undef, double %0, i32 0
>>>> %add = add i64 %i, 1
>>>> %arrayidx1 = getelementptr inbounds double, double* %ptr, i64 %add
>>>> %1 = load double, double* %arrayidx1, align 8
>>>> %vecinit2 = insertelement <4 x double> %vecinit, double %1, i32 1
>>>> %add3 = add i64 %i, 2
>>>> %arrayidx4 = getele...