Displaying 12 results from an estimated 12 matches for "allones".
Did you mean:
allone
2006 Oct 20
1
CIDR prefix with a non-multiple of 8
...ctet of its netmask value, is either 0 or 255
decimal. On the other hand, the other prefixes yield netmask octet
values between 0 and 255. In this latter case, the bit ordering within
each octet is significant.
The method that is used to calculate the netmask is as follows:
mask = (uint32)((ALLONES << atoi(slash + 1)) ^ ALLONES);
On a little endian machine the bytes are stored in least significant
byte first, but the most significant bits are stored from the left. With
this in mind, the above bit shifting operation does not yield the
correct netmask value on Intel machines (for pref...
2017 Jan 17
2
GSOC project
Hi,
I think a nice project would be to write an application to figure out those latencies automatically maybe even based on envydis.
It could generate latency information based on thread count, register usage, instruction/instruction class, hw unit used. Or even tries to figure out what kind of units exist. Like instructions out of a group which are free to issue/execute after instructions out
2016 Feb 08
2
Vectorization with fast-math on irregular ISA sub-sets
...tter support later, when the infrastructure is in
place.
As far as I could see, ffast-math is included in the vectorizer, but
as an all-or-nothing, which is not what we want to do. So, I thought
about two ways we could go about doing this:
1. The pragmatic way
Add a cost "TCC_Impossible = AllOnes" to TCC and on ARM's cost model,
check if fast-math is checked on FP ALU operations and return that if
false. So, VFP costs would be less than NEON costs divided by their
widths.
This would make any vectorization beyond VFP instructions impossible
is fast-math is not chosen, while still u...
2017 Jan 19
0
GSOC project
Hello,
Even I think it would be a very big project for just 3 months, but it would
be fun learning and developing this. I feel I have the required skills and
would like to learn more for this. I have just one doubt regarding the GPU
required for the task. Will a normal NVIDIA GT 740m would be enough or we
need better GPUs like Tesla or Quadro? In the latter case how can one
proceed in case of its
2002 Mar 08
0
WINS + multiple subnets + multiple domains
...ed pretty
much everything and don't know what still to try.
Some of the networks are over a VPN but three of them are connected via a
router at one physical location and even that doesn't work. The router in
between doesn't do any kind of mangling of packets, but it doesn't forward
allones-broadcasts either (which it shouldn't).
I have 2.2.3a-1 for Debian (unstable/testing) if that helps.
"Desperately seeking windows domains"
Aleksandr Koltsoff
2017 Jan 17
2
GSOC project
Hello,
I am quite interested in the project "Instruction Scheduler" under X.org.
Please tell me where can I find a detailed idea of the project and how to
start it. I think I have the given prerequisites.
Regards
Shailesh Tripathi
Shailesh Tripathi
B.Tech. Part-IV
Electronics Engineering
IIT-BHU (Varanasi)
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
2018 Mar 28
1
Re: Change in ovirt-imageio[master]: Document the random I/O APIs
Hi Richard,
We've added zero and flush functionality to imageio-daemon.
You can download and test the latest build (for el7/fc) from:
-
http://jenkins.ovirt.org/job/ovirt-imageio_master_build-artifacts-el7-x86_64/200/artifact/exported-artifacts/
-
http://jenkins.ovirt.org/job/ovirt-imageio_master_build-artifacts-fc27-x86_64/53/artifact/exported-artifacts/
-
2016 Oct 26
2
RFC: a more detailed design for ThinLTO + vcall CFI
...hat type identifier. Here are
the resolutions that we would support:
Inline32, Inline64, SingleBit: these would cause us to generate code as
described in "Short Inline Bit Vectors" in the design document:
http://clang.llvm.org/docs/ControlFlowIntegrityDesign.html#short-inline-bit-vectors
AllOnes: this would cause us to generate code as described in "Eliminating
Bit Vector Checks for All-Ones Bit Vectors" in the design document:
http://clang.llvm.org/docs/ControlFlowIntegrityDesign.html#eliminating-bit-vector-checks-for-all-ones-bit-vectors
Unsat: no vtable is a member of that typ...
1999 Jun 15
7
quotas: documentation? Properties?
System: samba 2.0.4b on Solaris 2.x
Starting point: PC's "Properties" window on a share of home directories;
diskspace Used/Free "pie-chart" and figures.
A colleague asked me yesterday whether this properties window could
display the diskspace information, using the user's UNIX quota rather than
the physical space on the disk.
Our environment has potentially 14,000
2016 Oct 28
0
RFC: a more detailed design for ThinLTO + vcall CFI
...the resolutions that we would support:
>
> Inline32, Inline64, SingleBit: these would cause us to generate code as
> described in "Short Inline Bit Vectors" in the design document:
> http://clang.llvm.org/docs/ControlFlowIntegrityDesign.
> html#short-inline-bit-vectors
> AllOnes: this would cause us to generate code as described in "Eliminating
> Bit Vector Checks for All-Ones Bit Vectors" in the design document:
> http://clang.llvm.org/docs/ControlFlowIntegrityDesign.
> html#eliminating-bit-vector-checks-for-all-ones-bit-vectors
> Unsat: no vtable is...
2003 Nov 10
8
winbindd panic daemon dies
Hi All,
can anyone make any sense of the error below, please advise if I need to log this as a bug but I'm not sure how to further diagnose what is happening. This is from my winbindd log file,
thanks Andy.
[2003/11/07 17:47:59, 1] nsswitch/winbindd.c:main(832)
winbindd version 3.0.0 started.
Copyright The Samba Team 2000-2003
[2003/11/07 17:48:00, 1]
2013 Oct 10
97
[Bug 70354] New: Failed to initialise context object: 2D_NVC0 (0) (for my GeForce GT 750M)
https://bugs.freedesktop.org/show_bug.cgi?id=70354
Priority: medium
Bug ID: 70354
Assignee: nouveau at lists.freedesktop.org
Summary: Failed to initialise context object: 2D_NVC0 (0) (for
my GeForce GT 750M)
QA Contact: xorg-team at lists.x.org
Severity: normal
Classification: Unclassified
OS: