Displaying 20 results from an estimated 50 matches for "2048k".
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2009 Sep 06
1
Is there something like qt-faststart for theora?
...irst make the theora
[ -f ${base}.ogv ] && rm -f ${base}.ogv
ffmpeg2theora -v 4 -x ${width} -y ${height} ${base}.dv -o ${base}.ogv
# now make h.264
[ -f ${base}.mp4 ] && rm -f ${base}.mp4
ffmpeg -i ${base}.dv -an -pass 1 -vcodec libx264 -s ${width}x${height}
-vpre fastfirstpass -b 2048k -bt 2048k -threads 0 -y -f mp4 /dev/null
TMP=`mktemp ${base}XXXXXXXX.mp4`
ffmpeg -i ${base}.dv -acodec libfaac -ab 128k -pass 2 -vcodec libx264 -s
${width}x${height} -vpre hq -b 2048k -bt 2048k -threads 0 -y ${TMP}
qt-faststart ${TMP} ${base}.mp4
rm -f ${TMP} x264_2pass.log ffmpeg2pass-0.log
2012 Mar 09
3
[LLVMdev] Stack protector performance
...callgrind) but
the results show absolutely no reason at all for these measurements.
I have attached an archive with the source code and compiled binaries.
Here are the specs of the two systems:
* Desktop
- Ubuntu 11.10
- Linux 3.0.0-16-generic-pae
- Intel(R) Core(TM)2 Duo CPU E4500 @ 2.20GHz (2048K cache)
* Laptop
- Ubuntu 11.10
- Linux 3.0.0-16-generic
- Intel(R) Atom(TM) CPU N450 @ 1.66GHz (512K cache)
Kind regards,
Job
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2006 May 31
1
How to enable VMX?
...(guill@frec.bull.fr) (gcc version 3.3.5 (Debian 1:3.3.5-13)) Wed May 31 16:07:00 CEST 2006
Latest ChangeSet: Tue May 30 18:14:05 2006 +0100 9697:18e8e613deb9
...
(XEN) Initializing CPU#0
(XEN) Detected 3391.682 MHz processor.
(XEN) CPU: Trace cache: 12K uops, L1 D cache: 16K
(XEN) CPU: L2 cache: 2048K
(XEN) CPU: Physical Processor ID: 0
(XEN) CPU: Processor Core ID: 0
(XEN) VMX disabled by Feature Control MSR.
(XEN) Intel machine check architecture supported.
(XEN) Intel machine check reporting enabled on CPU#0.
(XEN) CPU0: Intel P4/Xeon Extended MCE MSRs (24) available
(XEN) CPU0: Thermal monit...
2005 May 28
4
bitopts functions overflowing page boundarys
u.inuse.type_info is at the end of the pfn_info structure, and is
u32 for both x86_32 and x86_64--in this location it can also be the
last 32 bits of a page.
several functions use bitopts.h functions to manipulate this member, and
on x86_64 these functions use u64 instructions, which will overflow the
page boundary, and possibly the end of memory as we see here:
(XEN)
2006 Jul 26
2
exec of init (/sbin/init) failed!!!
...and I have also tried to boot
with and without initrd.
I followed the instructions form the Xen user manual to create the root
file-system (first copy the dirs that root, dev, var, etc, usr, bin,
sbin, lib and then create the proc, sys, home, tmp dirs).
dd if=/dev/zero of=vm1disk bs=1k seek=2048k count=1
mkfs -t ext3 vm1disk
mount -o loop vm1disk /mnt
cp -ax /{root,dev,var,etc,usr,bin,sbin,lib} /mnt
mkdir /mnt/{proc,sys,home,tmp}
umount /mnt
I used the following config file for the domU:
kernel = "/boot/vmlinuz-2.6.17-1.2157_FC5xenU"
ramdisk = "/boot/initrd-2.6.17-1.215...
2012 Feb 21
3
How many virtual guest 'cpus' can a core duo 'quad' core support
...ode(s): 1
Vendor ID: GenuineIntel
CPU family: 6
Model: 23
Stepping: 10
CPU MHz: 1998.000
BogoMIPS: 5331.76
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 2048K
NUMA node0 CPU(s): 0-3
I ask this because it occurs to me that I may have missed
something fundamental respecting the use of the initialism
CPU vice the term Cores.
--
*** E-Mail is NOT a SECURE channel ***
James B. Byrne mailto:ByrneJB at Harte-Lyne.ca
Hart...
2009 May 01
2
current zfs tuning in RELENG_7 (AMD64) suggestions ?
...657 63.4 305126
20.0 167.6 0.6
a) defaults
b) vm.kmem_size_max="1073741824" vm.kmem_size="1073741824"
c) vfs.zfs.prefetch_disable=1 plus b)
d) vfs.zfs.zil_disable="1" plus c) plus b)
Results tend to fluctuate a bit.
offsitetmp# dd if=/dev/zero of=/tank1/test bs=2048k count=1000
1000+0 records in
1000+0 records out
2097152000 bytes transferred in 10.016818 secs (209363092 bytes/sec)
offsitetmp#
offsitetmp# dd if=/dev/zero of=/tank1/test bs=2048k count=1000
1000+0 records in
1000+0 records out
2097152000 bytes transferred in 10.733547 secs (195382943 bytes/sec)
o...
2012 Mar 10
0
[LLVMdev] Stack protector performance
...lutely no reason at all for these measurements.
>
> I have attached an archive with the source code and compiled binaries.
>
> Here are the specs of the two systems:
> * Desktop
> - Ubuntu 11.10
> - Linux 3.0.0-16-generic-pae
> - Intel(R) Core(TM)2 Duo CPU E4500 @ 2.20GHz (2048K cache)
> * Laptop
> - Ubuntu 11.10
> - Linux 3.0.0-16-generic
> - Intel(R) Atom(TM) CPU N450 @ 1.66GHz (512K cache)
>
> Kind regards,
> Job
> <canary.tgz>_______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu...
2012 Sep 28
1
High memory needs [SOLVED]
...virtual memory
overestimates the real memory of the process by, at least, the part of
the locale-archive file which is memory-mapped.
Apparently, on 32bits distros, and on most 64bits distros, only a part
of the locale-archive file is mmapped: for instance on CentOS 32 bits:
$ pmap $$
b7689000 2048K r---- /usr/lib/locale/locale-archive
Only 2MB of the file are mmapped, while the file is actually ~54MB.
Some distros only install a small subsets of languages, for instance
on my Ubuntu 12.04, this file is only ~3MB.
I still don't get the reason, but CentOS x86_64 6.2 (and 6.3) mmappes
the *...
2019 May 08
2
failed to build llvm since 25de7691a0e27c29c8d783a22373cc265571f5e9 on AMD platform
...AMD Opteron(TM) Processor 6276
Stepping: 2
CPU MHz: 1487.966
CPU max MHz: 2300.0000
CPU min MHz: 1400.0000
BogoMIPS: 4599.97
Virtualization: AMD-V
L1d cache: 16K
L1i cache: 64K
L2 cache: 2048K
L3 cache: 6144K
NUMA node0 CPU(s): 0-7
NUMA node1 CPU(s): 8-15
NUMA node2 CPU(s): 16-23
NUMA node3 CPU(s): 24-31
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1g...
2007 Jul 27
0
failed to start domainU, Kernel panic - not syncing: No init found. Try passing init= option to kernel.
...6k reserved, 532k
data, 140k init, 0k highmem)
Checking if this processor honours the WP bit even in supervisor mode... Ok.
Calibrating delay using timer specific routine.. 5988.98 BogoMIPS
(lpj=29944938)
Mount-cache hash table entries: 512
CPU: Trace cache: 12K uops, L1 D cache: 16K
CPU: L2 cache: 2048K
Checking 'hlt' instruction... OK.
Brought up 1 CPUs
migration_cost=0
Grant table initialized
NET: Registered protocol family 16
Brought up 1 CPUs
xen_mem: Initialising balloon driver.
Initializing Cryptographic API
io scheduler noop registered
io scheduler anticipatory registered (default)...
2019 May 09
3
failed to build llvm since 25de7691a0e27c29c8d783a22373cc265571f5e9 on AMD platform
...CPU MHz: 1487.966
> CPU max MHz: 2300.0000
> CPU min MHz: 1400.0000
> BogoMIPS: 4599.97
> Virtualization: AMD-V
> L1d cache: 16K
> L1i cache: 64K
> L2 cache: 2048K
> L3 cache: 6144K
> NUMA node0 CPU(s): 0-7
> NUMA node1 CPU(s): 8-15
> NUMA node2 CPU(s): 16-23
> NUMA node3 CPU(s): 24-31
> Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush...
2006 Aug 31
7
Core 2 Duo
Am considering a new laptop, and I wonder if anyone here can share their
Xen experiences with the newest Core 2 Duo CPUs, ref
http://www.intel.com/products/processor/core2duo/specifications.htm
The list at http://wiki.xensource.com/xenwiki/HVM_Compatible_Processors
doesn''t include any Core 2 Duos. Does that mean that people have had
problems, or is the wiki just not up to date?
I gather
2008 Mar 21
5
Xen 3.2 FC6 DomU Kernel Panic
...) failed to get a good estimate for loops_per_jiffy.
Probably due to long platform interrupts. Consider using "lpj=" boot option.
Security Framework v1.0.0 initialized
Capability LSM initialized
Mount-cache hash table entries: 512
CPU: Trace cache: 12K uops, L1 D cache: 16K
CPU: L2 cache: 2048K
Checking ''hlt'' instruction... OK.
SMP alternatives: switching to UP code
Freeing SMP alternatives: 16k freed
Brought up 1 CPUs
migration_cost=0
NET: Registered protocol family 16
Brought up 1 CPUs
PCI: setting up Xen PCI frontend stub
ACPI: Interpreter disabled.
Linux Plug and Pla...
2009 Jan 28
3
vm ignores kickstart
...g.
There is already a security framework initialized, register_security
failed.
selinux_register_security: Registering secondary module capability
Capability LSM initialized as secondary
Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
CPU: L1 I cache: 32K, L1 D cache: 32K
CPU: L2 cache: 2048K
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Checking ''hlt'' instruction... OK.
Brought up 1 CPUs
checking if image is initramfs...it isn''t (ungzip failed); looks like an
initrd
Freeing initrd memory: 8196k freed
Grant t...
2007 Sep 28
0
Unable to boot xen dom0 on IBM System x3250
....
(XEN) Enabling APIC mode: Flat. Using 1 I/O APICs
(XEN) Using ACPI (MADT) for SMP configuration information
(XEN) Using scheduler: SMP Credit Scheduler (credit)
(XEN) Initializing CPU#0
(XEN) Detected 3000.299 MHz processor.
(XEN) CPU: Trace cache: 12K uops, L1 D cache: 16K
(XEN) CPU: L2 cache: 2048K
(XEN) CPU: Physical Processor ID: 0
(XEN) CPU: Processor Core ID: 0
(XEN) Intel machine check architecture supported.
(XEN) Intel machine check reporting enabled on CPU#0.
(XEN) CPU0: Intel P4/Xeon Extended MCE MSRs (24) available
(XEN) CPU0: Thermal monitoring handled by SMI
(XEN) CPU0: Intel(R) P...
2009 Dec 09
2
PCI: Not using MMCONFIG, leave system completely hung while booting Xen 3.4.1
...2
Thread(s) per core: 1
Core(s) per socket: 2
CPU socket(s): 1
Vendor ID: GenuineIntel
CPU family: 15
Model: 6
Stepping: 4
CPU MHz: 1200.000
Virtualization: VT-x
L1d cache: 16K
L2 cache: 2048K
--
Avinash Singh
_______________________________________________
Xen-users mailing list
Xen-users@lists.xensource.com
http://lists.xensource.com/xen-users
2009 Dec 09
2
PCI: Not using MMCONFIG, leave system completely hung while booting Xen 3.4.1
...2
Thread(s) per core: 1
Core(s) per socket: 2
CPU socket(s): 1
Vendor ID: GenuineIntel
CPU family: 15
Model: 6
Stepping: 4
CPU MHz: 1200.000
Virtualization: VT-x
L1d cache: 16K
L2 cache: 2048K
--
Avinash Singh
_______________________________________________
Xen-users mailing list
Xen-users@lists.xensource.com
http://lists.xensource.com/xen-users
2004 Oct 06
4
* to Cisco router with FXO's via SIP
Ok, very frustrated after spending most of the day onthe * irc channel
with little to no help. Mostly just a bunch of crap about being a
newbie, going and reading voip-info.org. etc.
Despite me doing all that already.
My situation is not good but here it is. Hurricane came through, power
spikes killed PBX. Just trying to replace it affordable and possibly
with a few more features.
I am using *
2020 Apr 04
3
how to pick cipher for AES-NI enabled AMD GX-412TC SOC tincd at 100% CPU
...del: 48
Model name: AMD GX-412TC SOC
Stepping: 1
CPU MHz: 775.729
CPU max MHz: 1000.0000
CPU min MHz: 600.0000
BogoMIPS: 1996.08
Virtualization: AMD-V
L1d cache: 32K
L1i cache: 32K
L2 cache: 2048K
NUMA node0 CPU(s): 0-3
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext
fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good acc_power nopl
nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse...