search for: 0x000000ff

Displaying 20 results from an estimated 133 matches for "0x000000ff".

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2005 Jan 12
4
hashing filters
...sc del dev eth0 root tc qdisc add dev eth0 root handle 1: htb tc class add dev eth0 parent 1: classid 1:2 htb rate 100Mbit ceil 100MBit tc filter add dev eth0 parent 1:2 handle 2: protocol ip u32 divisor 256 tc filter add dev eth0 protocol ip parent 1: u32 match ip dst 192.168.0.0/16 hashkey mask 0x000000ff at 12 link 2: tc class add dev eth0 parent 1:2 classid 1:3 htb rate 128Kbit ceil 128Kbit j=0; while [ $j -le 254 ] do i=0; while [ $i -le 254 ] do hexi=`echo "obase=16; $i" | bc` tc filter add dev eth0 protocol ip parent 1:2 u32...
2004 Apr 06
1
hashing
Hi i have 2 class C 80.97.103.0/24 and 81.180.12.0/24 but i dont konw how to set hashing tables for HTB tc add dev eth0 parent 1: prio 0 handle 1: protocol ip u32 divisor 256 tc add dev eth0 parent 1: prio 0 protocol ip u32 match src 80.97.103.0/24 hashkey mask 0x000000FF at 12 link 1: but i want 2 hashkey for 80.97.103.0/24 and for 81.180.12.0/24 can somebody help me ? _______________________________________________ LARTC mailing list / LARTC@mailman.ds9a.nl http://mailman.ds9a.nl/mailman/listinfo/lartc HOWTO: http://lartc.org/
2009 Dec 26
3
[PATCH 1/3] nouveau: Drop some annoying _DX_ (direct x?) object name prefixes.
...TRIANGLE_FILTER_SIZE_ADJUST_SHIFT 16 -#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SIZE_ADJUST_MASK 0x00ff0000 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR 0x00000310 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_B_SHIFT 0 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_B_MASK 0x000000ff -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_G_SHIFT 8 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_G_MASK 0x0000ff00 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_R_SHIFT 16 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_R_MASK 0x00ff0000 -#define NV03_DX3_TEXTURED_TRIANG...
2008 Dec 05
5
To owners of xbox360 joysticks..
I'm looking for people who have an xbox360 joystick to help run some tests so I can get information on implementing xinput for wine. The more 360 joysticks plugged in the better. Can you please go to the forum post I made and test: http://forum.freegamedev.net/index.php?t=msg&th=1980&start=0 Thanks, Andrew
2005 Apr 20
1
deleting tc rules
...assid 2:1012 htb rate 128kbit ceil 128kbit burst 0 cburst 0 RTNETLINK answers: Device or resource busy If I try to delete the whole part of ''handle 104'': [root@malinko shape_www-0.20]# tc filter del dev eth0 protocol ip prio 5 parent 2: u32 match ip dst 10.0.0.0/30 hashkey mask 0x000000ff at 16 link 104: [root@malinko shape_www-0.20]# tc filter del dev eth0 parent 2:22 handle 104: protocol ip prio 5 u32 divisor 256 Here there is no error but all filter rules is deleted also filter rules for ''10.0.0.0/30'' and a have no shaping at all. Are there known bugs when del...
2006 Sep 19
5
how to setup massive traffic shaping? (2 class B nets)
Hello I have 2 class-B networks (172.22.0.0/16 and 172.23.0.0/16, over 130k of ip''s) and need to setup traffic tbf shapers with 64kb/s for each ip from 172.22.0.0/16 and 128kb/s for each ip from 172.23.0.0/16 just read lartc and don''t understand how to use u32 for decreasing number of rules and hashing
2010 Jun 14
0
[LLVMdev] Win32 COFF Support
...style includes for llvm headers. +namespace coff { + + using llvm::raw_ostream; + using llvm::MCSymbolData; + using llvm::MCSectionData; Please don't use 'using' directives in headers. + uint8_t * Ptr = reinterpret_cast <uint8_t *> (Data); + Ptr [0] = (Value & 0x000000FF) >> 0; It would be more consistent to space this sort of thing as: + uint8_t *Ptr = reinterpret_cast<uint8_t *>(Data); + Ptr[0] = (Value & 0x000000FF) >> 0; Notably, we don't put spaces before parens in function calls or before template arguments: + symbol...
2010 Jun 12
3
[LLVMdev] Win32 COFF Support
Here is a full patch including Nathan's COFF support, tests that pass on Windows, and some changes to lit. Obviously the COFF support and changes to lit should be separate patches in the end. http://codereview.appspot.com/1624043/show - Michael Spencer -------------- next part -------------- A non-text attachment was scrubbed... Name: COFF-support.patch Type: application/octet-stream Size:
2003 Dec 07
1
u32 hash-es ?
...ocol ip u32 #what is the divisor meaning !? handle 5: protocol ip u32 divisor 256 u32 ht 800:: match ip src 192.168.12.0/24 match ip src 192.168.48.0/24 match ip src 192.168.56.0/24 #13 is the third octet in the IP address isnt ''it hashkey mask 0x000000ff at 13 link 5: # c => 12 , u32 ht 5:c: match ip src 192.168.12.1 flowid 1:1 u32 ht 5:c: match ip src 192.168.12.2 flowid 1:2 ..... # 30 => 48 u32 ht 5:30: match ip src 192.168.48.1 flowid 1:257 u32 ht 5:30: match ip src 192.168.48.2 flowid 1:258 ...... #38 => 56 u3...
2004 Jul 02
24
TC Hashing Filters
...000 # Create hash table attached to transit class tc filter add dev eth1 parent 1:0 handle 2: protocol ip u32 divisor 256 # Create filter to hash out last octet and link to hash table 2: tc filter add dev eth1 protocol ip parent 1:1 prio 5 u32 ht 800:: match ip src 216.19.49.0/24 hashkey mask 0x000000ff at 12 link 2: # Create class for 128Kbit limit tc class add dev eth1 parent 1:0 classid 1:2 cbq bandwidth 200Mbit rate 128kbit allot 1514 prio 5 maxburst 20 avpkt 1000 bounded # Create filter for IP I''m limiting tc filter add dev eth1 protocol ip parent 1:0 prio 5 u32 ht 2:8c match i...
2010 Jun 14
2
[LLVMdev] Win32 COFF Support
...f { > + > + using llvm::raw_ostream; > + using llvm::MCSymbolData; > + using llvm::MCSectionData; > > Please don't use 'using' directives in headers. > > > > + uint8_t * Ptr = reinterpret_cast <uint8_t *> (Data); > + Ptr [0] = (Value & 0x000000FF) >> 0; > > It would be more consistent to space this sort of thing as: > > + uint8_t *Ptr = reinterpret_cast<uint8_t *>(Data); > + Ptr[0] = (Value & 0x000000FF) >> 0; > > > > Notably, we don't put spaces before parens in function calls or...
2002 Aug 12
3
Question on hashkey
...39;ve been working on hashing in tc for a month. Since there are only a limited number of avaialbe example on hashing, I''ll be appreciate if someone can my questions as follows: 1. tc filter add dev eth1 protocol ip perent 1:0 \ prio 5 u32 ht 800:: \ match ip src 1.2.0.0/16 \ hashkey mask 0x000000ff at 12 \ link 2: It seems that the hashkey make can only applied to ip header. How can I use the marked number in a packet (using iptables) as the hashkey??? 2.By looking ad "tc filter add fw help", it seems that hashing is not supported in "fw", is it? so how can I speed up th...
2005 Jan 19
3
tc limit
...rent 1: classid 1:3 htb rate 34mbit ceil 34mbit burst 0kbit cburst 0kbit /sbin/tc filter add dev eth1 parent 1:3 protocol ip u32 /sbin/tc filter add dev eth1 parent 1:3 handle 3: protocol ip u32 divisor 256 /sbin/tc filter add dev eth1 protocol ip parent 1: u32 match ip dst 10.0.0.0/20 hashkey mask 0x000000ff at 16 link 3: echo handle 1:13 /sbin/tc class add dev eth1 parent 1:3 classid 1:13 htb rate 512kbit ceil 512kbit burst 0k cburst 0k /sbin/tc qdisc add dev eth1 parent 1:13 handle 13: sfq perturb 4 /sbin/tc filter add dev eth1 protocol ip parent 1:3 u32 ht 3:1: match ip dst 10.0.0.1 flowid 1:13 ec...
2016 Oct 03
5
Is this undefined behavior optimization legal?
...a target with 32-bit registers would be to zero initialize a 32-bit register to hold the initial vector and then 'mask' and 'or' the inserted value with the initial vector. In AMDGPU assembly it would look something like: v_mov_b32 v0, 0 v_cvt_u32_f32_e32 v1, s0 v_and_b32 v1, v1, 0x000000ff v_or_b32 v0, v0, v1 The optimization the SelectionDAG does for us in this function, though, ends up removing the mask operation. Which gives us: v_mov_b32 v0, 0 v_cvt_u32_f32_e32 v1, s0 v_or_b32 v0, v0, v1 The reason the SelectionDAG is doing this is because it knows that the result of %uint8 =...
2024 Sep 13
1
[PATCH v3 1/2] drm/panic: Add ABGR2101010 support
...t_xrgb8888_to_argb2101010(u32 pix) return GENMASK(31, 30) /* set alpha bits */ | pix | ((pix >> 8) & 0x00300C03); } +static u32 convert_xrgb8888_to_abgr2101010(u32 pix) +{ + pix = ((pix & 0x00FF0000) >> 14) | + ((pix & 0x0000FF00) << 4) | + ((pix & 0x000000FF) << 22); + return GENMASK(31, 30) /* set alpha bits */ | pix | ((pix >> 8) & 0x00300C03); +} + /* * convert_from_xrgb8888 - convert one pixel from xrgb8888 to the desired format * @color: input color, in xrgb8888 format @@ -242,6 +250,8 @@ static u32 convert_from_xrgb8888(u32 c...
2006 Feb 08
1
Divisor
...ev imq0 parent 1:0 prio 5 handle 1: protocol ip u32 divisor 1 $TC filter add dev imq0 parent 1:0 prio 5 handle 2: protocol ip u32 divisor 256 What divisor is doing? And the last problem... $TC filter add dev imq0 protocol ip parent 1:0 prio 5 u32 ht 800:: match ip src 10.0.0.0/16 hashkey mask 0x000000ff at 12 link 2: Why after ht should be 800? When 801:: is correct value? When this value should be different. Please help me understand this. -- Konrad aka Lenthir
2009 Nov 12
3
strange ethtool output in xen environment
...100baseT/Full                             1000baseT/Half 1000baseT/Full     Advertised auto-negotiation: Yes     Speed: 100Mb/s     Duplex: Full     Port: Twisted Pair     PHYAD: 1     Transceiver: internal     Auto-negotiation: on     Supports Wake-on: g     Wake-on: g     Current message level: 0x000000ff (255)     Link detected: yes Xen Dom0 [root@Server1-FC11 ~]# ethtool eth0 Settings for eth0:     Link detected: yes [root@Server1-FC11 ~]# mii-tool eth0 SIOCGMIIPHY on ''eth0'' failed: Operation not supported Xen DomU [root@F11-G1S1 /]# ethtool eth0 Settings for eth0:     Link det...
2009 Nov 12
3
strange ethtool output in xen environment
...100baseT/Full                             1000baseT/Half 1000baseT/Full     Advertised auto-negotiation: Yes     Speed: 100Mb/s     Duplex: Full     Port: Twisted Pair     PHYAD: 1     Transceiver: internal     Auto-negotiation: on     Supports Wake-on: g     Wake-on: g     Current message level: 0x000000ff (255)     Link detected: yes Xen Dom0 [root@Server1-FC11 ~]# ethtool eth0 Settings for eth0:     Link detected: yes [root@Server1-FC11 ~]# mii-tool eth0 SIOCGMIIPHY on ''eth0'' failed: Operation not supported Xen DomU [root@F11-G1S1 /]# ethtool eth0 Settings for eth0:     Link det...
2019 Sep 17
1
[PATCH 2/6] drm/nouveau: fault: Widen engine field
...dev/fault/gv100.c > @@ -137,8 +137,8 @@ gv100_fault_intr_fault(struct nvkm_fault *fault) > info.addr = ((u64)addrhi << 32) | addrlo; > info.inst = ((u64)insthi << 32) | (info0 & 0xfffff000); > info.time = 0; > - info.engine = (info0 & 0x000000ff); > info.aperture = (info0 & 0x00000c00) >> 10; > + info.engine = (info0 & 0x000001ff); > info.valid = (info1 & 0x80000000) >> 31; > info.gpc = (info1 & 0x1f000000) >> 24; > info.hub = (info1 & 0x00100...
2024 Sep 13
1
[PATCH v3 1/2] drm/panic: Add ABGR2101010 support
...return GENMASK(31, 30) /* set alpha bits */ | pix | ((pix >> 8) & 0x00300C03); > } > > +static u32 convert_xrgb8888_to_abgr2101010(u32 pix) > +{ > + pix = ((pix & 0x00FF0000) >> 14) | > + ((pix & 0x0000FF00) << 4) | > + ((pix & 0x000000FF) << 22); > + return GENMASK(31, 30) /* set alpha bits */ | pix | ((pix >> 8) & 0x00300C03); > +} Maybe we can move this format conversion helper and the others in the driver to drivers/gpu/drm/drm_format_helper.c ? > + > /* > * convert_from_xrgb8888 - convert one...