llvm dev - May 2017 - Bitcast between 2 different SDNode vector types

Hello.
     I am trying to emulate in software in my SIMD processor back end vector
types with
elements i32 using the native vector types with i16 (for example: v64i32 with
v128i16).
     For example, when I want to add 2 v64i32 I use first a
getNode(ISD::BITCAST, ...) to
typecast the operands of add. But this does not seem to work - I tried to get
inspired
from http://llvm.org/docs/doxygen/html/X86ISelLowering_8cpp_source.html. When I
use that
instruction I get an error saying "Cannot select [...] v128i16 = bitcast
txy", where txy
is of type t64i32.
   So I tried to declare at the beginning of the ISelLowering class:
     setOperationAction(ISD::BITCAST, MVT::v64i32, Expand /* or Promote */);
     AddPromotedToType (ISD::BITCAST, MVT::v64i32, MVT::v128i16); // and also 
MVT::v128i16, MVT::v64i32
   This eventually led to replacing during Instruction selection the
        v128i16 = bitcast t52
      with
        v128i16,ch = load<LD256[FixedStack3]> t110,
FrameIndex:i64<3>, undef:i64
      but the load<LD256[FixedStack3]> operation is not really good for
me.

     Can somebody help me? I need a simple bitcast operation that just changes
the type of
the vector SDNode without any further complication, if possible.

   Thank you,
     Alex

It seems to me that you'd actually want to keep the BITCAST's legal and
implement a pattern in the .td files for doing them.
For example, on PPC our vector bitcasts are no-ops (except that we prefer
to keep some types of vectors in some of the register classes). You can see
all the bitconvert patterns in lib/Target/PowerPC/PPCInstrVSX.td.

That will allow the instruction selector to select the bitcasts and won't
change things like the load you included in your message.

On Thu, May 25, 2017 at 10:26 PM, Alex Susu via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
>   Hello.
>     I am trying to emulate in software in my SIMD processor back end
> vector types with elements i32 using the native vector types with i16 (for
> example: v64i32 with v128i16).
>     For example, when I want to add 2 v64i32 I use first a
> getNode(ISD::BITCAST, ...) to typecast the operands of add. But this does
> not seem to work - I tried to get inspired from
> http://llvm.org/docs/doxygen/html/X86ISelLowering_8cpp_source.html. When
> I use that instruction I get an error saying "Cannot select [...]
v128i16 > bitcast txy", where txy is of type t64i32.
>   So I tried to declare at the beginning of the ISelLowering class:
>     setOperationAction(ISD::BITCAST, MVT::v64i32, Expand /* or Promote
> */);
>     AddPromotedToType (ISD::BITCAST, MVT::v64i32, MVT::v128i16); // and
> also MVT::v128i16, MVT::v64i32
>   This eventually led to replacing during Instruction selection the
>        v128i16 = bitcast t52
>      with
>        v128i16,ch = load<LD256[FixedStack3]> t110,
FrameIndex:i64<3>,
> undef:i64
>      but the load<LD256[FixedStack3]> operation is not really good
for me.
>
>     Can somebody help me? I need a simple bitcast operation that just
> changes the type of the vector SDNode without any further complication, if
> possible.
>
>   Thank you,
>     Alex
>
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>
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