Hi, I have a JIT compiler using the legacy JIT on LLVM 3.5 that, when run on the Xeon v5 Skylakes produces "Cannot select: intrinsic %llvm.x86.sse41.round.sd". Note, this does not occur on i7 Kabylakes. To get this far I had to disable AVX512 code gen. Upgrading the system I am looking at from 3.5 to a later version is a big job that I'd prefer not to have on my critical path. Does anyone have any tips on where I would look to debug this sort of issue? I'm new to LLVM. Thanks Andy
I can try to help. Are you passing a CPU string or are you letting it autodetect the CPU using getHostCPUName? I don't see support detecting skylake or even avx-512 support in the autodetection code that far back. Are you doing the same thing for the i7 kabylake? How did you disable AVX-512 code gen? ~Craig On Mon, May 8, 2017 at 9:21 AM, Andy Schneider via llvm-dev < llvm-dev at lists.llvm.org> wrote:> Hi, > > I have a JIT compiler using the legacy JIT on LLVM 3.5 that, when run on > the Xeon v5 Skylakes produces "Cannot select: intrinsic % > llvm.x86.sse41.round.sd". Note, this does not occur on i7 Kabylakes. To > get this far I had to disable AVX512 code gen. > > Upgrading the system I am looking at from 3.5 to a later version is a big > job that I'd prefer not to have on my critical path. > > Does anyone have any tips on where I would look to debug this sort of > issue? I'm new to LLVM. > > Thanks > > Andy > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170508/dc091a00/attachment.html>
Thank you. I'm letting it auto detect by setting the target using getProcessTarget. I disabled avx512 support by passing -avx512f (and the other variants) to setMAttrs on EngineBuilder. I can see refs to avx512 in X86.td. It's the exact same executable running on Kabylake. What does the Cannot select: specifically mean? Is there some table that doesn't have a definition for a key in it that I would need to patch up? Am I answering your questions?> On 8 May 2017, at 17:32, Craig Topper <craig.topper at gmail.com> wrote: > > I can try to help. > > Are you passing a CPU string or are you letting it autodetect the CPU using getHostCPUName? I don't see support detecting skylake or even avx-512 support in the autodetection code that far back. Are you doing the same thing for the i7 kabylake? How did you disable AVX-512 code gen? > > ~Craig > >> On Mon, May 8, 2017 at 9:21 AM, Andy Schneider via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> Hi, >> >> I have a JIT compiler using the legacy JIT on LLVM 3.5 that, when run on the Xeon v5 Skylakes produces "Cannot select: intrinsic %llvm.x86.sse41.round.sd". Note, this does not occur on i7 Kabylakes. To get this far I had to disable AVX512 code gen. >> >> Upgrading the system I am looking at from 3.5 to a later version is a big job that I'd prefer not to have on my critical path. >> >> Does anyone have any tips on where I would look to debug this sort of issue? I'm new to LLVM. >> >> Thanks >> >> Andy >> _______________________________________________ >> LLVM Developers mailing list >> llvm-dev at lists.llvm.org >> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170508/592609cf/attachment.html>
Possibly Parallel Threads
- LLVM and Xeon Skylake v5
- LLVM and Xeon Skylake v5
- llvm is illegally vectorizing with a recurrence on skylake
- RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available
- RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available