llvm dev - Dec 2016 - Lowering the metadata attached to an instruction down to Pattern Instruction Selection pass

Hello devlopers,

I request your guidance on how to lower the metadata attached with an 
instruction. Following is given the IR dump before Module verifier pass, 
and there is a string "Tile3" attached as metadata with instruction
"%x
= alloca i32, align 4, !Tile3 !1". My target is to transmit/propagate 
the string down to post RA-Scheduling pass. Is it possible? If yes, how 
I can do so. Can you please provide any hints or pointers to some 
documentation.

Please note that metadata disappears after "Pattern Instruction 
Selection Pass" as is shown in the IR dump before "Expand ISel 
Pseudo-instructions Pass", which, I guess, is the next pass after 
"Pattern Instruction Selection Pass".

*** IR Dump Before Module Verifier ***
; Function Attrs: nounwind
define i32 @main() #0 {
entry:
   %retval = alloca i32, align 4
   %x = alloca i32, align 4, !Tile3 !1
   store i32 0, i32* %retval, align 4
   store volatile i32 5, i32* %x, align 4
   %0 = load volatile i32, i32* %x, align 4
   %inc = add i32 %0, 1
   store volatile i32 %inc, i32* %x, align 4
   %1 = load volatile i32, i32* %x, align 4
   ret i32 %1
}


# *** IR Dump Before Expand ISel Pseudo-instructions ***:
# Machine code for function main: Properties: <SSA, tracking liveness, 
HasVRegs>
Frame Objects:
   fi#0: size=4, align=4, at location [SP]
   fi#1: size=4, align=4, at location [SP]

BB#0: derived from LLVM BB %entry
	%vreg0<def> = LDImm32 0; IRF32:%vreg0
	LSU_STO_i32_Myr2 %vreg0<kill>, <fi#0>, 0, pred:1, pred:%noreg, 7; 
mem:ST4[%retval] IRF32:%vreg0
	%vreg1<def> = LDImm32 5; IRF32:%vreg1
	LSU_STO_i32_Myr2 %vreg1<kill>, <fi#1>, 0, pred:1, pred:%noreg, 7; 
mem:Volatile ST4[%x] IRF32:%vreg1
	%vreg2<def> = LSU_LDO_i32_Myr2 <fi#1>, 0, pred:1, pred:%noreg, 7; 
mem:Volatile LD4[%x] IRF32:%vreg2
	%vreg3<def> = IAU_ADD_32_imm %vreg2<kill>, 1, pred:1, pred:%noreg, 
%CC_IAU0<imp-def,dead>, %I_STATE<imp-def,dead>; IRF32:%vreg3,%vreg2
	LSU_STO_i32_Myr2 %vreg3<kill>, <fi#1>, 0, pred:1, pred:%noreg, 7; 
mem:Volatile ST4[%x] IRF32:%vreg3
	%vreg4<def> = LSU_LDO_i32_Myr2 <fi#1>, 0, pred:1, pred:%noreg, 7; 
mem:Volatile LD4[%x] IRF32:%vreg4
	%I18<def> = COPY %vreg4; IRF32:%vreg4
	SHAVE_RETURN %I18

# End machine code for function main.

Thanks for any helpful response.

-- 
Naveed Ul Mustafa

On Tue, Dec 13, 2016 at 04:56:58PM +0000, Naveed Ul Mustafa via llvm-dev
wrote:
> Hello devlopers,
> 
> I request your guidance on how to lower the metadata attached with an 
> instruction. Following is given the IR dump before Module verifier pass, 
> and there is a string "Tile3" attached as metadata with
instruction "%x
> = alloca i32, align 4, !Tile3 !1". My target is to transmit/propagate 
> the string down to post RA-Scheduling pass. Is it possible? If yes, how 
> I can do so. Can you please provide any hints or pointers to some 
> documentation.
> 
If you only care about metadata on pointers used by load/store
instructions, then I think you can still access the metadata from
the MachineMemOperand at the MachineInstr level.

If you want access to metadata on arbitrary instructions, you will need
to modify SelectionDAGBuilder to add this metadata to the SDNodes.

-Tom
> Please note that metadata disappears after "Pattern Instruction 
> Selection Pass" as is shown in the IR dump before "Expand ISel 
> Pseudo-instructions Pass", which, I guess, is the next pass after 
> "Pattern Instruction Selection Pass".
> 
> *** IR Dump Before Module Verifier ***
> ; Function Attrs: nounwind
> define i32 @main() #0 {
> entry:
>    %retval = alloca i32, align 4
>    %x = alloca i32, align 4, !Tile3 !1
>    store i32 0, i32* %retval, align 4
>    store volatile i32 5, i32* %x, align 4
>    %0 = load volatile i32, i32* %x, align 4
>    %inc = add i32 %0, 1
>    store volatile i32 %inc, i32* %x, align 4
>    %1 = load volatile i32, i32* %x, align 4
>    ret i32 %1
> }
> 
> 
> # *** IR Dump Before Expand ISel Pseudo-instructions ***:
> # Machine code for function main: Properties: <SSA, tracking liveness, 
> HasVRegs>
> Frame Objects:
>    fi#0: size=4, align=4, at location [SP]
>    fi#1: size=4, align=4, at location [SP]
> 
> BB#0: derived from LLVM BB %entry
> 	%vreg0<def> = LDImm32 0; IRF32:%vreg0
> 	LSU_STO_i32_Myr2 %vreg0<kill>, <fi#0>, 0, pred:1, pred:%noreg,
7;
> mem:ST4[%retval] IRF32:%vreg0
> 	%vreg1<def> = LDImm32 5; IRF32:%vreg1
> 	LSU_STO_i32_Myr2 %vreg1<kill>, <fi#1>, 0, pred:1, pred:%noreg,
7;
> mem:Volatile ST4[%x] IRF32:%vreg1
> 	%vreg2<def> = LSU_LDO_i32_Myr2 <fi#1>, 0, pred:1, pred:%noreg,
7;
> mem:Volatile LD4[%x] IRF32:%vreg2
> 	%vreg3<def> = IAU_ADD_32_imm %vreg2<kill>, 1, pred:1,
pred:%noreg,
> %CC_IAU0<imp-def,dead>, %I_STATE<imp-def,dead>;
IRF32:%vreg3,%vreg2
> 	LSU_STO_i32_Myr2 %vreg3<kill>, <fi#1>, 0, pred:1, pred:%noreg,
7;
> mem:Volatile ST4[%x] IRF32:%vreg3
> 	%vreg4<def> = LSU_LDO_i32_Myr2 <fi#1>, 0, pred:1, pred:%noreg,
7;
> mem:Volatile LD4[%x] IRF32:%vreg4
> 	%I18<def> = COPY %vreg4; IRF32:%vreg4
> 	SHAVE_RETURN %I18
> 
> # End machine code for function main.
> 
> Thanks for any helpful response.
> 
> -- 
> Naveed Ul Mustafa
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